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-rw-r--r--arch/msp430/Cargo.toml1
-rw-r--r--arch/msp430/src/architecture.rs7
-rw-r--r--arch/msp430/src/lib.rs9
-rw-r--r--arch/msp430/src/lift.rs5
-rw-r--r--arch/riscv/Cargo.toml1
-rw-r--r--arch/riscv/src/lib.rs13
6 files changed, 13 insertions, 23 deletions
diff --git a/arch/msp430/Cargo.toml b/arch/msp430/Cargo.toml
index 03940cd8..3e0d34fe 100644
--- a/arch/msp430/Cargo.toml
+++ b/arch/msp430/Cargo.toml
@@ -8,7 +8,6 @@ license = "Apache-2.0"
[dependencies]
binaryninja.workspace = true
binaryninjacore-sys.workspace = true
-log = "0.4"
msp430-asm = "^0.2"
[lib]
diff --git a/arch/msp430/src/architecture.rs b/arch/msp430/src/architecture.rs
index ef4c503a..996d3c4a 100644
--- a/arch/msp430/src/architecture.rs
+++ b/arch/msp430/src/architecture.rs
@@ -8,7 +8,7 @@ use binaryninja::{
UnusedIntrinsic, UnusedRegisterStack,
},
disassembly::{InstructionTextToken, InstructionTextTokenKind},
- Endianness,
+ tracing, Endianness,
};
use msp430_asm::{
@@ -21,7 +21,6 @@ use binaryninja::architecture::{
};
use binaryninja::low_level_il::expression::ValueExpr;
use binaryninja::low_level_il::{LowLevelILMutableExpression, LowLevelILMutableFunction};
-use log::error;
const MIN_MNEMONIC: usize = 9;
@@ -321,7 +320,7 @@ impl Architecture for Msp430 {
match id.try_into() {
Ok(flag) => Some(flag),
Err(_) => {
- error!("invalid flag id {}", id);
+ tracing::error!("invalid flag id {}", id);
None
}
}
@@ -331,7 +330,7 @@ impl Architecture for Msp430 {
match id.try_into() {
Ok(flag_write) => Some(flag_write),
Err(_) => {
- error!("invalid flag write id {}", id);
+ tracing::error!("invalid flag write id {}", id);
None
}
}
diff --git a/arch/msp430/src/lib.rs b/arch/msp430/src/lib.rs
index b5465554..892e617d 100644
--- a/arch/msp430/src/lib.rs
+++ b/arch/msp430/src/lib.rs
@@ -1,7 +1,3 @@
-extern crate binaryninja;
-extern crate log;
-extern crate msp430_asm;
-
use binaryninja::{
add_optional_plugin_dependency,
architecture::ArchitectureExt,
@@ -9,7 +5,6 @@ use binaryninja::{
custom_binary_view::{BinaryViewType, BinaryViewTypeExt},
Endianness,
};
-use log::LevelFilter;
mod architecture;
mod flag;
@@ -17,12 +12,12 @@ mod lift;
mod register;
use architecture::Msp430;
-use binaryninja::logger::Logger;
#[no_mangle]
#[allow(non_snake_case)]
pub extern "C" fn CorePluginInit() -> bool {
- Logger::new("MSP430").with_level(LevelFilter::Info).init();
+ binaryninja::tracing_init!("MSP430");
+
let arch =
binaryninja::architecture::register_architecture("msp430", |custom_handle, handle| {
Msp430::new(handle, custom_handle)
diff --git a/arch/msp430/src/lift.rs b/arch/msp430/src/lift.rs
index 3e69b5a4..480b150b 100644
--- a/arch/msp430/src/lift.rs
+++ b/arch/msp430/src/lift.rs
@@ -2,7 +2,7 @@ use crate::architecture::offset_to_absolute;
use crate::flag::{Flag, FlagWrite};
use crate::register::Register;
-use binaryninja::{architecture::FlagCondition, low_level_il::lifting::LowLevelILLabel};
+use binaryninja::{architecture::FlagCondition, low_level_il::lifting::LowLevelILLabel, tracing};
use msp430_asm::emulate::Emulated;
use msp430_asm::instruction::Instruction;
@@ -13,7 +13,6 @@ use msp430_asm::two_operand::TwoOperand;
use binaryninja::low_level_il::expression::ValueExpr;
use binaryninja::low_level_il::{LowLevelILMutableExpression, LowLevelILMutableFunction};
-use log::info;
macro_rules! auto_increment {
($src:expr, $il:ident) => {
@@ -550,7 +549,7 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMut
il.set_reg(size, Register::try_from(*r as u32).unwrap(), il.pop(2))
.append();
} else {
- info!("pop: invalid destination operand");
+ tracing::info!("pop: invalid destination operand");
}
}
Instruction::Ret(_) => {
diff --git a/arch/riscv/Cargo.toml b/arch/riscv/Cargo.toml
index a90000dd..e247b301 100644
--- a/arch/riscv/Cargo.toml
+++ b/arch/riscv/Cargo.toml
@@ -9,7 +9,6 @@ license = "Apache-2.0"
binaryninja.workspace = true
binaryninjacore-sys.workspace = true
riscv-dis = { path = "disasm" }
-log = "0.4"
rayon = { version = "1.0", optional = true }
[features]
diff --git a/arch/riscv/src/lib.rs b/arch/riscv/src/lib.rs
index 22ecdd6d..1ebe7fb4 100644
--- a/arch/riscv/src/lib.rs
+++ b/arch/riscv/src/lib.rs
@@ -26,9 +26,9 @@ use binaryninja::{
RelocationType,
},
symbol::{Symbol, SymbolType},
+ tracing,
types::{NameAndType, Type},
};
-use log::LevelFilter;
use std::borrow::Cow;
use std::fmt;
use std::hash::Hash;
@@ -36,7 +36,6 @@ use std::marker::PhantomData;
use binaryninja::architecture::{BranchKind, IntrinsicId, RegisterId};
use binaryninja::confidence::{Conf, MAX_CONFIDENCE, MIN_CONFIDENCE};
-use binaryninja::logger::Logger;
use binaryninja::low_level_il::expression::{LowLevelILExpressionKind, ValueExpr};
use binaryninja::low_level_il::instruction::LowLevelILInstructionKind;
use binaryninja::low_level_il::lifting::{
@@ -228,7 +227,7 @@ impl<'a, D: RiscVDisassembler> LiftableLowLevelILWithSize<'a> for Register<D> {
#[cfg(debug_assertions)]
{
if reg.size() < size {
- log::warn!(
+ tracing::warn!(
"il @ {:x} attempted to lift {} byte register as {} byte expr",
il.current_address(),
reg.size(),
@@ -2431,7 +2430,7 @@ impl<D: 'static + RiscVDisassembler + Send + Sync> RelocationHandler
}
Self::R_RISCV_TLS_TPREL32 => {
reloc.type_ = RelocationType::UnhandledRelocation;
- log::warn!(
+ tracing::warn!(
"Unhandled relocation type {:?} (R_RISCV_TLS_TPREL32) at {:x?}",
reloc.native_type,
reloc.address
@@ -2439,7 +2438,7 @@ impl<D: 'static + RiscVDisassembler + Send + Sync> RelocationHandler
}
Self::R_RISCV_TLS_TPREL64 => {
reloc.type_ = RelocationType::UnhandledRelocation;
- log::warn!(
+ tracing::warn!(
"Unhandled relocation type {:?} (R_RISCV_TLS_TPREL64) at {:x?}",
reloc.native_type,
reloc.address
@@ -2447,7 +2446,7 @@ impl<D: 'static + RiscVDisassembler + Send + Sync> RelocationHandler
}
_ => {
reloc.type_ = RelocationType::UnhandledRelocation;
- log::warn!(
+ tracing::warn!(
"Unknown relocation type {:?} at {:x?}",
reloc.native_type,
reloc.address
@@ -3014,7 +3013,7 @@ impl FunctionRecognizer for RiscVELFPLTRecognizer {
#[no_mangle]
#[allow(non_snake_case)]
pub extern "C" fn CorePluginInit() -> bool {
- Logger::new("RISCV").with_level(LevelFilter::Trace).init();
+ binaryninja::tracing_init!("RISCV");
use riscv_dis::{RiscVIMACDisassembler, Rv32GRegs, Rv64GRegs};
let arch32 =