From 714d7628097c5b02e23bcad1dba9880c7afc034b Mon Sep 17 00:00:00 2001 From: Maxime Meignan Date: Fri, 24 Jan 2025 14:56:37 +0100 Subject: bugfix: ARM64: missing break in il.cpp's switch A `break` was missing in the switch, making the LDXRH instruction generate 2 IL instructions --- arch/arm64/il.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/il.cpp b/arch/arm64/il.cpp index 8ab06a06..977b57d5 100644 --- a/arch/arm64/il.cpp +++ b/arch/arm64/il.cpp @@ -2015,6 +2015,7 @@ bool GetLowLevelILForInstruction( break; case ARM64_LDXRH: il.AddInstruction(il.Intrinsic({ RegisterOrFlag::Register(REG_O(operand1)) }, ARM64_INTRIN_LDXRH, { ILREG_O(operand2) })); + break; // We don't have a way to specify intrinsic register size, so we explicitly embed the size in the intrinsic name. case ARM64_LDAXR: il.AddInstruction(il.Intrinsic({ RegisterOrFlag::Register(REG_O(operand1)) }, ARM64_INTRIN_LDAXR, { ILREG_O(operand2) })); -- cgit v1.3.1