From 144cd0aa1f13baebac43d5c877dc7cec8e07b389 Mon Sep 17 00:00:00 2001
From: Mark Rowe <mark@vector35.com>
Date: Wed, 3 Jun 2026 21:25:55 -0700
Subject: [aarch64] Emit bswap, popcnt, clz, ctz, cls, and rbit instructions
 during lifting

Intrinsics are still used when lfiting vector instructions, and for
64-bit `rev16` instructions that are not easily composed from the new
instructions.
---
 arch/arm64/arch_arm64.cpp | 20 ++++----------------
 1 file changed, 4 insertions(+), 16 deletions(-)

(limited to 'arch/arm64/arch_arm64.cpp')

diff --git a/arch/arm64/arch_arm64.cpp b/arch/arm64/arch_arm64.cpp
index 20b00e8a..8b1fbc55 100644
--- a/arch/arm64/arch_arm64.cpp
+++ b/arch/arm64/arch_arm64.cpp
@@ -994,18 +994,12 @@ class Arm64Architecture : public Architecture
 			return "__xpaci";
 		case ARM64_INTRIN_ERET:
 			return "_eret";
-		case ARM64_INTRIN_CLZ:
-			return "_CountLeadingZeros";
 		case ARM64_INTRIN_CNT:
 			return "_PopulationCount";
-		case ARM64_INTRIN_CTZ:
-			return "_CountTrailingZeros";
 		case ARM64_INTRIN_CLREX:
 			return "__clrex";
-		case ARM64_INTRIN_REV:
-			return "_byteswap";
-		case ARM64_INTRIN_RBIT:
-			return "__rbit";
+		case ARM64_INTRIN_REV16:
+			return "__rev16";
 		case ARM64_INTRIN_AESD:
 			return "__aesd";
 		case ARM64_INTRIN_AESE:
@@ -1125,12 +1119,9 @@ class Arm64Architecture : public Architecture
 				NameAndType(Type::IntegerType(8, false))
 			};
 			break;
-		case ARM64_INTRIN_CLZ:        // reads <Xn>
 		case ARM64_INTRIN_CNT:        // reads <Xn>
-		case ARM64_INTRIN_CTZ:        // reads <Xn>
 		case ARM64_INTRIN_PRFM:
-		case ARM64_INTRIN_REV:   // reads <Xn>
-		case ARM64_INTRIN_RBIT:  // reads <Xn>
+		case ARM64_INTRIN_REV16:      // reads <Xn>
 			return {NameAndType(Type::IntegerType(8, false))};
 		case ARM64_INTRIN_AUTDA:      // reads <Xd>, <Xn|SP>
 		case ARM64_INTRIN_AUTDB:      // reads <Xd>, <Xn|SP>
@@ -1190,11 +1181,8 @@ class Arm64Architecture : public Architecture
 		case ARM64_INTRIN_PACIB:      // writes <Xd>
 		case ARM64_INTRIN_XPACD:      // writes <Xd>
 		case ARM64_INTRIN_XPACI:      // writes <Xd>
-		case ARM64_INTRIN_CLZ:        // writes <Xd>
 		case ARM64_INTRIN_CNT:        // writes <Xd>
-		case ARM64_INTRIN_CTZ:        // writes <Xd>
-		case ARM64_INTRIN_REV:        // writes <Xd>
-		case ARM64_INTRIN_RBIT:       // writes <Xd>
+		case ARM64_INTRIN_REV16:      // writes <Xd>
 			return {Type::IntegerType(8, false)};
 		case ARM64_INTRIN_AESD:
 		case ARM64_INTRIN_AESE:
-- 
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