From 3f39c3fc3d5603bba111502eee26b5fbbb0077fe Mon Sep 17 00:00:00 2001 From: Mark Rowe Date: Thu, 9 Oct 2025 09:31:15 -0700 Subject: [AArch64] Update disassembler based on 2025-09 ARM ISA data --- arch/arm64/disassembler/decode_scratchpad.c | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'arch/arm64/disassembler/decode_scratchpad.c') diff --git a/arch/arm64/disassembler/decode_scratchpad.c b/arch/arm64/disassembler/decode_scratchpad.c index f50ad23d..f869889f 100644 --- a/arch/arm64/disassembler/decode_scratchpad.c +++ b/arch/arm64/disassembler/decode_scratchpad.c @@ -1607,7 +1607,6 @@ int decode_scratchpad(context* ctx, Instruction* instr) // case ENC_SSBB_ONLY_BARRIERS: // case ENC_PSSBB_ONLY_BARRIERS: case ENC_SB_ONLY_BARRIERS: - case ENC_TCOMMIT_ONLY_BARRIERS: case ENC_PSSBB_DSB_BO_BARRIERS: case ENC_SSBB_DSB_BO_BARRIERS: break; @@ -8110,18 +8109,6 @@ int decode_scratchpad(context* ctx, Instruction* instr) ADD_OPERAND_XT; break; } - case ENC_TCANCEL_EX_EXCEPTION: - { - unsigned imm = ctx->imm16; - ADD_OPERAND_IMM32(imm, 0); - break; - } - case ENC_TSTART_BR_SYSTEMRESULT: - case ENC_TTEST_BR_SYSTEMRESULT: - { - ADD_OPERAND_XT; - break; - } case ENC_TLBI_SYS_CR_SYSTEMINSTRS: { uint64_t op1 = ctx->op1; -- cgit v1.3.1