From b095215397ca8fe7e9808f312403ec4494de76f6 Mon Sep 17 00:00:00 2001
From: Galen Williamson <galen@vector35.com>
Date: Tue, 25 Mar 2025 21:27:51 -0400
Subject: [aarch64] Updating Aarch64 system registers to 2024-12 spec, fix
 MSR/MRS lifting to use ReadMSR/WriteMSR intrinsics that take enums, removing
 the sysregs from the register list of the architecture * sysregs are no
 longer registers, add enum for TLBI and AT operands * add erroneously missing
 cases for unsupported encodings, add enum for DC operands

---
 arch/arm64/il.h | 6 ++++++
 1 file changed, 6 insertions(+)

(limited to 'arch/arm64/il.h')

diff --git a/arch/arm64/il.h b/arch/arm64/il.h
index e345e395..6be7cfe7 100644
--- a/arch/arm64/il.h
+++ b/arch/arm64/il.h
@@ -1,6 +1,7 @@
 #pragma once
 
 #include "binaryninjaapi.h"
+#include "sysregs_enum.h"
 #include "disassembler/arm64dis.h"
 #include "disassembler/encodings_dec.h"
 #include "disassembler/encodings_fmt.h"
@@ -77,6 +78,8 @@ enum Arm64Intrinsic : uint32_t
 	ARM64_INTRIN_RBIT,
 	ARM64_INTRIN_AESD,
 	ARM64_INTRIN_AESE,
+	ARM64_INTRIN_AESIMC,
+	ARM64_INTRIN_AESMC,
 	ARM64_INTRIN_LDXR,
 	ARM64_INTRIN_LDXRB,
 	ARM64_INTRIN_LDXRH,
@@ -89,6 +92,9 @@ enum Arm64Intrinsic : uint32_t
 	ARM64_INTRIN_STLXR,
 	ARM64_INTRIN_STLXRB,
 	ARM64_INTRIN_STLXRH,
+	ARM64_INTRIN_TLBI,
+	ARM64_INTRIN_TLBI_REG,
+	ARM64_INTRIN_AT,
 	ARM64_INTRIN_NORMAL_END, /* needed so intrinsics can be extended by other lists, like neon
 	                            intrinsics */
 	ARM64_INTRIN_INVALID = 0xFFFFFFFF,
-- 
cgit v1.3.1