From 9373cab26ee2e7b2febab7674360d54d6fb8adc6 Mon Sep 17 00:00:00 2001
From: Galen Williamson <galen@vector35.com>
Date: Tue, 4 Feb 2025 17:02:30 -0500
Subject: WIP improve thumb2 MSR lifting

---
 arch/armv7/armv7_disasm/armv7.h | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

(limited to 'arch/armv7/armv7_disasm')

diff --git a/arch/armv7/armv7_disasm/armv7.h b/arch/armv7/armv7_disasm/armv7.h
index eae0f3de..d91d75ca 100644
--- a/arch/armv7/armv7_disasm/armv7.h
+++ b/arch/armv7/armv7_disasm/armv7.h
@@ -697,16 +697,20 @@ enum Register
 	REGS_FPEXC, // 8
 	REGS_FPINST, // 9
 	REGS_FPINST2, //10
-	REGS_MSP,
-	REGS_PSP,
 
 	// these are M-profile only (special)
 	// but are here in ARM common (general)
 	// TODO: implement "microarchitecture support"
+	REGS_MSP,
+	REGS_PSP,
 	REGS_PRIMASK,
 	REGS_BASEPRI,
 	REGS_FAULTMASK,
 	REGS_CONTROL,
+	REGS_BASEPRI_MAX,
+	REGS_IPSR,
+	REGS_EPSR,
+	REGS_IEPSR,
 
 	REG_INVALID,
 };
-- 
cgit v1.3.1