From d6e13c753b30260b182cfe433e4e275244a4ab78 Mon Sep 17 00:00:00 2001 From: Galen Williamson Date: Wed, 23 Jul 2025 13:56:24 -0400 Subject: [armv7/thumb2] Fix Lifting for PC-relative vldr instruction does not align PC when calculating address #6947 Updated thumb2 pcode parser used by disassembler generator to use Tatsu instead of deprecated Grako --- arch/armv7/thumb2_disasm/arm_pcode_parser/README.md | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/armv7/thumb2_disasm/arm_pcode_parser/README.md') diff --git a/arch/armv7/thumb2_disasm/arm_pcode_parser/README.md b/arch/armv7/thumb2_disasm/arm_pcode_parser/README.md index c3adae56..7dcc5d15 100644 --- a/arch/armv7/thumb2_disasm/arm_pcode_parser/README.md +++ b/arch/armv7/thumb2_disasm/arm_pcode_parser/README.md @@ -4,7 +4,12 @@ translate the pseudocode for arm instructions (given in the docs) to target lang once the pcode is extracted, automatic generation of ultra-accurate disassemblers should become possible # how -use Grako parser generator, describe the language (pcode.ebnf) and write code generator (codegen.py) +~~use Grako parser generator, describe the language (pcode.ebnf) and write code generator (codegen.py)~~ +use Tatsu parser generator, describe the language (pcode.ebnf) and write code generator (codegen.py): + +``` +python3 -m tatsu --name pcode pcode.ebnf -o parse.py +``` # example input statement: -- cgit v1.3.1