From 0becd045c5e3e0997c30cb64f19fe21b2b3c421f Mon Sep 17 00:00:00 2001 From: Galen Williamson Date: Fri, 8 Aug 2025 19:08:54 -0400 Subject: [thumb2] improved disassembly and lifting of VCVT instruction for scalar floating-point/integer cases --- arch/armv7/thumb2_disasm/spec.txt | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'arch/armv7/thumb2_disasm/spec.txt') diff --git a/arch/armv7/thumb2_disasm/spec.txt b/arch/armv7/thumb2_disasm/spec.txt index eaffbfce..34b04e65 100644 --- a/arch/armv7/thumb2_disasm/spec.txt +++ b/arch/armv7/thumb2_disasm/spec.txt @@ -5529,12 +5529,14 @@ to_integer = (opc1 == '1'); dp_operation = (sz == 1); unsigned = (opc3 == '0'); m = UInt(Vm:M); d = if dp_operation then UInt(D:Vd) else UInt(Vd:D); -if (to_integer) then unsigned = (opc1 == '0'); -if (to_integer) then d = UInt(Vd:D); -if (to_integer) then m = if dp_operation then UInt(M:Vm) else UInt(Vm:M); +if to_integer then unsigned = (opc1 == '0'); +if to_integer then round_zero = (op == '1'); +if to_integer then d = UInt(Vd:D); +if to_integer then m = if dp_operation then UInt(M:Vm) else UInt(Vm:M); +if !to_integer then round_nearest = FALSE; fmt_idx = ((op == '0') * 4) + (opc3 * 2) + sz + 2; if (opc1 == '0') then fmt_idx = sz; -dt = ((op == '0') * 4) + 2; +if to_integer then dt = 2 + (sz * 2) + (1 - opc3) else dt = ((op == '0') * 4) + 2; pcode_end Encoding T1 ADVSIMD fmt VCVT.
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