From d6e13c753b30260b182cfe433e4e275244a4ab78 Mon Sep 17 00:00:00 2001
From: Galen Williamson <galen@vector35.com>
Date: Wed, 23 Jul 2025 13:56:24 -0400
Subject: [armv7/thumb2] Fix Lifting for PC-relative vldr instruction does not
 align PC when calculating address #6947

Updated thumb2 pcode parser used by disassembler generator to use Tatsu instead of deprecated Grako
---
 arch/armv7/thumb2_disasm/spec.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'arch/armv7/thumb2_disasm/spec.txt')

diff --git a/arch/armv7/thumb2_disasm/spec.txt b/arch/armv7/thumb2_disasm/spec.txt
index ebb5932d..eaffbfce 100644
--- a/arch/armv7/thumb2_disasm/spec.txt
+++ b/arch/armv7/thumb2_disasm/spec.txt
@@ -5526,7 +5526,7 @@ fmt VCVTR<c>.S32.F64 <Sd>,<Dm>
 extract32 1110,11101,D.1,11,1,opc1.1,opc2.1,opc3.1,Vd.4,101,sz.1,op.1,1,M.1,0,Vm.4
 pcode_start
 to_integer = (opc1 == '1'); dp_operation = (sz == 1);
-unsigned = (op == '0');
+unsigned = (opc3 == '0');
 m = UInt(Vm:M);
 d = if dp_operation then UInt(D:Vd) else UInt(Vd:D);
 if (to_integer) then unsigned = (opc1 == '0');
-- 
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