From c3fdda9727f5507818e3f55576ad32215a22b0f9 Mon Sep 17 00:00:00 2001
From: Mason Reed <mason@vector35.com>
Date: Wed, 30 Apr 2025 17:38:40 -0400
Subject: [Rust] Remove Architecture trait bound on LLIL related structures

---
 arch/riscv/disasm/src/lib.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'arch/riscv/disasm/src')

diff --git a/arch/riscv/disasm/src/lib.rs b/arch/riscv/disasm/src/lib.rs
index 959952ee..152817c6 100644
--- a/arch/riscv/disasm/src/lib.rs
+++ b/arch/riscv/disasm/src/lib.rs
@@ -2331,7 +2331,7 @@ impl StandardExtension for ExtensionSupported {
     }
 }
 
-pub trait RiscVDisassembler: 'static + Debug + Sized + Copy + Clone  + Send + Sync {
+pub trait RiscVDisassembler: 'static + Debug + Sized + Copy + Clone + Send + Sync {
     type RegFile: RegFile;
     type MulDivExtension: StandardExtension;
     type AtomicExtension: StandardExtension;
-- 
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