From 623f07a2b44ac9dbc86bab2ea011ee5899664f15 Mon Sep 17 00:00:00 2001 From: chedahub <2017000029@ushs.hs.kr> Date: Wed, 22 Oct 2025 10:20:19 +0900 Subject: Fix: PowerPC decode logic for Rx, Ry, Rz register --- arch/powerpc/decode/vle16.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/decode/vle16.c b/arch/powerpc/decode/vle16.c index 7500e6ba..ed46656a 100644 --- a/arch/powerpc/decode/vle16.c +++ b/arch/powerpc/decode/vle16.c @@ -335,17 +335,20 @@ static InstructionId Decode16Vle(uint16_t word16, uint32_t decodeFlags) } static uint16_t Get16Rx(uint16_t word16) { - return word16 & 0xf; + uint16_t rx = word16 & 0xf; + return rx + ((rx & 0x8) >> 3) * 16; } static uint16_t Get16Ry(uint16_t word16) { - return (word16 >> 4) & 0xf; + uint16_t ry = (word16 >> 4) & 0xf; + return ry + ((ry & 0x8) >> 3) * 16; } static uint16_t Get16Rz(uint16_t word16) { - return (word16 >> 4) & 0xf; + uint16_t rz = (word16 >> 4) & 0xf; + return rz + ((rz & 0x8) >> 3) * 16; } static void FillOperands16Vle(Instruction* instruction, uint16_t word16, uint64_t address, bool translate) -- cgit v1.3.1