From 2f3873928078e8c21911ffeb5476781b31886514 Mon Sep 17 00:00:00 2001
From: Rusty Wagner <rusty@vector35.com>
Date: Wed, 31 Jan 2018 20:24:16 -0500
Subject: Adding CPU intrinsics support

---
 lowlevelil.cpp | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

(limited to 'lowlevelil.cpp')

diff --git a/lowlevelil.cpp b/lowlevelil.cpp
index c72d4b68..0f2b29be 100644
--- a/lowlevelil.cpp
+++ b/lowlevelil.cpp
@@ -216,6 +216,17 @@ ExprId LowLevelILFunction::AddIndexList(const vector<size_t> operands)
 }
 
 
+ExprId LowLevelILFunction::AddRegisterOrFlagList(const vector<RegisterOrFlag>& regs)
+{
+	uint64_t* operandList = new uint64_t[regs.size()];
+	for (size_t i = 0; i < regs.size(); i++)
+		operandList[i] = regs[i].ToIdentifier();
+	ExprId result = (ExprId)BNLowLevelILAddOperandList(m_object, operandList, regs.size());
+	delete[] operandList;
+	return result;
+}
+
+
 ExprId LowLevelILFunction::AddSSARegisterList(const vector<SSARegister>& regs)
 {
 	uint64_t* operandList = new uint64_t[regs.size() * 2];
@@ -258,6 +269,20 @@ ExprId LowLevelILFunction::AddSSAFlagList(const vector<SSAFlag>& flags)
 }
 
 
+ExprId LowLevelILFunction::AddSSARegisterOrFlagList(const vector<SSARegisterOrFlag>& regs)
+{
+	uint64_t* operandList = new uint64_t[regs.size() * 2];
+	for (size_t i = 0; i < regs.size(); i++)
+	{
+		operandList[i * 2] = regs[i].regOrFlag.ToIdentifier();
+		operandList[(i * 2) + 1] = regs[i].version;
+	}
+	ExprId result = (ExprId)BNLowLevelILAddOperandList(m_object, operandList, regs.size() * 2);
+	delete[] operandList;
+	return result;
+}
+
+
 ExprId LowLevelILFunction::GetExprForRegisterOrConstant(const BNRegisterOrConstant& operand, size_t size)
 {
 	if (operand.constant)
-- 
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