diff options
| author | Mason Reed <mason@vector35.com> | 2024-08-26 17:12:36 -0400 |
|---|---|---|
| committer | mason <35282038+emesare@users.noreply.github.com> | 2024-08-27 11:16:59 -0700 |
| commit | 6914de6113448a23a905cde761dfc83ed7993a25 (patch) | |
| tree | 5cd9e9e5bc365bac5a37eec96bc36c7db4d0f5de | |
| parent | 0214ae089090165217e7c1a55de5e259cf2d9f0c (diff) | |
Use split registers for VMOV
| -rw-r--r-- | arch/armv7/thumb2_disasm/il_thumb2.cpp | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/armv7/thumb2_disasm/il_thumb2.cpp b/arch/armv7/thumb2_disasm/il_thumb2.cpp index 07f02294..3ca95813 100644 --- a/arch/armv7/thumb2_disasm/il_thumb2.cpp +++ b/arch/armv7/thumb2_disasm/il_thumb2.cpp @@ -1615,15 +1615,14 @@ bool GetLowLevelILForNEONInstruction(Architecture* arch, LowLevelILFunction& il, if (instr->format->operands[2].type == OPERAND_FORMAT_REG_FP) { // r3:r2 <- d12 - // The set reg will constrain the 8 byte to 4 byte _probably_. - il.AddInstruction(WriteILOperand(il, instr, 0, ReadILOperand(il, instr, 2))); - il.AddInstruction(WriteILOperand(il, instr, 1, il.LogicalShiftRight(4, ReadILOperand(il, instr, 2), il.Const(1, 32)))); + il.SetRegisterSplit(4, ReadILOperand(il, instr, 0), ReadILOperand(il, instr, 1), + ReadILOperand(il, instr, 3)); } else { // d9 <- r1:r0 - il.AddInstruction(WriteILOperand(il, instr, 0, il.Or(4, - il.ShiftLeft(4, ReadILOperand(il, instr, 2), il.Const(1, 32)), - ReadILOperand(il, instr, 1)))); + il.AddInstruction(WriteILOperand(il, instr, 0, + il.RegisterSplit(8, ReadILOperand(il, instr, 1), + ReadILOperand(il, instr, 2)))); } } else |