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authorMason Reed <mason@vector35.com>2024-08-22 20:27:16 -0400
committermason <35282038+emesare@users.noreply.github.com>2024-08-27 11:16:59 -0700
commit6c1a731f22f5094c4751ca88254d6cd4c88b0319 (patch)
tree1e3ab2bb3bc6c1a6e618e938b17c7b50c7fbd578
parent8b2968d9f947b69e55d477539e54b2659130c524 (diff)
Lift VSUB, VDIV, VMUL, VFMA
VSUB already existed but it was lifted as a regular SUB instruction
-rw-r--r--arch/armv7/thumb2_disasm/il_thumb2.cpp49
1 files changed, 48 insertions, 1 deletions
diff --git a/arch/armv7/thumb2_disasm/il_thumb2.cpp b/arch/armv7/thumb2_disasm/il_thumb2.cpp
index 0609f134..df205c73 100644
--- a/arch/armv7/thumb2_disasm/il_thumb2.cpp
+++ b/arch/armv7/thumb2_disasm/il_thumb2.cpp
@@ -1480,7 +1480,54 @@ bool GetLowLevelILForNEONInstruction(Architecture* arch, LowLevelILFunction& il,
il.AddInstruction(WriteArithOperand(il, instr, il.Xor(GetRegisterSize(instr, 0), ReadILOperand(il, instr, 1), ReadILOperand(il, instr, 2))));
break;
case armv7::ARMV7_VSUB:
- il.AddInstruction(WriteArithOperand(il, instr, il.Sub(GetRegisterSize(instr, 0), ReadILOperand(il, instr, 1), ReadILOperand(il, instr, 2))));
+ if (strcmp(instr->format->operation, "vsub.f64") == 0 || strcmp(instr->format->operation, "vsub.f32") == 0)
+ {
+ il.AddInstruction(WriteArithOperand(
+ il, instr, il.FloatSub(GetRegisterSize(instr, 0), ReadILOperand(il, instr, 1),
+ ReadILOperand(il, instr, 2))));
+ } else
+ {
+ il.AddInstruction(il.Unimplemented());
+ }
+ break;
+ case armv7::ARMV7_VFMA:
+ if (strcmp(instr->format->operation, "vfma.f64") == 0 || strcmp(instr->format->operation, "vfma.f32") == 0)
+ {
+ il.AddInstruction(WriteArithOperand(il, instr,il.FloatAdd(
+ GetRegisterSize(instr, 0), ReadILOperand(il, instr, 0),
+ il.FloatMult(GetRegisterSize(instr, 0),
+ ReadILOperand(il, instr, 1),
+ ReadILOperand(il, instr, 2)))));
+ }
+ else if (strcmp(instr->format->operation, "vfms.f64") == 0 || strcmp(instr->format->operation, "vfms.f32") == 0)
+ {
+ il.AddInstruction(WriteArithOperand(il, instr,il.FloatSub(
+ GetRegisterSize(instr, 0), ReadILOperand(il, instr, 0),
+ il.FloatMult(GetRegisterSize(instr, 0),
+ ReadILOperand(il, instr, 1),
+ ReadILOperand(il, instr, 2)))));
+ }
+ else
+ {
+ il.AddInstruction(il.Unimplemented());
+ }
+ break;
+ case armv7::ARMV7_VMUL:
+ // TODO: This is not the correct way to get the vmul format right lol?
+ if (strcmp(instr->format->operation, "vmul.f64") == 0 || strcmp(instr->format->operation, "vmul.f32") == 0)
+ {
+ il.AddInstruction(WriteArithOperand(
+ il, instr, il.FloatMult(GetRegisterSize(instr, 0), ReadILOperand(il, instr, 1),
+ ReadILOperand(il, instr, 2))));
+ } else
+ {
+ il.AddInstruction(il.Unimplemented());
+ }
+ break;
+ case armv7::ARMV7_VDIV:
+ il.AddInstruction(WriteArithOperand(
+ il, instr, il.FloatDiv(GetRegisterSize(instr, 0), ReadILOperand(il, instr, 1),
+ ReadILOperand(il, instr, 2))));
break;
case armv7::ARMV7_VMRS:
// TODO: If this sets the apsr register we do not track that in the core flag group.