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| author | Galen Williamson <galen@vector35.com> | 2025-04-04 22:01:15 -0400 |
|---|---|---|
| committer | Galen Williamson <galen@vector35.com> | 2025-04-08 15:40:49 -0400 |
| commit | e301d99a8df8ed185ffe71dabe915ab55d6fb885 (patch) | |
| tree | 599a48c86f8425b02362e9910b70dd12b954b128 /arch/arm64/disassembler/disasm_test.py | |
| parent | b0b223e9f2379c5d6622dcc082692aa94235cd96 (diff) | |
[aarch64] lift all LD[1-4]R? and ST[1-4] opcodes, lift ST/LDCLR, ST/LDEOR, ST/LDSET, and their variants
Also fixes all outstanding issues in arm64test.py, including intrinsics, dc, at, and tlbi
Diffstat (limited to 'arch/arm64/disassembler/disasm_test.py')
| -rwxr-xr-x | arch/arm64/disassembler/disasm_test.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/disassembler/disasm_test.py b/arch/arm64/disassembler/disasm_test.py index cd110c03..192b67ed 100755 --- a/arch/arm64/disassembler/disasm_test.py +++ b/arch/arm64/disassembler/disasm_test.py @@ -21,7 +21,7 @@ def normalize(instxt): instxt = instxt.strip() # collapse runs of whitespace to one space character - instxt = re.sub('\s+', ' ', instxt) + instxt = re.sub(r'\s+', ' ', instxt) # remove comments if ' //' in instxt: |