diff options
| author | Galen Williamson <galen@vector35.com> | 2025-04-01 02:11:49 -0400 |
|---|---|---|
| committer | Galen Williamson <galen@vector35.com> | 2025-04-01 02:14:13 -0400 |
| commit | 100faeb5d195c71e93194ea9bdfee1a08aaedbd7 (patch) | |
| tree | 3f5bc1bd8f5ff86f41d029769ea9f0376f01b8b4 /arch/arm64/disassembler | |
| parent | 6479724650885499126180585876675167918727 (diff) | |
[aarch64] use static var to avoid recreation of sysregs vector
Diffstat (limited to 'arch/arm64/disassembler')
| -rw-r--r-- | arch/arm64/disassembler/sysregs_fmt_gen.c | 2972 | ||||
| -rw-r--r-- | arch/arm64/disassembler/sysregs_fmt_gen.h | 1 | ||||
| -rw-r--r-- | arch/arm64/disassembler/sysregs_gen.c | 2976 | ||||
| -rw-r--r-- | arch/arm64/disassembler/sysregs_gen.h | 457 |
4 files changed, 3185 insertions, 3221 deletions
diff --git a/arch/arm64/disassembler/sysregs_fmt_gen.c b/arch/arm64/disassembler/sysregs_fmt_gen.c index 805303ab..3a3a4767 100644 --- a/arch/arm64/disassembler/sysregs_fmt_gen.c +++ b/arch/arm64/disassembler/sysregs_fmt_gen.c @@ -1,1495 +1,1496 @@ +/* GENERATED FILE - DO NOT MODIFY - SUBMIT GITHUB ISSUE IF PROBLEM FOUND */ + #include <stddef.h> #include "sysregs_gen.h" -/* must parallel has_system_register_name() from the decode side */ const char *get_system_register_name(enum SystemReg sr) { switch(sr) { - case REG_EDSCR: return "edscr"; - case REG_EDPRSR: return "edprsr"; - case REG_UAOIMM: return "uaoimm"; - case REG_PANIMM: return "panimm"; - case REG_SPSELIMM: return "spselimm"; - case REG_DITIMM: return "ditimm"; - case REG_SVCRIMM: return "svcrimm"; - case REG_ICIALLUIS: return "icialluis"; - case REG_ICIALLU: return "iciallu"; - case REG_DCIVAC: return "dcivac"; - case REG_DCISW: return "dcisw"; - case REG_ATS1E1R: return "ats1e1r"; - case REG_ATS1E1W: return "ats1e1w"; - case REG_ATS1E0R: return "ats1e0r"; - case REG_ATS1E0W: return "ats1e0w"; - case REG_DCCSW: return "dccsw"; - case REG_DCCISW: return "dccisw"; - case REG_TLBIVMALLE1IS: return "tlbivmalle1is"; - case REG_TLBIVAE1IS: return "tlbivae1is"; - case REG_TLBIASIDE1IS: return "tlbiaside1is"; - case REG_TLBIVAAE1IS: return "tlbivaae1is"; - case REG_TLBIVALE1IS: return "tlbivale1is"; - case REG_TLBIVAALE1IS: return "tlbivaale1is"; - case REG_TLBIVMALLE1: return "tlbivmalle1"; - case REG_TLBIVAE1: return "tlbivae1"; - case REG_TLBIASIDE1: return "tlbiaside1"; - case REG_TLBIVAAE1: return "tlbivaae1"; - case REG_TLBIVALE1: return "tlbivale1"; - case REG_TLBIVAALE1: return "tlbivaale1"; - case REG_DCZVA: return "dczva"; - case REG_ICIVAU: return "icivau"; - case REG_DCCVAC: return "dccvac"; - case REG_DCCVAU: return "dccvau"; - case REG_DCCIVAC: return "dccivac"; - case REG_ATS1E2R: return "ats1e2r"; - case REG_ATS1E2W: return "ats1e2w"; - case REG_ATS12E1R: return "ats12e1r"; - case REG_ATS12E1W: return "ats12e1w"; - case REG_ATS12E0R: return "ats12e0r"; - case REG_ATS12E0W: return "ats12e0w"; - case REG_TLBIIPAS2E1IS: return "tlbiipas2e1is"; - case REG_TLBIIPAS2LE1IS: return "tlbiipas2le1is"; - case REG_TLBIALLE2IS: return "tlbialle2is"; - case REG_TLBIVAE2IS: return "tlbivae2is"; - case REG_TLBIALLE1IS: return "tlbialle1is"; - case REG_TLBIVALE2IS: return "tlbivale2is"; - case REG_TLBIVMALLS12E1IS: return "tlbivmalls12e1is"; - case REG_TLBIIPAS2E1: return "tlbiipas2e1"; - case REG_TLBIIPAS2LE1: return "tlbiipas2le1"; - case REG_TLBIALLE2: return "tlbialle2"; - case REG_TLBIVAE2: return "tlbivae2"; - case REG_TLBIALLE1: return "tlbialle1"; - case REG_TLBIVALE2: return "tlbivale2"; - case REG_TLBIVMALLS12E1: return "tlbivmalls12e1"; - case REG_ATS1E3R: return "ats1e3r"; - case REG_ATS1E3W: return "ats1e3w"; - case REG_TLBIALLE3IS: return "tlbialle3is"; - case REG_TLBIVAE3IS: return "tlbivae3is"; - case REG_TLBIVALE3IS: return "tlbivale3is"; - case REG_TLBIALLE3: return "tlbialle3"; - case REG_TLBIVAE3: return "tlbivae3"; - case REG_TLBIVALE3: return "tlbivale3"; - case REG_OSDTRRX_EL1: return "osdtrrx_el1"; - case REG_DBGBVR0_EL1: return "dbgbvr0_el1"; - case REG_DBGBCR0_EL1: return "dbgbcr0_el1"; - case REG_DBGWVR0_EL1: return "dbgwvr0_el1"; - case REG_DBGWCR0_EL1: return "dbgwcr0_el1"; - case REG_DBGBVR1_EL1: return "dbgbvr1_el1"; - case REG_DBGBCR1_EL1: return "dbgbcr1_el1"; - case REG_DBGWVR1_EL1: return "dbgwvr1_el1"; - case REG_DBGWCR1_EL1: return "dbgwcr1_el1"; - case REG_MDCCINT_EL1: return "mdccint_el1"; - case REG_MDSCR_EL1: return "mdscr_el1"; - case REG_DBGBVR2_EL1: return "dbgbvr2_el1"; - case REG_DBGBCR2_EL1: return "dbgbcr2_el1"; - case REG_DBGWVR2_EL1: return "dbgwvr2_el1"; - case REG_DBGWCR2_EL1: return "dbgwcr2_el1"; - case REG_OSDTRTX_EL1: return "osdtrtx_el1"; - case REG_DBGBVR3_EL1: return "dbgbvr3_el1"; - case REG_DBGBCR3_EL1: return "dbgbcr3_el1"; - case REG_DBGWVR3_EL1: return "dbgwvr3_el1"; - case REG_DBGWCR3_EL1: return "dbgwcr3_el1"; - case REG_DBGBVR4_EL1: return "dbgbvr4_el1"; - case REG_DBGBCR4_EL1: return "dbgbcr4_el1"; - case REG_DBGWVR4_EL1: return "dbgwvr4_el1"; - case REG_DBGWCR4_EL1: return "dbgwcr4_el1"; - case REG_DBGBVR5_EL1: return "dbgbvr5_el1"; - case REG_DBGBCR5_EL1: return "dbgbcr5_el1"; - case REG_DBGWVR5_EL1: return "dbgwvr5_el1"; - case REG_DBGWCR5_EL1: return "dbgwcr5_el1"; - case REG_DBGWFAR: return "dbgwfar"; - case REG_OSECCR_EL1: return "oseccr_el1"; - case REG_DBGBVR6_EL1: return "dbgbvr6_el1"; - case REG_DBGBCR6_EL1: return "dbgbcr6_el1"; - case REG_DBGWVR6_EL1: return "dbgwvr6_el1"; - case REG_DBGWCR6_EL1: return "dbgwcr6_el1"; - case REG_DBGBVR7_EL1: return "dbgbvr7_el1"; - case REG_DBGBCR7_EL1: return "dbgbcr7_el1"; - case REG_DBGWVR7_EL1: return "dbgwvr7_el1"; - case REG_DBGWCR7_EL1: return "dbgwcr7_el1"; - case REG_DBGBVR8_EL1: return "dbgbvr8_el1"; - case REG_DBGBCR8_EL1: return "dbgbcr8_el1"; - case REG_DBGWVR8_EL1: return "dbgwvr8_el1"; - case REG_DBGWCR8_EL1: return "dbgwcr8_el1"; - case REG_DBGBVR9_EL1: return "dbgbvr9_el1"; - case REG_DBGBCR9_EL1: return "dbgbcr9_el1"; - case REG_DBGWVR9_EL1: return "dbgwvr9_el1"; - case REG_DBGWCR9_EL1: return "dbgwcr9_el1"; - case REG_DBGBVR10_EL1: return "dbgbvr10_el1"; - case REG_DBGBCR10_EL1: return "dbgbcr10_el1"; - case REG_DBGWVR10_EL1: return "dbgwvr10_el1"; - case REG_DBGWCR10_EL1: return "dbgwcr10_el1"; - case REG_DBGBVR11_EL1: return "dbgbvr11_el1"; - case REG_DBGBCR11_EL1: return "dbgbcr11_el1"; - case REG_DBGWVR11_EL1: return "dbgwvr11_el1"; - case REG_DBGWCR11_EL1: return "dbgwcr11_el1"; - case REG_DBGBVR12_EL1: return "dbgbvr12_el1"; - case REG_DBGBCR12_EL1: return "dbgbcr12_el1"; - case REG_DBGWVR12_EL1: return "dbgwvr12_el1"; - case REG_DBGWCR12_EL1: return "dbgwcr12_el1"; - case REG_DBGBVR13_EL1: return "dbgbvr13_el1"; - case REG_DBGBCR13_EL1: return "dbgbcr13_el1"; - case REG_DBGWVR13_EL1: return "dbgwvr13_el1"; - case REG_DBGWCR13_EL1: return "dbgwcr13_el1"; - case REG_DBGBVR14_EL1: return "dbgbvr14_el1"; - case REG_DBGBCR14_EL1: return "dbgbcr14_el1"; - case REG_DBGWVR14_EL1: return "dbgwvr14_el1"; - case REG_DBGWCR14_EL1: return "dbgwcr14_el1"; - case REG_DBGBVR15_EL1: return "dbgbvr15_el1"; - case REG_DBGBCR15_EL1: return "dbgbcr15_el1"; - case REG_DBGWVR15_EL1: return "dbgwvr15_el1"; - case REG_DBGWCR15_EL1: return "dbgwcr15_el1"; - case REG_MDRAR_EL1: return "mdrar_el1"; - case REG_OSLAR_EL1: return "oslar_el1"; - case REG_OSLSR_EL1: return "oslsr_el1"; - case REG_OSDLR_EL1: return "osdlr_el1"; - case REG_DBGPRCR_EL1: return "dbgprcr_el1"; - case REG_CLAIMSET_EL1: return "claimset_el1"; - case REG_CLAIMCLR_EL1: return "claimclr_el1"; - case REG_AUTHSTAT_EL1: return "authstat_el1"; - case REG_TRCTRACEIDR: return "trctraceidr"; - case REG_TRCVICTLR: return "trcvictlr"; - case REG_TRCSEQEVR0: return "trcseqevr0"; - case REG_TRCCNTRLDVR0: return "trccntrldvr0"; - case REG_TRCIMSPEC0: return "trcimspec0"; - case REG_TRCPRGCTLR: return "trcprgctlr"; - case REG_TRCQCTLR: return "trcqctlr"; - case REG_TRCVIIECTLR: return "trcviiectlr"; - case REG_TRCSEQEVR1: return "trcseqevr1"; - case REG_TRCCNTRLDVR1: return "trccntrldvr1"; - case REG_TRCIMSPEC1: return "trcimspec1"; - case REG_TRCPROCSELR: return "trcprocselr"; - case REG_TRCVISSCTLR: return "trcvissctlr"; - case REG_TRCSEQEVR2: return "trcseqevr2"; - case REG_TRCCNTRLDVR2: return "trccntrldvr2"; - case REG_TRCIMSPEC2: return "trcimspec2"; - case REG_TRCVIPCSSCTLR: return "trcvipcssctlr"; - case REG_TRCCNTRLDVR3: return "trccntrldvr3"; - case REG_TRCIMSPEC3: return "trcimspec3"; - case REG_TRCCONFIGR: return "trcconfigr"; - case REG_TRCCNTCTLR0: return "trccntctlr0"; - case REG_TRCIMSPEC4: return "trcimspec4"; - case REG_TRCCNTCTLR1: return "trccntctlr1"; - case REG_TRCIMSPEC5: return "trcimspec5"; - case REG_TRCAUXCTLR: return "trcauxctlr"; - case REG_TRCSEQRSTEVR: return "trcseqrstevr"; - case REG_TRCCNTCTLR2: return "trccntctlr2"; - case REG_TRCIMSPEC6: return "trcimspec6"; - case REG_TRCSEQSTR: return "trcseqstr"; - case REG_TRCCNTCTLR3: return "trccntctlr3"; - case REG_TRCIMSPEC7: return "trcimspec7"; - case REG_TRCEVENTCTL0R: return "trceventctl0r"; - case REG_TRCVDCTLR: return "trcvdctlr"; - case REG_TRCEXTINSELR: return "trcextinselr"; - case REG_TRCCNTVR0: return "trccntvr0"; - case REG_TRCEVENTCTL1R: return "trceventctl1r"; - case REG_TRCVDSACCTLR: return "trcvdsacctlr"; - case REG_TRCEXTINSELR1: return "trcextinselr1"; - case REG_TRCCNTVR1: return "trccntvr1"; - case REG_TRCRSR: return "trcrsr"; - case REG_TRCVDARCCTLR: return "trcvdarcctlr"; - case REG_TRCEXTINSELR2: return "trcextinselr2"; - case REG_TRCCNTVR2: return "trccntvr2"; - case REG_TRCSTALLCTLR: return "trcstallctlr"; - case REG_TRCEXTINSELR3: return "trcextinselr3"; - case REG_TRCCNTVR3: return "trccntvr3"; - case REG_TRCTSCTLR: return "trctsctlr"; - case REG_TRCSYNCPR: return "trcsyncpr"; - case REG_TRCCCCTLR: return "trcccctlr"; - case REG_TRCBBCTLR: return "trcbbctlr"; - case REG_TRCRSCTLR16: return "trcrsctlr16"; - case REG_TRCSSCCR0: return "trcssccr0"; - case REG_TRCSSPCICR0: return "trcsspcicr0"; - case REG_TRCOSLAR: return "trcoslar"; - case REG_TRCRSCTLR17: return "trcrsctlr17"; - case REG_TRCSSCCR1: return "trcssccr1"; - case REG_TRCSSPCICR1: return "trcsspcicr1"; - case REG_TRCRSCTLR2: return "trcrsctlr2"; - case REG_TRCRSCTLR18: return "trcrsctlr18"; - case REG_TRCSSCCR2: return "trcssccr2"; - case REG_TRCSSPCICR2: return "trcsspcicr2"; - case REG_TRCRSCTLR3: return "trcrsctlr3"; - case REG_TRCRSCTLR19: return "trcrsctlr19"; - case REG_TRCSSCCR3: return "trcssccr3"; - case REG_TRCSSPCICR3: return "trcsspcicr3"; - case REG_TRCRSCTLR4: return "trcrsctlr4"; - case REG_TRCRSCTLR20: return "trcrsctlr20"; - case REG_TRCSSCCR4: return "trcssccr4"; - case REG_TRCSSPCICR4: return "trcsspcicr4"; - case REG_TRCPDCR: return "trcpdcr"; - case REG_TRCRSCTLR5: return "trcrsctlr5"; - case REG_TRCRSCTLR21: return "trcrsctlr21"; - case REG_TRCSSCCR5: return "trcssccr5"; - case REG_TRCSSPCICR5: return "trcsspcicr5"; - case REG_TRCRSCTLR6: return "trcrsctlr6"; - case REG_TRCRSCTLR22: return "trcrsctlr22"; - case REG_TRCSSCCR6: return "trcssccr6"; - case REG_TRCSSPCICR6: return "trcsspcicr6"; - case REG_TRCRSCTLR7: return "trcrsctlr7"; - case REG_TRCRSCTLR23: return "trcrsctlr23"; - case REG_TRCSSCCR7: return "trcssccr7"; - case REG_TRCSSPCICR7: return "trcsspcicr7"; - case REG_TRCRSCTLR8: return "trcrsctlr8"; - case REG_TRCRSCTLR24: return "trcrsctlr24"; - case REG_TRCSSCSR0: return "trcsscsr0"; - case REG_TRCRSCTLR9: return "trcrsctlr9"; - case REG_TRCRSCTLR25: return "trcrsctlr25"; - case REG_TRCSSCSR1: return "trcsscsr1"; - case REG_TRCRSCTLR10: return "trcrsctlr10"; - case REG_TRCRSCTLR26: return "trcrsctlr26"; - case REG_TRCSSCSR2: return "trcsscsr2"; - case REG_TRCRSCTLR11: return "trcrsctlr11"; - case REG_TRCRSCTLR27: return "trcrsctlr27"; - case REG_TRCSSCSR3: return "trcsscsr3"; - case REG_TRCRSCTLR12: return "trcrsctlr12"; - case REG_TRCRSCTLR28: return "trcrsctlr28"; - case REG_TRCSSCSR4: return "trcsscsr4"; - case REG_TRCRSCTLR13: return "trcrsctlr13"; - case REG_TRCRSCTLR29: return "trcrsctlr29"; - case REG_TRCSSCSR5: return "trcsscsr5"; - case REG_TRCRSCTLR14: return "trcrsctlr14"; - case REG_TRCRSCTLR30: return "trcrsctlr30"; - case REG_TRCSSCSR6: return "trcsscsr6"; - case REG_TRCRSCTLR15: return "trcrsctlr15"; - case REG_TRCRSCTLR31: return "trcrsctlr31"; - case REG_TRCSSCSR7: return "trcsscsr7"; - case REG_TRCACVR0: return "trcacvr0"; - case REG_TRCACVR8: return "trcacvr8"; - case REG_TRCACATR0: return "trcacatr0"; - case REG_TRCACATR8: return "trcacatr8"; - case REG_TRCDVCVR0: return "trcdvcvr0"; - case REG_TRCDVCVR4: return "trcdvcvr4"; - case REG_TRCDVCMR0: return "trcdvcmr0"; - case REG_TRCDVCMR4: return "trcdvcmr4"; - case REG_TRCACVR1: return "trcacvr1"; - case REG_TRCACVR9: return "trcacvr9"; - case REG_TRCACATR1: return "trcacatr1"; - case REG_TRCACATR9: return "trcacatr9"; - case REG_TRCACVR2: return "trcacvr2"; - case REG_TRCACVR10: return "trcacvr10"; - case REG_TRCACATR2: return "trcacatr2"; - case REG_TRCACATR10: return "trcacatr10"; - case REG_TRCDVCVR1: return "trcdvcvr1"; - case REG_TRCDVCVR5: return "trcdvcvr5"; - case REG_TRCDVCMR1: return "trcdvcmr1"; - case REG_TRCDVCMR5: return "trcdvcmr5"; - case REG_TRCACVR3: return "trcacvr3"; - case REG_TRCACVR11: return "trcacvr11"; - case REG_TRCACATR3: return "trcacatr3"; - case REG_TRCACATR11: return "trcacatr11"; - case REG_TRCACVR4: return "trcacvr4"; - case REG_TRCACVR12: return "trcacvr12"; - case REG_TRCACATR4: return "trcacatr4"; - case REG_TRCACATR12: return "trcacatr12"; - case REG_TRCDVCVR2: return "trcdvcvr2"; - case REG_TRCDVCVR6: return "trcdvcvr6"; - case REG_TRCDVCMR2: return "trcdvcmr2"; - case REG_TRCDVCMR6: return "trcdvcmr6"; - case REG_TRCACVR5: return "trcacvr5"; - case REG_TRCACVR13: return "trcacvr13"; - case REG_TRCACATR5: return "trcacatr5"; - case REG_TRCACATR13: return "trcacatr13"; - case REG_TRCACVR6: return "trcacvr6"; - case REG_TRCACVR14: return "trcacvr14"; - case REG_TRCACATR6: return "trcacatr6"; - case REG_TRCACATR14: return "trcacatr14"; - case REG_TRCDVCVR3: return "trcdvcvr3"; - case REG_TRCDVCVR7: return "trcdvcvr7"; - case REG_TRCDVCMR3: return "trcdvcmr3"; - case REG_TRCDVCMR7: return "trcdvcmr7"; - case REG_TRCACVR7: return "trcacvr7"; - case REG_TRCACVR15: return "trcacvr15"; - case REG_TRCACATR7: return "trcacatr7"; - case REG_TRCACATR15: return "trcacatr15"; - case REG_TRCCIDCVR0: return "trccidcvr0"; - case REG_TRCVMIDCVR0: return "trcvmidcvr0"; - case REG_TRCCIDCCTLR0: return "trccidcctlr0"; - case REG_TRCCIDCCTLR1: return "trccidcctlr1"; - case REG_TRCCIDCVR1: return "trccidcvr1"; - case REG_TRCVMIDCVR1: return "trcvmidcvr1"; - case REG_TRCVMIDCCTLR0: return "trcvmidcctlr0"; - case REG_TRCVMIDCCTLR1: return "trcvmidcctlr1"; - case REG_TRCCIDCVR2: return "trccidcvr2"; - case REG_TRCVMIDCVR2: return "trcvmidcvr2"; - case REG_TRCCIDCVR3: return "trccidcvr3"; - case REG_TRCVMIDCVR3: return "trcvmidcvr3"; - case REG_TRCCIDCVR4: return "trccidcvr4"; - case REG_TRCVMIDCVR4: return "trcvmidcvr4"; - case REG_TRCCIDCVR5: return "trccidcvr5"; - case REG_TRCVMIDCVR5: return "trcvmidcvr5"; - case REG_TRCCIDCVR6: return "trccidcvr6"; - case REG_TRCVMIDCVR6: return "trcvmidcvr6"; - case REG_TRCCIDCVR7: return "trccidcvr7"; - case REG_TRCVMIDCVR7: return "trcvmidcvr7"; - case REG_TRCITCTRL: return "trcitctrl"; - case REG_TRCCLAIMSET: return "trcclaimset"; - case REG_TRCCLAIMCLR: return "trcclaimclr"; - case REG_TRCLAR: return "trclar"; - case REG_TEECR32_EL1: return "teecr32_el1"; - case REG_TEEHBR32_EL1: return "teehbr32_el1"; - case REG_MDCCSR_EL0: return "mdccsr_el0"; - case REG_MDDTR_EL0: return "mddtr_el0"; - case REG_MDDTRTX_EL0: return "mddtrtx_el0"; - case REG_DBGVCR32_EL2: return "dbgvcr32_el2"; - case REG_MIDR_EL1: return "midr_el1"; - case REG_MPIDR_EL1: return "mpidr_el1"; - case REG_REVIDR_EL1: return "revidr_el1"; - case REG_ID_PFR0_EL1: return "id_pfr0_el1"; - case REG_ID_PFR1_EL1: return "id_pfr1_el1"; - case REG_ID_DFR0_EL1: return "id_dfr0_el1"; - case REG_ID_AFR0_EL1: return "id_afr0_el1"; - case REG_ID_MMFR0_EL1: return "id_mmfr0_el1"; - case REG_ID_MMFR1_EL1: return "id_mmfr1_el1"; - case REG_ID_MMFR2_EL1: return "id_mmfr2_el1"; - case REG_ID_MMFR3_EL1: return "id_mmfr3_el1"; - case REG_ID_ISAR0_EL1: return "id_isar0_el1"; - case REG_ID_ISAR1_EL1: return "id_isar1_el1"; - case REG_ID_ISAR2_EL1: return "id_isar2_el1"; - case REG_ID_ISAR3_EL1: return "id_isar3_el1"; - case REG_ID_ISAR4_EL1: return "id_isar4_el1"; - case REG_ID_ISAR5_EL1: return "id_isar5_el1"; - case REG_ID_MMFR4_EL1: return "id_mmfr4_el1"; - case REG_ID_ISAR6_EL1: return "id_isar6_el1"; - case REG_MVFR0_EL1: return "mvfr0_el1"; - case REG_MVFR1_EL1: return "mvfr1_el1"; - case REG_MVFR2_EL1: return "mvfr2_el1"; - case REG_ID_AA32RES3_EL1: return "id_aa32res3_el1"; - case REG_ID_PFR2_EL1: return "id_pfr2_el1"; - case REG_ID_AA32RES5_EL1: return "id_aa32res5_el1"; - case REG_ID_AA32RES6_EL1: return "id_aa32res6_el1"; - case REG_ID_AA32RES7_EL1: return "id_aa32res7_el1"; - case REG_ID_AA64PFR0_EL1: return "id_aa64pfr0_el1"; - case REG_ID_AA64PFR1_EL1: return "id_aa64pfr1_el1"; - case REG_ID_AA64PFR2_EL1: return "id_aa64pfr2_el1"; - case REG_ID_AA64PFR3_EL1: return "id_aa64pfr3_el1"; - case REG_ID_AA64ZFR0_EL1: return "id_aa64zfr0_el1"; - case REG_ID_AA64SMFR0_EL1: return "id_aa64smfr0_el1"; - case REG_ID_AA64ZFR2_EL1: return "id_aa64zfr2_el1"; - case REG_ID_AA64ZFR3_EL1: return "id_aa64zfr3_el1"; - case REG_ID_AA64DFR0_EL1: return "id_aa64dfr0_el1"; - case REG_ID_AA64DFR1_EL1: return "id_aa64dfr1_el1"; - case REG_ID_AA64DFR2_EL1: return "id_aa64dfr2_el1"; - case REG_ID_AA64DFR3_EL1: return "id_aa64dfr3_el1"; - case REG_ID_AA64AFR0_EL1: return "id_aa64afr0_el1"; - case REG_ID_AA64AFR1_EL1: return "id_aa64afr1_el1"; - case REG_ID_AA64AFR2_EL1: return "id_aa64afr2_el1"; - case REG_ID_AA64AFR3_EL1: return "id_aa64afr3_el1"; - case REG_ID_AA64ISAR0_EL1: return "id_aa64isar0_el1"; - case REG_ID_AA64ISAR1_EL1: return "id_aa64isar1_el1"; - case REG_ID_AA64ISAR2_EL1: return "id_aa64isar2_el1"; - case REG_ID_AA64ISAR3_EL1: return "id_aa64isar3_el1"; - case REG_ID_AA64ISAR4_EL1: return "id_aa64isar4_el1"; - case REG_ID_AA64ISAR5_EL1: return "id_aa64isar5_el1"; - case REG_ID_AA64ISAR6_EL1: return "id_aa64isar6_el1"; - case REG_ID_AA64ISAR7_EL1: return "id_aa64isar7_el1"; - case REG_ID_AA64MMFR0_EL1: return "id_aa64mmfr0_el1"; - case REG_ID_AA64MMFR1_EL1: return "id_aa64mmfr1_el1"; - case REG_ID_AA64MMFR2_EL1: return "id_aa64mmfr2_el1"; - case REG_ID_AA64MMFR3_EL1: return "id_aa64mmfr3_el1"; - case REG_ID_AA64MMFR4_EL1: return "id_aa64mmfr4_el1"; - case REG_ID_AA64MMFR5_EL1: return "id_aa64mmfr5_el1"; - case REG_ID_AA64MMFR6_EL1: return "id_aa64mmfr6_el1"; - case REG_ID_AA64MMFR7_EL1: return "id_aa64mmfr7_el1"; - case REG_SCTLR_EL21: return "sctlr_el21"; - case REG_ACTLR_EL21: return "actlr_el21"; - case REG_CPTR_EL21: return "cptr_el21"; - case REG_RGSR_EL1: return "rgsr_el1"; - case REG_GCR_EL1: return "gcr_el1"; - case REG_TRFCR_EL1: return "trfcr_el1"; - case REG_SMPRI_EL1: return "smpri_el1"; - case REG_SMCR_EL21: return "smcr_el21"; - case REG_TTBR0_EL21: return "ttbr0_el21"; - case REG_TTBR1_EL21: return "ttbr1_el21"; - case REG_TCR_EL21: return "tcr_el21"; - case REG_APIAKEYLO_EL21: return "apiakeylo_el21"; - case REG_APIAKEYHI_EL21: return "apiakeyhi_el21"; - case REG_APIBKEYLO_EL21: return "apibkeylo_el21"; - case REG_APIBKEYHI_EL21: return "apibkeyhi_el21"; - case REG_APDAKEYLO_EL21: return "apdakeylo_el21"; - case REG_APDAKEYHI_EL21: return "apdakeyhi_el21"; - case REG_APDBKEYLO_EL21: return "apdbkeylo_el21"; - case REG_APDBKEYHI_EL21: return "apdbkeyhi_el21"; - case REG_APGAKEYLO_EL21: return "apgakeylo_el21"; - case REG_APGAKEYHI_EL21: return "apgakeyhi_el21"; - case REG_SPSR_EL21: return "spsr_el21"; - case REG_ELR_EL21: return "elr_el21"; - case REG_SP_EL0: return "sp_el0"; - case REG_SPSEL: return "spsel"; - case REG_NESTEDCURRENTEL: return "nestedcurrentel"; - case REG_PAN: return "pan"; - case REG_UAO: return "uao"; - case REG_ICV_PMR_EL1: return "icv_pmr_el1"; - case REG_AFSR0_EL21: return "afsr0_el21"; - case REG_AFSR1_EL21: return "afsr1_el21"; - case REG_ESR_EL21: return "esr_el21"; - case REG_ERRIDR_EL1: return "erridr_el1"; - case REG_ERRSELR_EL1: return "errselr_el1"; - case REG_ERXCTLR_EL1: return "erxctlr_el1"; - case REG_ERXSTATUS_EL1: return "erxstatus_el1"; - case REG_ERXADDR_EL1: return "erxaddr_el1"; - case REG_ERXPFGCTL_EL1: return "erxpfgctl_el1"; - case REG_ERXPFGCDN_EL1: return "erxpfgcdn_el1"; - case REG_ERXMISC0_EL1: return "erxmisc0_el1"; - case REG_ERXMISC1_EL1: return "erxmisc1_el1"; - case REG_ERXMISC2_EL1: return "erxmisc2_el1"; - case REG_ERXMISC3_EL1: return "erxmisc3_el1"; - case REG_ERXTS_EL1: return "erxts_el1"; - case REG_TFSR_EL1: return "tfsr_el1"; - case REG_TFSRE0_EL1: return "tfsre0_el1"; - case REG_FAR_EL21: return "far_el21"; - case REG_PAR_EL1: return "par_el1"; - case REG_PMSCR_EL1: return "pmscr_el1"; - case REG_PMSICR_EL1: return "pmsicr_el1"; - case REG_PMSIRR_EL1: return "pmsirr_el1"; - case REG_PMSFCR_EL1: return "pmsfcr_el1"; - case REG_PMSEVFR_EL1: return "pmsevfr_el1"; - case REG_PMSLATFR_EL1: return "pmslatfr_el1"; - case REG_PMSIDR_EL1: return "pmsidr_el1"; - case REG_PMBLIMITR_EL1: return "pmblimitr_el1"; - case REG_PMBPTR_EL1: return "pmbptr_el1"; - case REG_PMBSR_EL1: return "pmbsr_el1"; - case REG_PMBIDR_EL1: return "pmbidr_el1"; - case REG_TRBLIMITR_EL1: return "trblimitr_el1"; - case REG_TRBPTR_EL1: return "trbptr_el1"; - case REG_TRBBASER_EL1: return "trbbaser_el1"; - case REG_TRBSR_EL1: return "trbsr_el1"; - case REG_TRBMAR_EL1: return "trbmar_el1"; - case REG_TRBTRG_EL1: return "trbtrg_el1"; - case REG_PMINTENSET_EL1: return "pmintenset_el1"; - case REG_PMINTENCLR_EL1: return "pmintenclr_el1"; - case REG_PMMIR_EL1: return "pmmir_el1"; - case REG_MAIR_EL21: return "mair_el21"; - case REG_AMAIR_EL21: return "amair_el21"; - case REG_LORSA_EL1: return "lorsa_el1"; - case REG_LOREA_EL1: return "lorea_el1"; - case REG_LORN_EL1: return "lorn_el1"; - case REG_LORC_EL1: return "lorc_el1"; - case REG_LORID_EL1: return "lorid_el1"; - case REG_MPAM1_EL1: return "mpam1_el1"; - case REG_MPAM0_EL1: return "mpam0_el1"; - case REG_CTRR_C_LWR_EL21: return "ctrr_c_lwr_el21"; - case REG_CTRR_C_UPR_EL21: return "ctrr_c_upr_el21"; - case REG_CTRR_D_LWR_EL21: return "ctrr_d_lwr_el21"; - case REG_CTRR_D_UPR_EL21: return "ctrr_d_upr_el21"; - case REG_CTRR_C_LWR_EL12: return "ctrr_c_lwr_el12"; - case REG_CTRR_C_UPR_EL12: return "ctrr_c_upr_el12"; - case REG_CTRR_D_LWR_EL12: return "ctrr_d_lwr_el12"; - case REG_CTRR_D_UPR_EL12: return "ctrr_d_upr_el12"; - case REG_CTRR_C_LWR_EL2: return "ctrr_c_lwr_el2"; - case REG_CTRR_C_UPR_EL2: return "ctrr_c_upr_el2"; - case REG_CTRR_D_LWR_EL2: return "ctrr_d_lwr_el2"; - case REG_CTRR_D_UPR_EL2: return "ctrr_d_upr_el2"; - case REG_CTRR_C_CTL_EL21: return "ctrr_c_ctl_el21"; - case REG_CTRR_D_CTL_EL21: return "ctrr_d_ctl_el21"; - case REG_CTRR_C_CTL_EL12: return "ctrr_c_ctl_el12"; - case REG_CTRR_D_CTL_EL12: return "ctrr_d_ctl_el12"; - case REG_CTRR_C_CTL_EL2: return "ctrr_c_ctl_el2"; - case REG_CTRR_D_CTL_EL2: return "ctrr_d_ctl_el2"; - case REG_CTXR_A_LWR_EL21: return "ctxr_a_lwr_el21"; - case REG_CTXR_A_UPR_EL21: return "ctxr_a_upr_el21"; - case REG_CTXR_B_LWR_EL21: return "ctxr_b_lwr_el21"; - case REG_CTXR_B_UPR_EL21: return "ctxr_b_upr_el21"; - case REG_CTXR_C_LWR_EL21: return "ctxr_c_lwr_el21"; - case REG_CTXR_C_UPR_EL21: return "ctxr_c_upr_el21"; - case REG_CTXR_D_LWR_EL21: return "ctxr_d_lwr_el21"; - case REG_CTXR_D_UPR_EL21: return "ctxr_d_upr_el21"; - case REG_CTXR_A_LWR_EL12: return "ctxr_a_lwr_el12"; - case REG_CTXR_A_UPR_EL12: return "ctxr_a_upr_el12"; - case REG_CTXR_B_LWR_EL12: return "ctxr_b_lwr_el12"; - case REG_CTXR_B_UPR_EL12: return "ctxr_b_upr_el12"; - case REG_CTXR_C_LWR_EL12: return "ctxr_c_lwr_el12"; - case REG_CTXR_C_UPR_EL12: return "ctxr_c_upr_el12"; - case REG_CTXR_D_LWR_EL12: return "ctxr_d_lwr_el12"; - case REG_CTXR_D_UPR_EL12: return "ctxr_d_upr_el12"; - case REG_CTXR_A_LWR_EL2: return "ctxr_a_lwr_el2"; - case REG_CTXR_A_UPR_EL2: return "ctxr_a_upr_el2"; - case REG_CTXR_B_LWR_EL2: return "ctxr_b_lwr_el2"; - case REG_CTXR_B_UPR_EL2: return "ctxr_b_upr_el2"; - case REG_CTXR_C_LWR_EL2: return "ctxr_c_lwr_el2"; - case REG_CTXR_C_UPR_EL2: return "ctxr_c_upr_el2"; - case REG_CTXR_D_LWR_EL2: return "ctxr_d_lwr_el2"; - case REG_CTXR_D_UPR_EL2: return "ctxr_d_upr_el2"; - case REG_CTXR_A_CTL_EL21: return "ctxr_a_ctl_el21"; - case REG_CTXR_B_CTL_EL21: return "ctxr_b_ctl_el21"; - case REG_CTXR_C_CTL_EL21: return "ctxr_c_ctl_el21"; - case REG_CTXR_D_CTL_EL21: return "ctxr_d_ctl_el21"; - case REG_CTXR_A_CTL_EL12: return "ctxr_a_ctl_el12"; - case REG_CTXR_B_CTL_EL12: return "ctxr_b_ctl_el12"; - case REG_CTXR_C_CTL_EL12: return "ctxr_c_ctl_el12"; - case REG_CTXR_D_CTL_EL12: return "ctxr_d_ctl_el12"; - case REG_CTXR_A_CTL_EL2: return "ctxr_a_ctl_el2"; - case REG_CTXR_B_CTL_EL2: return "ctxr_b_ctl_el2"; - case REG_CTXR_C_CTL_EL2: return "ctxr_c_ctl_el2"; - case REG_CTXR_D_CTL_EL2: return "ctxr_d_ctl_el2"; - case REG_ACC_CTRR_C_LWR_EL2: return "acc_ctrr_c_lwr_el2"; - case REG_ACC_CTRR_C_UPR_EL2: return "acc_ctrr_c_upr_el2"; - case REG_ACC_CTRR_D_LWR_EL2: return "acc_ctrr_d_lwr_el2"; - case REG_ACC_CTRR_D_UPR_EL2: return "acc_ctrr_d_upr_el2"; - case REG_ACC_CTXR_A_LWR_EL2: return "acc_ctxr_a_lwr_el2"; - case REG_ACC_CTXR_A_UPR_EL2: return "acc_ctxr_a_upr_el2"; - case REG_ACC_CTXR_B_LWR_EL2: return "acc_ctxr_b_lwr_el2"; - case REG_ACC_CTXR_B_UPR_EL2: return "acc_ctxr_b_upr_el2"; - case REG_ACC_CTXR_C_LWR_EL2: return "acc_ctxr_c_lwr_el2"; - case REG_ACC_CTXR_C_UPR_EL2: return "acc_ctxr_c_upr_el2"; - case REG_ACC_CTXR_D_LWR_EL2: return "acc_ctxr_d_lwr_el2"; - case REG_ACC_CTXR_D_UPR_EL2: return "acc_ctxr_d_upr_el2"; - case REG_ACC_CTRR_C_CTL_EL2: return "acc_ctrr_c_ctl_el2"; - case REG_ACC_CTRR_D_CTL_EL2: return "acc_ctrr_d_ctl_el2"; - case REG_ACC_CTXR_A_CTL_EL2: return "acc_ctxr_a_ctl_el2"; - case REG_ACC_CTXR_B_CTL_EL2: return "acc_ctxr_b_ctl_el2"; - case REG_ACC_CTXR_C_CTL_EL2: return "acc_ctxr_c_ctl_el2"; - case REG_ACC_CTXR_D_CTL_EL2: return "acc_ctxr_d_ctl_el2"; - case REG_VBAR_EL21: return "vbar_el21"; - case REG_RVBAR_EL1: return "rvbar_el1"; - case REG_RMR_EL1: return "rmr_el1"; - case REG_ISR_EL1: return "isr_el1"; - case REG_DISR_EL1: return "disr_el1"; - case REG_ICV_IAR0_EL1: return "icv_iar0_el1"; - case REG_ICV_EOIR0_EL1: return "icv_eoir0_el1"; - case REG_ICV_HPPIR0_EL1: return "icv_hppir0_el1"; - case REG_ICV_BPR0_EL1: return "icv_bpr0_el1"; - case REG_ICC_AP0R0_EL1: return "icc_ap0r0_el1"; - case REG_ICC_AP0R1_EL1: return "icc_ap0r1_el1"; - case REG_ICC_AP0R2_EL1: return "icc_ap0r2_el1"; - case REG_ICC_AP0R3_EL1: return "icc_ap0r3_el1"; - case REG_ICC_AP1R0_EL1: return "icc_ap1r0_el1"; - case REG_ICC_AP1R1_EL1: return "icc_ap1r1_el1"; - case REG_ICC_AP1R2_EL1: return "icc_ap1r2_el1"; - case REG_ICC_AP1R3_EL1: return "icc_ap1r3_el1"; - case REG_ICV_DIR_EL1: return "icv_dir_el1"; - case REG_ICV_RPR_EL1: return "icv_rpr_el1"; - case REG_ICC_SGI1R_EL1: return "icc_sgi1r_el1"; - case REG_ICC_ASGI1R_EL1: return "icc_asgi1r_el1"; - case REG_ICC_SGI0R_EL1: return "icc_sgi0r_el1"; - case REG_ICV_IAR1_EL1: return "icv_iar1_el1"; - case REG_ICV_EOIR1_EL1: return "icv_eoir1_el1"; - case REG_ICV_HPPIR1_EL1: return "icv_hppir1_el1"; - case REG_ICV_BPR1_EL1: return "icv_bpr1_el1"; - case REG_ICV_CTLR_EL1: return "icv_ctlr_el1"; - case REG_ICC_SRE_EL1: return "icc_sre_el1"; - case REG_ICV_IGRPEN0_EL1: return "icv_igrpen0_el1"; - case REG_ICV_IGRPEN1_EL1: return "icv_igrpen1_el1"; - case REG_ICC_SEIEN_EL1: return "icc_seien_el1"; - case REG_CONTEXTIDR_EL21: return "contextidr_el21"; - case REG_TPIDR_EL1: return "tpidr_el1"; - case REG_SCXTNUM_EL21: return "scxtnum_el21"; - case REG_REDIR_CNTKCTL_EL1: return "redir_cntkctl_el1"; - case REG_HID0: return "hid0"; - case REG_HID25: return "hid25"; - case REG_HID26: return "hid26"; - case REG_HID27: return "hid27"; - case REG_HID28: return "hid28"; - case REG_HID29: return "hid29"; - case REG_HID34: return "hid34"; - case REG_HID1: return "hid1"; - case REG_HID21: return "hid21"; - case REG_BIUVCSCUPCMDCRD: return "biuvcscupcmdcrd"; - case REG_BIUVCSCUPDATCRD: return "biuvcscupdatcrd"; - case REG_HID2: return "hid2"; - case REG_HID30: return "hid30"; - case REG_HID31: return "hid31"; - case REG_HID32: return "hid32"; - case REG_HID33: return "hid33"; - case REG_HID3: return "hid3"; - case REG_BIUVCSCUPCMDCRDC2: return "biuvcscupcmdcrdc2"; - case REG_BIUVCSCUPDATCRDC2: return "biuvcscupdatcrdc2"; - case REG_HID4: return "hid4"; - case REG_HID5: return "hid5"; - case REG_HID6: return "hid6"; - case REG_HID7: return "hid7"; - case REG_HID8: return "hid8"; - case REG_HID9: return "hid9"; - case REG_HID10: return "hid10"; - case REG_BLOCK_CMAINT_CFG: return "block_cmaint_cfg"; - case REG_HID11: return "hid11"; - case REG_HID18: return "hid18"; - case REG_HID36: return "hid36"; - case REG_HID37: return "hid37"; - case REG_HID12: return "hid12"; - case REG_HID15: return "hid15"; - case REG_HID19: return "hid19"; - case REG_BIU_TLIMIT: return "biu_tlimit"; - case REG_HID13: return "hid13"; - case REG_HID_RCTX_G0CTL: return "hid_rctx_g0ctl"; - case REG_HID_RCTX_G1CTL: return "hid_rctx_g1ctl"; - case REG_HID14: return "hid14"; - case REG_HID16: return "hid16"; - case REG_LLC_WRR2: return "llc_wrr2"; - case REG_BIU_AFI_CFG: return "biu_afi_cfg"; - case REG_HID17: return "hid17"; - case REG_HID24: return "hid24"; - case REG_HID35: return "hid35"; - case REG_CCSIDRPL1_I_EL1: return "ccsidrpl1_i_el1"; - case REG_CLIDR_EL1: return "clidr_el1"; - case REG_SMIDR_EL1: return "smidr_el1"; - case REG_AIDR_EL1: return "aidr_el1"; - case REG_PMCR0_EL1: return "pmcr0_el1"; - case REG_APPL_CONTEXTPTR: return "appl_contextptr"; - case REG_LD_LATPROF_CTL_EL21: return "ld_latprof_ctl_el21"; - case REG_AON_CPU_MSTALL_CTL01_EL1: return "aon_cpu_mstall_ctl01_el1"; - case REG_PM_MEMFLT_CTL23_EL1: return "pm_memflt_ctl23_el1"; - case REG_REDIR_ACNTV_CTL_EL0: return "redir_acntv_ctl_el0"; - case REG_LCL_ACNTVCTSS_NOREDIR_EL0: return "lcl_acntvctss_noredir_el0"; - case REG_PMCR1_EL21: return "pmcr1_el21"; - case REG_LD_LATPROF_CTR_EL1: return "ld_latprof_ctr_el1"; - case REG_AON_CPU_MSTALL_CTL23_EL1: return "aon_cpu_mstall_ctl23_el1"; - case REG_PM_MEMFLT_CTL45_EL1: return "pm_memflt_ctl45_el1"; - case REG_AGTCNTRDIR_EL21: return "agtcntrdir_el21"; - case REG_AGTCNTKCTL_NOREDIR_EL1: return "agtcntkctl_noredir_el1"; - case REG_PMCR2_EL1: return "pmcr2_el1"; - case REG_LD_LATPROF_STS_EL1: return "ld_latprof_sts_el1"; - case REG_AON_CPU_MSTALL_CTL45_EL1: return "aon_cpu_mstall_ctl45_el1"; - case REG_REDIR_ACNTHP_CVAL_EL2: return "redir_acnthp_cval_el2"; - case REG_LCL_CNTVCT_NOREDIR_EL0: return "lcl_cntvct_noredir_el0"; - case REG_AGTCNTP_CVAL_NOREDIR_EL0: return "agtcntp_cval_noredir_el0"; - case REG_PMCR3_EL1: return "pmcr3_el1"; - case REG_LD_LATPROF_INF_EL1: return "ld_latprof_inf_el1"; - case REG_AON_CPU_MSTALL_CTL67_EL1: return "aon_cpu_mstall_ctl67_el1"; - case REG_REDIR_ACNTHP_TVAL_EL2: return "redir_acnthp_tval_el2"; - case REG_LCL_CNTPCTSS_NOREDIR_EL0: return "lcl_cntpctss_noredir_el0"; - case REG_AGTCNTP_TVAL_NOREDIR_EL0: return "agtcntp_tval_noredir_el0"; - case REG_PMCR4_EL1: return "pmcr4_el1"; - case REG_LD_LATPROF_CTL_EL2: return "ld_latprof_ctl_el2"; - case REG_AON_CPU_MEMFLT_CTL01_EL1: return "aon_cpu_memflt_ctl01_el1"; - case REG_REDIR_ACNTHP_CTL_EL2: return "redir_acnthp_ctl_el2"; - case REG_LCL_CNTVCTSS_NOREDIR_EL0: return "lcl_cntvctss_noredir_el0"; - case REG_AGTCNTP_CTL_NOREDIR_EL0: return "agtcntp_ctl_noredir_el0"; - case REG_PMESR0_EL1: return "pmesr0_el1"; - case REG_LD_LATPROF_CMD_EL1: return "ld_latprof_cmd_el1"; - case REG_AON_CPU_MEMFLT_CTL23_EL1: return "aon_cpu_memflt_ctl23_el1"; - case REG_REDIR_ACNTHV_CVAL_EL2: return "redir_acnthv_cval_el2"; - case REG_AGTCNTV_CVAL_NOREDIR_EL0: return "agtcntv_cval_noredir_el0"; - case REG_PMESR1_EL1: return "pmesr1_el1"; - case REG_PMCR1_EL2: return "pmcr1_el2"; - case REG_AON_CPU_MEMFLT_CTL45_EL1: return "aon_cpu_memflt_ctl45_el1"; - case REG_REDIR_ACNTHV_TVAL_EL2: return "redir_acnthv_tval_el2"; - case REG_CNTKCTL_NOREDIR_EL1: return "cntkctl_noredir_el1"; - case REG_AGTCNTV_TVAL_NOREDIR_EL0: return "agtcntv_tval_noredir_el0"; - case REG_OPMAT0_EL1: return "opmat0_el1"; - case REG_PMCR1_EL12: return "pmcr1_el12"; - case REG_AON_CPU_MEMFLT_CTL67_EL1: return "aon_cpu_memflt_ctl67_el1"; - case REG_REDIR_ACNTHV_CTL_EL2: return "redir_acnthv_ctl_el2"; - case REG_CNTP_CVAL_NOREDIR_EL0: return "cntp_cval_noredir_el0"; - case REG_AGTCNTV_CTL_NOREDIR_EL0: return "agtcntv_ctl_noredir_el0"; - case REG_OPMAT1_EL1: return "opmat1_el1"; - case REG_PMCR1_GL12: return "pmcr1_gl12"; - case REG_AON_CPU_MSTALL_CTR0_EL1: return "aon_cpu_mstall_ctr0_el1"; - case REG_REDIR_ACNTFRQ_EL0: return "redir_acntfrq_el0"; - case REG_CNTP_TVAL_NOREDIR_EL0: return "cntp_tval_noredir_el0"; - case REG_LCL_CNTPCT_NOREDIR_EL0: return "lcl_cntpct_noredir_el0"; - case REG_OPMSK0_EL1: return "opmsk0_el1"; - case REG_LD_LATPROF_CTL_EL12: return "ld_latprof_ctl_el12"; - case REG_AON_CPU_MSTALL_CTR1_EL1: return "aon_cpu_mstall_ctr1_el1"; - case REG_AGTCNTVOFF_EL2: return "agtcntvoff_el2"; - case REG_CNTP_CTL_NOREDIR_EL0: return "cntp_ctl_noredir_el0"; - case REG_CNTV_CTL_NOREDIR_EL0: return "cntv_ctl_noredir_el0"; - case REG_OPMSK1_EL1: return "opmsk1_el1"; - case REG_LD_LATPROF_INF_EL2: return "ld_latprof_inf_el2"; - case REG_AON_CPU_MSTALL_CTR2_EL1: return "aon_cpu_mstall_ctr2_el1"; - case REG_REDIR_ACNTP_CVAL_EL0: return "redir_acntp_cval_el0"; - case REG_CNTV_CVAL_NOREDIR_EL0: return "cntv_cval_noredir_el0"; - case REG_LCL_ACNTPCT_NOREDIR_EL0: return "lcl_acntpct_noredir_el0"; - case REG_AON_CPU_MSTALL_CTR3_EL1: return "aon_cpu_mstall_ctr3_el1"; - case REG_REDIR_ACNTP_TVAL_EL0: return "redir_acntp_tval_el0"; - case REG_CNTV_TVAL_NOREDIR_EL0: return "cntv_tval_noredir_el0"; - case REG_VMSA_HV_LOCK_EL2: return "vmsa_hv_lock_el2"; - case REG_PMSWCTRL_EL1: return "pmswctrl_el1"; - case REG_PMCR5_EL0: return "pmcr5_el0"; - case REG_AON_CPU_MSTALL_CTR4_EL1: return "aon_cpu_mstall_ctr4_el1"; - case REG_PMCOMPARE0_EL1: return "pmcompare0_el1"; - case REG_PMCOMPARE1_EL1: return "pmcompare1_el1"; - case REG_VMSA_NV_LOCK_EL2: return "vmsa_nv_lock_el2"; - case REG_PMSR_EL1: return "pmsr_el1"; - case REG_AON_CPU_MSTALL_CTR5_EL1: return "aon_cpu_mstall_ctr5_el1"; - case REG_REDIR_ACNTP_CTL_EL0: return "redir_acntp_ctl_el0"; - case REG_PMCOMPARE5_EL1: return "pmcompare5_el1"; - case REG_PMCOMPARE6_EL1: return "pmcompare6_el1"; - case REG_PMCOMPARE7_EL1: return "pmcompare7_el1"; - case REG_PMCR_BVRNG4_EL1: return "pmcr_bvrng4_el1"; - case REG_PM_PMI_PC: return "pm_pmi_pc"; - case REG_AON_CPU_MSTALL_CTR6_EL1: return "aon_cpu_mstall_ctr6_el1"; - case REG_REDIR_ACNTV_CVAL_EL0: return "redir_acntv_cval_el0"; - case REG_LCL_ACNTVCT_NOREDIR_EL0: return "lcl_acntvct_noredir_el0"; - case REG_PMCR_BVRNG5_EL1: return "pmcr_bvrng5_el1"; - case REG_AON_CPU_MSTALL_CTR7_EL1: return "aon_cpu_mstall_ctr7_el1"; - case REG_REDIR_ACNTV_TVAL_EL0: return "redir_acntv_tval_el0"; - case REG_LCL_ACNTPCTSS_NOREDIR_EL0: return "lcl_acntpctss_noredir_el0"; - case REG_CSSELR_EL1: return "csselr_el1"; - case REG_PMC0: return "pmc0"; - case REG_UPMCFILTER0: return "upmcfilter0"; - case REG_UPMCFILTER1: return "upmcfilter1"; - case REG_UPMCFILTER2: return "upmcfilter2"; - case REG_UPMCFILTER3: return "upmcfilter3"; - case REG_UPMCFILTER4: return "upmcfilter4"; - case REG_UPMCFILTER5: return "upmcfilter5"; - case REG_UPMCFILTER6: return "upmcfilter6"; - case REG_PMC1: return "pmc1"; - case REG_UPMCFILTER7: return "upmcfilter7"; - case REG_PMC2: return "pmc2"; - case REG_PMC3: return "pmc3"; - case REG_PMC4: return "pmc4"; - case REG_PMC5: return "pmc5"; - case REG_PMC6: return "pmc6"; - case REG_PMC7: return "pmc7"; - case REG_PMC8: return "pmc8"; - case REG_PMC9: return "pmc9"; - case REG_PMTRHLD6_EL1: return "pmtrhld6_el1"; - case REG_PMTRHLD4_EL1: return "pmtrhld4_el1"; - case REG_PMTRHLD2_EL1: return "pmtrhld2_el1"; - case REG_PMMMAP_EL1: return "pmmmap_el1"; - case REG_CTR_EL0: return "ctr_el0"; - case REG_DCZID_EL0: return "dczid_el0"; - case REG_NZCV: return "nzcv"; - case REG_DAIF: return "daif"; - case REG_SVCR: return "svcr"; - case REG_DIT: return "dit"; - case REG_SSBS: return "ssbs"; - case REG_TCO: return "tco"; - case REG_FPCR: return "fpcr"; - case REG_FPSR: return "fpsr"; - case REG_DSPSR_EL0: return "dspsr_el0"; - case REG_DLR_EL0: return "dlr_el0"; - case REG_PMCR_EL0: return "pmcr_el0"; - case REG_PMCNTENSET_EL0: return "pmcntenset_el0"; - case REG_PMCNTENCLR_EL0: return "pmcntenclr_el0"; - case REG_PMOVSCLR_EL0: return "pmovsclr_el0"; - case REG_PMSWINC_EL0: return "pmswinc_el0"; - case REG_PMSELR_EL0: return "pmselr_el0"; - case REG_PMCCNTR_EL0: return "pmccntr_el0"; - case REG_PMXEVTYPER_EL0: return "pmxevtyper_el0"; - case REG_PMXEVCNTR_EL0: return "pmxevcntr_el0"; - case REG_DAIFCLR: return "daifclr"; - case REG_PMUSERENR_EL0: return "pmuserenr_el0"; - case REG_PMOVSSET_EL0: return "pmovsset_el0"; - case REG_TPIDR_EL0: return "tpidr_el0"; - case REG_TPIDRRO_EL0: return "tpidrro_el0"; - case REG_TPIDR2_EL0: return "tpidr2_el0"; - case REG_SCXTNUM_EL0: return "scxtnum_el0"; - case REG_AMCR_EL0: return "amcr_el0"; - case REG_AMUSERENR_EL0: return "amuserenr_el0"; - case REG_AMCNTENCLR0_EL0: return "amcntenclr0_el0"; - case REG_AMCNTENSET0_EL0: return "amcntenset0_el0"; - case REG_AMCNTENCLR1_EL0: return "amcntenclr1_el0"; - case REG_AMCNTENSET1_EL0: return "amcntenset1_el0"; - case REG_AMEVCNTR00_EL0: return "amevcntr00_el0"; - case REG_AMEVCNTR01_EL0: return "amevcntr01_el0"; - case REG_AMEVCNTR02_EL0: return "amevcntr02_el0"; - case REG_AMEVCNTR03_EL0: return "amevcntr03_el0"; - case REG_AMEVCNTR10_EL0: return "amevcntr10_el0"; - case REG_AMEVCNTR11_EL0: return "amevcntr11_el0"; - case REG_AMEVCNTR12_EL0: return "amevcntr12_el0"; - case REG_AMEVCNTR13_EL0: return "amevcntr13_el0"; - case REG_AMEVCNTR14_EL0: return "amevcntr14_el0"; - case REG_AMEVCNTR15_EL0: return "amevcntr15_el0"; - case REG_AMEVCNTR16_EL0: return "amevcntr16_el0"; - case REG_AMEVCNTR17_EL0: return "amevcntr17_el0"; - case REG_AMEVCNTR18_EL0: return "amevcntr18_el0"; - case REG_AMEVCNTR19_EL0: return "amevcntr19_el0"; - case REG_AMEVCNTR110_EL0: return "amevcntr110_el0"; - case REG_AMEVCNTR111_EL0: return "amevcntr111_el0"; - case REG_AMEVCNTR112_EL0: return "amevcntr112_el0"; - case REG_AMEVCNTR113_EL0: return "amevcntr113_el0"; - case REG_AMEVCNTR114_EL0: return "amevcntr114_el0"; - case REG_AMEVCNTR115_EL0: return "amevcntr115_el0"; - case REG_AMEVTYPER10_EL0: return "amevtyper10_el0"; - case REG_AMEVTYPER11_EL0: return "amevtyper11_el0"; - case REG_AMEVTYPER12_EL0: return "amevtyper12_el0"; - case REG_AMEVTYPER13_EL0: return "amevtyper13_el0"; - case REG_AMEVTYPER14_EL0: return "amevtyper14_el0"; - case REG_AMEVTYPER15_EL0: return "amevtyper15_el0"; - case REG_AMEVTYPER16_EL0: return "amevtyper16_el0"; - case REG_AMEVTYPER17_EL0: return "amevtyper17_el0"; - case REG_AMEVTYPER18_EL0: return "amevtyper18_el0"; - case REG_AMEVTYPER19_EL0: return "amevtyper19_el0"; - case REG_AMEVTYPER110_EL0: return "amevtyper110_el0"; - case REG_AMEVTYPER111_EL0: return "amevtyper111_el0"; - case REG_AMEVTYPER112_EL0: return "amevtyper112_el0"; - case REG_AMEVTYPER113_EL0: return "amevtyper113_el0"; - case REG_AMEVTYPER114_EL0: return "amevtyper114_el0"; - case REG_AMEVTYPER115_EL0: return "amevtyper115_el0"; - case REG_REDIR_CNTFRQ_EL0: return "redir_cntfrq_el0"; - case REG_REDIR_LCL_CNTPCT_EL0: return "redir_lcl_cntpct_el0"; - case REG_REDIR_LCL_CNTVCT_EL0: return "redir_lcl_cntvct_el0"; - case REG_REDIR_LCL_CNTPCTSS_EL0: return "redir_lcl_cntpctss_el0"; - case REG_REDIR_LCL_CNTVCTSS_EL0: return "redir_lcl_cntvctss_el0"; - case REG_REDIR_CNTP_TVAL_EL0: return "redir_cntp_tval_el0"; - case REG_REDIR_CNTP_CTL_EL0: return "redir_cntp_ctl_el0"; - case REG_REDIR_CNTP_CVAL_EL0: return "redir_cntp_cval_el0"; - case REG_REDIR_CNTV_TVAL_EL0: return "redir_cntv_tval_el0"; - case REG_REDIR_CNTV_CTL_EL0: return "redir_cntv_ctl_el0"; - case REG_REDIR_CNTV_CVAL_EL0: return "redir_cntv_cval_el0"; - case REG_PMEVCNTR0_EL0: return "pmevcntr0_el0"; - case REG_PMEVCNTR1_EL0: return "pmevcntr1_el0"; - case REG_PMEVCNTR2_EL0: return "pmevcntr2_el0"; - case REG_PMEVCNTR3_EL0: return "pmevcntr3_el0"; - case REG_PMEVCNTR4_EL0: return "pmevcntr4_el0"; - case REG_PMEVCNTR5_EL0: return "pmevcntr5_el0"; - case REG_PMEVCNTR6_EL0: return "pmevcntr6_el0"; - case REG_PMEVCNTR7_EL0: return "pmevcntr7_el0"; - case REG_PMEVCNTR8_EL0: return "pmevcntr8_el0"; - case REG_PMEVCNTR9_EL0: return "pmevcntr9_el0"; - case REG_PMEVCNTR10_EL0: return "pmevcntr10_el0"; - case REG_PMEVCNTR11_EL0: return "pmevcntr11_el0"; - case REG_PMEVCNTR12_EL0: return "pmevcntr12_el0"; - case REG_PMEVCNTR13_EL0: return "pmevcntr13_el0"; - case REG_PMEVCNTR14_EL0: return "pmevcntr14_el0"; - case REG_PMEVCNTR15_EL0: return "pmevcntr15_el0"; - case REG_PMEVCNTR16_EL0: return "pmevcntr16_el0"; - case REG_PMEVCNTR17_EL0: return "pmevcntr17_el0"; - case REG_PMEVCNTR18_EL0: return "pmevcntr18_el0"; - case REG_PMEVCNTR19_EL0: return "pmevcntr19_el0"; - case REG_PMEVCNTR20_EL0: return "pmevcntr20_el0"; - case REG_PMEVCNTR21_EL0: return "pmevcntr21_el0"; - case REG_PMEVCNTR22_EL0: return "pmevcntr22_el0"; - case REG_PMEVCNTR23_EL0: return "pmevcntr23_el0"; - case REG_PMEVCNTR24_EL0: return "pmevcntr24_el0"; - case REG_PMEVCNTR25_EL0: return "pmevcntr25_el0"; - case REG_PMEVCNTR26_EL0: return "pmevcntr26_el0"; - case REG_PMEVCNTR27_EL0: return "pmevcntr27_el0"; - case REG_PMEVCNTR28_EL0: return "pmevcntr28_el0"; - case REG_PMEVCNTR29_EL0: return "pmevcntr29_el0"; - case REG_PMEVCNTR30_EL0: return "pmevcntr30_el0"; - case REG_PMEVTYPER0_EL0: return "pmevtyper0_el0"; - case REG_PMEVTYPER1_EL0: return "pmevtyper1_el0"; - case REG_PMEVTYPER2_EL0: return "pmevtyper2_el0"; - case REG_PMEVTYPER3_EL0: return "pmevtyper3_el0"; - case REG_PMEVTYPER4_EL0: return "pmevtyper4_el0"; - case REG_PMEVTYPER5_EL0: return "pmevtyper5_el0"; - case REG_PMEVTYPER6_EL0: return "pmevtyper6_el0"; - case REG_PMEVTYPER7_EL0: return "pmevtyper7_el0"; - case REG_PMEVTYPER8_EL0: return "pmevtyper8_el0"; - case REG_PMEVTYPER9_EL0: return "pmevtyper9_el0"; - case REG_PMEVTYPER10_EL0: return "pmevtyper10_el0"; - case REG_PMEVTYPER11_EL0: return "pmevtyper11_el0"; - case REG_PMEVTYPER12_EL0: return "pmevtyper12_el0"; - case REG_PMEVTYPER13_EL0: return "pmevtyper13_el0"; - case REG_PMEVTYPER14_EL0: return "pmevtyper14_el0"; - case REG_PMEVTYPER15_EL0: return "pmevtyper15_el0"; - case REG_PMEVTYPER16_EL0: return "pmevtyper16_el0"; - case REG_PMEVTYPER17_EL0: return "pmevtyper17_el0"; - case REG_PMEVTYPER18_EL0: return "pmevtyper18_el0"; - case REG_PMEVTYPER19_EL0: return "pmevtyper19_el0"; - case REG_PMEVTYPER20_EL0: return "pmevtyper20_el0"; - case REG_PMEVTYPER21_EL0: return "pmevtyper21_el0"; - case REG_PMEVTYPER22_EL0: return "pmevtyper22_el0"; - case REG_PMEVTYPER23_EL0: return "pmevtyper23_el0"; - case REG_PMEVTYPER24_EL0: return "pmevtyper24_el0"; - case REG_PMEVTYPER25_EL0: return "pmevtyper25_el0"; - case REG_PMEVTYPER26_EL0: return "pmevtyper26_el0"; - case REG_PMEVTYPER27_EL0: return "pmevtyper27_el0"; - case REG_PMEVTYPER28_EL0: return "pmevtyper28_el0"; - case REG_PMEVTYPER29_EL0: return "pmevtyper29_el0"; - case REG_PMEVTYPER30_EL0: return "pmevtyper30_el0"; - case REG_PMCCFILTR_EL0: return "pmccfiltr_el0"; - case REG_LSU_ERR_STS: return "lsu_err_sts"; - case REG_AFLATCTL1_EL1: return "aflatctl1_el1"; - case REG_AFLATVALBIN0_EL1: return "aflatvalbin0_el1"; - case REG_AFLATINFLO_EL1: return "aflatinflo_el1"; - case REG_LSU_ERR_CTL: return "lsu_err_ctl"; - case REG_AFLATCTL2_EL1: return "aflatctl2_el1"; - case REG_AFLATVALBIN1_EL1: return "aflatvalbin1_el1"; - case REG_AFLATINFHI_EL1: return "aflatinfhi_el1"; - case REG_AFLATCTL3_EL1: return "aflatctl3_el1"; - case REG_AFLATVALBIN2_EL1: return "aflatvalbin2_el1"; - case REG_AFLATCTL4_EL1: return "aflatctl4_el1"; - case REG_AFLATVALBIN3_EL1: return "aflatvalbin3_el1"; - case REG_LLC_FILL_CTL: return "llc_fill_ctl"; - case REG_AFLATCTL5_LO_EL1: return "aflatctl5_lo_el1"; - case REG_AFLATVALBIN4_EL1: return "aflatvalbin4_el1"; - case REG_AFLATCTL5_HI_EL1: return "aflatctl5_hi_el1"; - case REG_LLC_FILL_DAT: return "llc_fill_dat"; - case REG_AFLATVALBIN5_EL1: return "aflatvalbin5_el1"; - case REG_AFLATVALBIN6_EL1: return "aflatvalbin6_el1"; - case REG_LLC_RAM_CONFIG: return "llc_ram_config"; - case REG_AFLATVALBIN7_EL1: return "aflatvalbin7_el1"; - case REG_LLC_ERR_STS: return "llc_err_sts"; - case REG_CMAINT_BCAST_LIST_0: return "cmaint_bcast_list_0"; - case REG_CMAINT_BCAST_LIST_1: return "cmaint_bcast_list_1"; - case REG_CMAINT_BCAST_CTL: return "cmaint_bcast_ctl"; - case REG_LLC_ERR_ADR: return "llc_err_adr"; - case REG_LLC_ERR_CTL: return "llc_err_ctl"; - case REG_LLC_ERR_INJ: return "llc_err_inj"; - case REG_LLC_ERR_INF: return "llc_err_inf"; - case REG_USERTAGSEL_EL1: return "usertagsel_el1"; - case REG_UUSERTAG_EL0: return "uusertag_el0"; - case REG_KUSERTAG_EL1: return "kusertag_el1"; - case REG_HUSERTAG_EL2: return "husertag_el2"; - case REG_LLC_TRACE_CTL0: return "llc_trace_ctl0"; - case REG_LLC_TRACE_CTL1: return "llc_trace_ctl1"; - case REG_LLC_UP_REQ_VC: return "llc_up_req_vc"; - case REG_LLC_UP_REQ_VC_THRESH: return "llc_up_req_vc_thresh"; - case REG_LLC_UP_REQ_VC_2: return "llc_up_req_vc_2"; - case REG_LLC_UP_REQ_VC_THRESH_2: return "llc_up_req_vc_thresh_2"; - case REG_LLC_DRAM_HASH0: return "llc_dram_hash0"; - case REG_LLC_DRAM_HASH1: return "llc_dram_hash1"; - case REG_LLC_DRAM_HASH2: return "llc_dram_hash2"; - case REG_LLC_DRAM_HASH3: return "llc_dram_hash3"; - case REG_LLC_TRACE_CTL2: return "llc_trace_ctl2"; - case REG_LLC_DRAM_HASH4: return "llc_dram_hash4"; - case REG_LLC_UP_REQ_VC_3: return "llc_up_req_vc_3"; - case REG_LLC_UP_REQ_VC_THRESH_3: return "llc_up_req_vc_thresh_3"; - case REG_LLC_UP_REQ_VC_4: return "llc_up_req_vc_4"; - case REG_LLC_UP_REQ_VC_THRESH_4: return "llc_up_req_vc_thresh_4"; - case REG_LLC_HASH0: return "llc_hash0"; - case REG_LLC_HASH1: return "llc_hash1"; - case REG_LLC_HASH2: return "llc_hash2"; - case REG_LLC_HASH3: return "llc_hash3"; - case REG_LLC_WRR: return "llc_wrr"; - case REG_LLC_DRAM_HASH5: return "llc_dram_hash5"; - case REG_LLC_DRAM_HASH6: return "llc_dram_hash6"; - case REG_VPIDR_EL2: return "vpidr_el2"; - case REG_VMPIDR_EL2: return "vmpidr_el2"; - case REG_SCTLR_EL2: return "sctlr_el2"; - case REG_ACTLR_EL2: return "actlr_el2"; - case REG_HCR_EL2: return "hcr_el2"; - case REG_MDCR_EL2: return "mdcr_el2"; - case REG_CPTR_EL2: return "cptr_el2"; - case REG_HSTR_EL2: return "hstr_el2"; - case REG_HFGRTR_EL2: return "hfgrtr_el2"; - case REG_HFGWTR_EL2: return "hfgwtr_el2"; - case REG_HFGITR_EL2: return "hfgitr_el2"; - case REG_HACR_EL2: return "hacr_el2"; - case REG_TRFCR_EL2: return "trfcr_el2"; - case REG_HCRX_EL2: return "hcrx_el2"; - case REG_SMPRIMAP_EL2: return "smprimap_el2"; - case REG_SMCR_EL2: return "smcr_el2"; - case REG_SDER32_EL2: return "sder32_el2"; - case REG_TTBR0_EL2: return "ttbr0_el2"; - case REG_TTBR1_EL2: return "ttbr1_el2"; - case REG_TCR_EL2: return "tcr_el2"; - case REG_VTTBR_EL2: return "vttbr_el2"; - case REG_VTCR_EL2: return "vtcr_el2"; - case REG_VNCR_EL2: return "vncr_el2"; - case REG_VSTTBR_EL2: return "vsttbr_el2"; - case REG_VSTCR_EL2: return "vstcr_el2"; - case REG_DACR32_EL2: return "dacr32_el2"; - case REG_HDFGRTR_EL2: return "hdfgrtr_el2"; - case REG_HDFGWTR_EL2: return "hdfgwtr_el2"; - case REG_SPSR_NV_EL21: return "spsr_nv_el21"; - case REG_ELR_NV_EL21: return "elr_nv_el21"; - case REG_SP_EL1: return "sp_el1"; - case REG_SPSR_IRQ: return "spsr_irq"; - case REG_SPSR_ABT: return "spsr_abt"; - case REG_SPSR_UND: return "spsr_und"; - case REG_SPSR_FIQ: return "spsr_fiq"; - case REG_IFSR32_EL2: return "ifsr32_el2"; - case REG_AFSR0_EL2: return "afsr0_el2"; - case REG_AFSR1_EL2: return "afsr1_el2"; - case REG_ESR_NV_EL21: return "esr_nv_el21"; - case REG_VSESR_EL2: return "vsesr_el2"; - case REG_FPEXC32_EL2: return "fpexc32_el2"; - case REG_TFSR_EL2: return "tfsr_el2"; - case REG_FAR_NV_EL21: return "far_nv_el21"; - case REG_HPFAR_EL2: return "hpfar_el2"; - case REG_PMSCR_EL2: return "pmscr_el2"; - case REG_MAIR_EL2: return "mair_el2"; - case REG_AMAIR_EL2: return "amair_el2"; - case REG_MPAMHCR_EL2: return "mpamhcr_el2"; - case REG_MPAMVPMV_EL2: return "mpamvpmv_el2"; - case REG_MPAM2_EL2: return "mpam2_el2"; - case REG_MPAMVPM0_EL2: return "mpamvpm0_el2"; - case REG_MPAMVPM1_EL2: return "mpamvpm1_el2"; - case REG_MPAMVPM2_EL2: return "mpamvpm2_el2"; - case REG_MPAMVPM3_EL2: return "mpamvpm3_el2"; - case REG_MPAMVPM4_EL2: return "mpamvpm4_el2"; - case REG_MPAMVPM5_EL2: return "mpamvpm5_el2"; - case REG_MPAMVPM6_EL2: return "mpamvpm6_el2"; - case REG_MPAMVPM7_EL2: return "mpamvpm7_el2"; - case REG_VBAR_EL2: return "vbar_el2"; - case REG_RVBAR_EL2: return "rvbar_el2"; - case REG_RMR_EL2: return "rmr_el2"; - case REG_VDISR_EL2: return "vdisr_el2"; - case REG_ICH_AP0R0_EL2: return "ich_ap0r0_el2"; - case REG_ICH_AP0R1_EL2: return "ich_ap0r1_el2"; - case REG_ICH_AP0R2_EL2: return "ich_ap0r2_el2"; - case REG_ICH_AP0R3_EL2: return "ich_ap0r3_el2"; - case REG_ICH_AP1R0_EL2: return "ich_ap1r0_el2"; - case REG_ICH_AP1R1_EL2: return "ich_ap1r1_el2"; - case REG_ICH_AP1R2_EL2: return "ich_ap1r2_el2"; - case REG_ICH_AP1R3_EL2: return "ich_ap1r3_el2"; - case REG_ICH_VSEIR_EL2: return "ich_vseir_el2"; - case REG_ICC_SRE_EL2: return "icc_sre_el2"; - case REG_ICH_HCR_EL2: return "ich_hcr_el2"; - case REG_ICH_VTR_EL2: return "ich_vtr_el2"; - case REG_ICH_MISR_EL2: return "ich_misr_el2"; - case REG_ICH_EISR_EL2: return "ich_eisr_el2"; - case REG_ICH_ELRSR_EL2: return "ich_elrsr_el2"; - case REG_ICH_VMCR_EL2: return "ich_vmcr_el2"; - case REG_ICH_LR0_EL2: return "ich_lr0_el2"; - case REG_ICH_LR1_EL2: return "ich_lr1_el2"; - case REG_ICH_LR2_EL2: return "ich_lr2_el2"; - case REG_ICH_LR3_EL2: return "ich_lr3_el2"; - case REG_ICH_LR4_EL2: return "ich_lr4_el2"; - case REG_ICH_LR5_EL2: return "ich_lr5_el2"; - case REG_ICH_LR6_EL2: return "ich_lr6_el2"; - case REG_ICH_LR7_EL2: return "ich_lr7_el2"; - case REG_ICH_LR8_EL2: return "ich_lr8_el2"; - case REG_ICH_LR9_EL2: return "ich_lr9_el2"; - case REG_ICH_LR10_EL2: return "ich_lr10_el2"; - case REG_ICH_LR11_EL2: return "ich_lr11_el2"; - case REG_ICH_LR12_EL2: return "ich_lr12_el2"; - case REG_ICH_LR13_EL2: return "ich_lr13_el2"; - case REG_ICH_LR14_EL2: return "ich_lr14_el2"; - case REG_ICH_LR15_EL2: return "ich_lr15_el2"; - case REG_CONTEXTIDR_EL2: return "contextidr_el2"; - case REG_TPIDR_EL2: return "tpidr_el2"; - case REG_SCXTNUM_EL2: return "scxtnum_el2"; - case REG_CNTVOFF_EL2: return "cntvoff_el2"; - case REG_REDIR_CNTHCTL_EL2: return "redir_cnthctl_el2"; - case REG_REDIR_CNTHP_TVAL_EL2: return "redir_cnthp_tval_el2"; - case REG_REDIR_CNTHP_CTL_EL2: return "redir_cnthp_ctl_el2"; - case REG_REDIR_CNTHP_CVAL_EL2: return "redir_cnthp_cval_el2"; - case REG_REDIR_CNTHV_TVAL_EL2: return "redir_cnthv_tval_el2"; - case REG_REDIR_CNTHV_CTL_EL2: return "redir_cnthv_ctl_el2"; - case REG_REDIR_CNTHV_CVAL_EL2: return "redir_cnthv_cval_el2"; - case REG_CNTHVS_TVAL_EL2: return "cnthvs_tval_el2"; - case REG_CNTHVS_CTL_EL2: return "cnthvs_ctl_el2"; - case REG_CNTHVS_CVAL_EL2: return "cnthvs_cval_el2"; - case REG_CNTHPS_TVAL_EL2: return "cnthps_tval_el2"; - case REG_CNTHPS_CTL_EL2: return "cnthps_ctl_el2"; - case REG_CNTHPS_CVAL_EL2: return "cnthps_cval_el2"; - case REG_FED_ERR_STS: return "fed_err_sts"; - case REG_FED_ERR_CTL: return "fed_err_ctl"; - case REG_APCTL_EL21: return "apctl_el21"; - case REG_KERNKEYLO_EL21: return "kernkeylo_el21"; - case REG_KERNKEYHI_EL21: return "kernkeyhi_el21"; - case REG_VMSA_LOCK_EL1: return "vmsa_lock_el1"; - case REG_AMX_STATE_T_EL1: return "amx_state_t_el1"; - case REG_AMX_CONFIG_EL21: return "amx_config_el21"; - case REG_VMSA_LOCK_EL2: return "vmsa_lock_el2"; - case REG_CTRR_B_UPR_EL21: return "ctrr_b_upr_el21"; - case REG_CTRR_B_LWR_EL21: return "ctrr_b_lwr_el21"; - case REG_SP_SETUP_GL21: return "sp_setup_gl21"; - case REG_SP_SETUP_GL2: return "sp_setup_gl2"; - case REG_CTRR_B_CTL_EL21: return "ctrr_b_ctl_el21"; - case REG_CTRR_A_LWR_EL21: return "ctrr_a_lwr_el21"; - case REG_CTRR_A_UPR_EL21: return "ctrr_a_upr_el21"; - case REG_CTRR_A_CTL_EL21: return "ctrr_a_ctl_el21"; - case REG_VMSA_LOCK_EL12: return "vmsa_lock_el12"; - case REG_AGTCNTV_CTL_EL02: return "agtcntv_ctl_el02"; - case REG_AMX_STATE_EL1: return "amx_state_el1"; - case REG_AMX_STATUS_EL1: return "amx_status_el1"; - case REG_AGTCNTP_CVAL_EL02: return "agtcntp_cval_el02"; - case REG_REDIR_ACNTP_TVAL_EL02: return "redir_acntp_tval_el02"; - case REG_AGTCNTP_CTL_EL02: return "agtcntp_ctl_el02"; - case REG_AGTCNTV_CVAL_EL02: return "agtcntv_cval_el02"; - case REG_AGTCNTV_TVAL_EL02: return "agtcntv_tval_el02"; - case REG_AMX_CONFIG_EL12: return "amx_config_el12"; - case REG_AMX_CONFIG_EL2: return "amx_config_el2"; - case REG_SPRR_HUPERM_EL0: return "sprr_huperm_el0"; - case REG_SPRR_VUPERM_EL0: return "sprr_vuperm_el0"; - case REG_CTRR_A_CTL_EL2: return "ctrr_a_ctl_el2"; - case REG_CTRR_B_CTL_EL2: return "ctrr_b_ctl_el2"; - case REG_CTRR_A_LWR_EL2: return "ctrr_a_lwr_el2"; - case REG_CTRR_A_UPR_EL2: return "ctrr_a_upr_el2"; - case REG_CTRR_B_LWR_EL2: return "ctrr_b_lwr_el2"; - case REG_CTRR_B_UPR_EL2: return "ctrr_b_upr_el2"; - case REG_SPRR_HUMPRR_EL2: return "sprr_humprr_el2"; - case REG_SPRR_HUPERM_SH01_EL2: return "sprr_huperm_sh01_el2"; - case REG_SPRR_HUPERM_SH02_EL2: return "sprr_huperm_sh02_el2"; - case REG_SPRR_HUPERM_SH03_EL2: return "sprr_huperm_sh03_el2"; - case REG_SPRR_HUPERM_SH04_EL2: return "sprr_huperm_sh04_el2"; - case REG_SPRR_HUPERM_SH05_EL2: return "sprr_huperm_sh05_el2"; - case REG_SPRR_HUPERM_SH06_EL2: return "sprr_huperm_sh06_el2"; - case REG_SPRR_HUPERM_SH07_EL2: return "sprr_huperm_sh07_el2"; - case REG_SPRR_VUMPRR_EL1: return "sprr_vumprr_el1"; - case REG_SPRR_VUPERM_SH01_EL1: return "sprr_vuperm_sh01_el1"; - case REG_SPRR_VUPERM_SH02_EL1: return "sprr_vuperm_sh02_el1"; - case REG_SPRR_VUPERM_SH03_EL1: return "sprr_vuperm_sh03_el1"; - case REG_SPRR_VUPERM_SH04_EL1: return "sprr_vuperm_sh04_el1"; - case REG_SPRR_VUPERM_SH05_EL1: return "sprr_vuperm_sh05_el1"; - case REG_SPRR_VUPERM_SH06_EL1: return "sprr_vuperm_sh06_el1"; - case REG_SPRR_VUPERM_SH07_EL1: return "sprr_vuperm_sh07_el1"; - case REG_CTRR_A_LWR_EL12: return "ctrr_a_lwr_el12"; - case REG_CTRR_A_UPR_EL12: return "ctrr_a_upr_el12"; - case REG_CTRR_B_LWR_EL12: return "ctrr_b_lwr_el12"; - case REG_CTRR_B_UPR_EL12: return "ctrr_b_upr_el12"; - case REG_CTRR_A_CTL_EL12: return "ctrr_a_ctl_el12"; - case REG_CTRR_B_CTL_EL12: return "ctrr_b_ctl_el12"; - case REG_REDIR_ACNTKCTL_EL1: return "redir_acntkctl_el1"; - case REG_AGTCNTKCTL_EL12: return "agtcntkctl_el12"; - case REG_PREDAKEYLO_EL1: return "predakeylo_el1"; - case REG_PREDAKEYHI_EL1: return "predakeyhi_el1"; - case REG_PREDBKEYLO_EL1: return "predbkeylo_el1"; - case REG_PREDBKEYHI_EL1: return "predbkeyhi_el1"; - case REG_SIQ_CFG_EL1: return "siq_cfg_el1"; - case REG_REDIR_LCL_ACNTPCTSS_EL0: return "redir_lcl_acntpctss_el0"; - case REG_REDIR_LCL_ACNTVCTSS_EL0: return "redir_lcl_acntvctss_el0"; - case REG_AVNCR_EL2: return "avncr_el2"; - case REG_ACC_CTRR_A_LWR_EL2: return "acc_ctrr_a_lwr_el2"; - case REG_ACC_CTRR_A_UPR_EL2: return "acc_ctrr_a_upr_el2"; - case REG_ACC_CTRR_B_LWR_EL2: return "acc_ctrr_b_lwr_el2"; - case REG_ACC_CTRR_B_UPR_EL2: return "acc_ctrr_b_upr_el2"; - case REG_ACC_CTRR_A_CTL_EL2: return "acc_ctrr_a_ctl_el2"; - case REG_ACC_CTRR_B_CTL_EL2: return "acc_ctrr_b_ctl_el2"; - case REG_REDIR_LCL_ACNTPCT_EL0: return "redir_lcl_acntpct_el0"; - case REG_REDIR_LCL_ACNTVCT_EL0: return "redir_lcl_acntvct_el0"; - case REG_ACFG_EL1: return "acfg_el1"; - case REG_AHCR_EL2: return "ahcr_el2"; - case REG_APL_INTSTATUS_EL21: return "apl_intstatus_el21"; - case REG_APL_INTSTATUS_EL2: return "apl_intstatus_el2"; - case REG_REDIR_ACNTHCTL_EL2: return "redir_acnthctl_el2"; - case REG_JAPIAKEYLO_NV_EL21: return "japiakeylo_nv_el21"; - case REG_JAPIAKEYHI_NV_EL21: return "japiakeyhi_nv_el21"; - case REG_JAPIBKEYLO_NV_EL21: return "japibkeylo_nv_el21"; - case REG_JAPIBKEYHI_NV_EL21: return "japibkeyhi_nv_el21"; - case REG_JAPIAKEYLO_EL21: return "japiakeylo_el21"; - case REG_JAPIAKEYHI_EL21: return "japiakeyhi_el21"; - case REG_JAPIBKEYLO_EL21: return "japibkeylo_el21"; - case REG_JAPIBKEYHI_EL21: return "japibkeyhi_el21"; - case REG_JAPIAKEYLO_EL12: return "japiakeylo_el12"; - case REG_JAPIAKEYHI_EL12: return "japiakeyhi_el12"; - case REG_JAPIBKEYLO_EL12: return "japibkeylo_el12"; - case REG_JAPIBKEYHI_EL12: return "japibkeyhi_el12"; - case REG_AGTCNTRDIR_EL2: return "agtcntrdir_el2"; - case REG_AGTCNTRDIR_EL12: return "agtcntrdir_el12"; - case REG_JRANGE_EL2: return "jrange_el2"; - case REG_JRANGE_EL21: return "jrange_el21"; - case REG_JRANGE_EL12: return "jrange_el12"; - case REG_JCTL_EL2: return "jctl_el2"; - case REG_JCTL_EL21: return "jctl_el21"; - case REG_JCTL_EL12: return "jctl_el12"; - case REG_JCTL_EL0: return "jctl_el0"; - case REG_AMDSCR_EL1: return "amdscr_el1"; - case REG_SCTLR_EL12: return "sctlr_el12"; - case REG_ACTLR_EL12: return "actlr_el12"; - case REG_CPACR_EL12: return "cpacr_el12"; - case REG_TRFCR_EL12: return "trfcr_el12"; - case REG_SMCR_EL12: return "smcr_el12"; - case REG_TTBR0_EL12: return "ttbr0_el12"; - case REG_TTBR1_EL12: return "ttbr1_el12"; - case REG_TCR_EL12: return "tcr_el12"; - case REG_SPSR_EL12: return "spsr_el12"; - case REG_ELR_EL12: return "elr_el12"; - case REG_AFSR0_EL12: return "afsr0_el12"; - case REG_AFSR1_EL12: return "afsr1_el12"; - case REG_ESR_EL12: return "esr_el12"; - case REG_TFSR_EL12: return "tfsr_el12"; - case REG_FAR_EL12: return "far_el12"; - case REG_PMSCR_EL12: return "pmscr_el12"; - case REG_MAIR_EL12: return "mair_el12"; - case REG_AMAIR_EL12: return "amair_el12"; - case REG_MPAM1_EL12: return "mpam1_el12"; - case REG_VBAR_EL12: return "vbar_el12"; - case REG_CONTEXTIDR_EL12: return "contextidr_el12"; - case REG_SCXTNUM_EL12: return "scxtnum_el12"; - case REG_CNTKCTL_EL12: return "cntkctl_el12"; - case REG_CNTP_TVAL_EL02: return "cntp_tval_el02"; - case REG_CNTP_CTL_EL02: return "cntp_ctl_el02"; - case REG_CNTP_CVAL_EL02: return "cntp_cval_el02"; - case REG_CNTV_TVAL_EL02: return "cntv_tval_el02"; - case REG_CNTV_CTL_EL02: return "cntv_ctl_el02"; - case REG_CNTV_CVAL_EL02: return "cntv_cval_el02"; - case REG_IPI_RR_LOCAL_EL1: return "ipi_rr_local_el1"; - case REG_IPI_RR_GLOBAL_EL1: return "ipi_rr_global_el1"; - case REG_AF_ERR_CFG0: return "af_err_cfg0"; - case REG_AP_ERR_CFG0: return "ap_err_cfg0"; - case REG_AF_ERR_SRC_IDS: return "af_err_src_ids"; - case REG_DPC_ERR_STS: return "dpc_err_sts"; - case REG_DPC_ERR_CTL: return "dpc_err_ctl"; - case REG_PROD_TRC_CORE_CFG_EL21: return "prod_trc_core_cfg_el21"; - case REG_TRACE_CORE_CFG: return "trace_core_cfg"; - case REG_IPI_SR: return "ipi_sr"; - case REG_APL_LRTMR_EL2: return "apl_lrtmr_el2"; - case REG_APL_INTENABLE_EL2: return "apl_intenable_el2"; - case REG_KTRACE_MESSAGE: return "ktrace_message"; - case REG_TRACE_CORE_CFG_EXT: return "trace_core_cfg_ext"; - case REG_PROD_TRC_CORE_CFG_EL2: return "prod_trc_core_cfg_el2"; - case REG_HID_PROD_TRC_CORE_CFG_EL1: return "hid_prod_trc_core_cfg_el1"; - case REG_DBG_WRAP_GLB: return "dbg_wrap_glb"; - case REG_TRACE_STREAM_BASE: return "trace_stream_base"; - case REG_TRACE_STREAM_FILL: return "trace_stream_fill"; - case REG_TRACE_STREAM_BASE1: return "trace_stream_base1"; - case REG_TRACE_STREAM_FILL1: return "trace_stream_fill1"; - case REG_TRACE_STREAM_IRQ: return "trace_stream_irq"; - case REG_WATCHDOGDIAG0: return "watchdogdiag0"; - case REG_WATCHDOGDIAG1: return "watchdogdiag1"; - case REG_TRACE_AUX_CTL: return "trace_aux_ctl"; - case REG_IPI_CR: return "ipi_cr"; - case REG_UTRIG_EVENT: return "utrig_event"; - case REG_HID_PROD_TRC_MASK_EL1: return "hid_prod_trc_mask_el1"; - case REG_TRACE_CTL: return "trace_ctl"; - case REG_TRACE_DAT: return "trace_dat"; - case REG_PROD_TRC_STRM_BASE0_GL2: return "prod_trc_strm_base0_gl2"; - case REG_PROD_TRC_STRM_BASE1_GL2: return "prod_trc_strm_base1_gl2"; - case REG_CPU_CFG: return "cpu_cfg"; - case REG_PBLK_STS: return "pblk_sts"; - case REG_PROD_TRC_CTL_EL21: return "prod_trc_ctl_el21"; - case REG_PROD_TRC_STRM_BASE0_GL21: return "prod_trc_strm_base0_gl21"; - case REG_PROD_TRC_STRM_BASE1_GL21: return "prod_trc_strm_base1_gl21"; - case REG_PROD_TRC_STRM_FIQ_EL21: return "prod_trc_strm_fiq_el21"; - case REG_CPU_OVRD: return "cpu_ovrd"; - case REG_PBLK_EXE_ST: return "pblk_exe_st"; - case REG_PROD_TRC_CORE_GL_CTL_GL21: return "prod_trc_core_gl_ctl_gl21"; - case REG_PROD_TRC_CORE_GL_CTL_GL2: return "prod_trc_core_gl_ctl_gl2"; - case REG_ACC_OVRD: return "acc_ovrd"; - case REG_ACC_OVRD1: return "acc_ovrd1"; - case REG_CPM_PWRDN_CTL: return "cpm_pwrdn_ctl"; - case REG_PROD_TRC_BUF_RESTORE0_GL21: return "prod_trc_buf_restore0_gl21"; - case REG_PROD_TRC_BUF_RESTORE1_GL21: return "prod_trc_buf_restore1_gl21"; - case REG_PROD_TRC_EN_GL21: return "prod_trc_en_gl21"; - case REG_PRE_LLCFLUSH_TMR: return "pre_llcflush_tmr"; - case REG_BIUINTFCTL_CFG: return "biuintfctl_cfg"; - case REG_BIUINTFWRR_CFG: return "biuintfwrr_cfg"; - case REG_PRE_TD_TMR: return "pre_td_tmr"; - case REG_ACC_SLP_WAKE_UP_TMR: return "acc_slp_wake_up_tmr"; - case REG_PBLK_PSW_DLY: return "pblk_psw_dly"; - case REG_CPU_STS: return "cpu_sts"; - case REG_HIST_TRIG: return "hist_trig"; - case REG_PROD_TRC_BUF_RESTORE0_GL2: return "prod_trc_buf_restore0_gl2"; - case REG_PROD_TRC_BUF_RESTORE1_GL2: return "prod_trc_buf_restore1_gl2"; - case REG_PROD_TRC_STRM_FILL0_EL1: return "prod_trc_strm_fill0_el1"; - case REG_PROD_TRC_STRM_FILL1_EL1: return "prod_trc_strm_fill1_el1"; - case REG_ARRAY_INDEX: return "array_index"; - case REG_PROD_TRC_CTL_EL2: return "prod_trc_ctl_el2"; - case REG_PROD_TRC_EN_GL2: return "prod_trc_en_gl2"; - case REG_PROD_TRC_STRM_FIQ_EL2: return "prod_trc_strm_fiq_el2"; - case REG_PROD_TRC_CPMU_DUMP_TRIG_EL1: return "prod_trc_cpmu_dump_trig_el1"; - case REG_PROD_LOSS_COUNT_EL1: return "prod_loss_count_el1"; - case REG_SW_TRACE_DATA_EL0: return "sw_trace_data_el0"; - case REG_IL1_DATA0: return "il1_data0"; - case REG_IL1_DATA1: return "il1_data1"; - case REG_DL1_DATA0: return "dl1_data0"; - case REG_DL1_DATA1: return "dl1_data1"; - case REG_MMUDATA0: return "mmudata0"; - case REG_MMUDATA1: return "mmudata1"; - case REG_DL1_DATA2: return "dl1_data2"; - case REG_IL1_DATA2: return "il1_data2"; - case REG_LLC_DATA0: return "llc_data0"; - case REG_LLC_DATA1: return "llc_data1"; - case REG_SCTLR_EL3: return "sctlr_el3"; - case REG_ACTLR_EL3: return "actlr_el3"; - case REG_SCR_EL3: return "scr_el3"; - case REG_SDER32_EL3: return "sder32_el3"; - case REG_CPTR_EL3: return "cptr_el3"; - case REG_MDCR_EL3: return "mdcr_el3"; - case REG_TTBR0_EL3: return "ttbr0_el3"; - case REG_TCR_EL3: return "tcr_el3"; - case REG_SPSR_EL3: return "spsr_el3"; - case REG_ELR_EL3: return "elr_el3"; - case REG_SP_EL2: return "sp_el2"; - case REG_AFSR0_EL3: return "afsr0_el3"; - case REG_AFSR1_EL3: return "afsr1_el3"; - case REG_ESR_EL3: return "esr_el3"; - case REG_TFSR_EL3: return "tfsr_el3"; - case REG_FAR_EL3: return "far_el3"; - case REG_MAIR_EL3: return "mair_el3"; - case REG_AMAIR_EL3: return "amair_el3"; - case REG_MPAM3_EL3: return "mpam3_el3"; - case REG_VBAR_EL3: return "vbar_el3"; - case REG_RVBAR_EL3: return "rvbar_el3"; - case REG_RMR_EL3: return "rmr_el3"; - case REG_ICC_CTLR_EL3: return "icc_ctlr_el3"; - case REG_ICC_SRE_EL3: return "icc_sre_el3"; - case REG_ICC_IGRPEN1_EL3: return "icc_igrpen1_el3"; - case REG_TPIDR_EL3: return "tpidr_el3"; - case REG_SCXTNUM_EL3: return "scxtnum_el3"; - case REG_MMU_ERR_STS: return "mmu_err_sts"; - case REG_AFSR1_GL21: return "afsr1_gl21"; - case REG_AFSR1_GL2: return "afsr1_gl2"; - case REG_AFSR1_GL12: return "afsr1_gl12"; - case REG_BP_OBJC_ADR_EL1: return "bp_objc_adr_el1"; - case REG_BP_OBJC_CTL_EL1: return "bp_objc_ctl_el1"; - case REG_SP_GL11_GL21: return "sp_gl11_gl21"; - case REG_MMU_SESR_EL2: return "mmu_sesr_el2"; - case REG_SPRR_CONFIG_EL21: return "sprr_config_el21"; - case REG_HPFAR_GL2: return "hpfar_gl2"; - case REG_GXF_CONFIG_EL21: return "gxf_config_el21"; - case REG_SPRR_AMRANGE_EL1: return "sprr_amrange_el1"; - case REG_GXF_CONFIG_EL2: return "gxf_config_el2"; - case REG_SPRR_UPERM_EL02: return "sprr_uperm_el02"; - case REG_SPRR_PPERM_EL21: return "sprr_pperm_el21"; - case REG_SPRR_PPERM_EL2: return "sprr_pperm_el2"; - case REG_APGAKEYLO_EL12: return "apgakeylo_el12"; - case REG_APGAKEYHI_EL12: return "apgakeyhi_el12"; - case REG_KERNKEYLO_EL12: return "kernkeylo_el12"; - case REG_KERNKEYHI_EL12: return "kernkeyhi_el12"; - case REG_AFPCR_EL0: return "afpcr_el0"; - case REG_SP_GL22: return "sp_gl22"; - case REG_AMXIDR_EL1: return "amxidr_el1"; - case REG_SPRR_UMPRR_EL1: return "sprr_umprr_el1"; - case REG_SPRR_PMPRR_EL21: return "sprr_pmprr_el21"; - case REG_SPRR_PMPRR_EL2: return "sprr_pmprr_el2"; - case REG_SPRR_UPERM_SH01_EL1: return "sprr_uperm_sh01_el1"; - case REG_SPRR_UPERM_SH02_EL1: return "sprr_uperm_sh02_el1"; - case REG_SPRR_UPERM_SH03_EL1: return "sprr_uperm_sh03_el1"; - case REG_SPRR_UPERM_SH04_EL1: return "sprr_uperm_sh04_el1"; - case REG_SPRR_UPERM_SH05_EL1: return "sprr_uperm_sh05_el1"; - case REG_SPRR_UPERM_SH06_EL1: return "sprr_uperm_sh06_el1"; - case REG_SPRR_UPERM_SH07_EL1: return "sprr_uperm_sh07_el1"; - case REG_SPRR_PPERM_SH01_EL21: return "sprr_pperm_sh01_el21"; - case REG_SPRR_PPERM_SH02_EL21: return "sprr_pperm_sh02_el21"; - case REG_SPRR_PPERM_SH03_EL21: return "sprr_pperm_sh03_el21"; - case REG_SPRR_PPERM_SH04_EL21: return "sprr_pperm_sh04_el21"; - case REG_SPRR_PPERM_SH05_EL21: return "sprr_pperm_sh05_el21"; - case REG_SPRR_PPERM_SH06_EL21: return "sprr_pperm_sh06_el21"; - case REG_SPRR_PPERM_SH07_EL21: return "sprr_pperm_sh07_el21"; - case REG_SPRR_PPERM_SH01_EL2: return "sprr_pperm_sh01_el2"; - case REG_SPRR_PPERM_SH02_EL2: return "sprr_pperm_sh02_el2"; - case REG_SPRR_PPERM_SH03_EL2: return "sprr_pperm_sh03_el2"; - case REG_SPRR_PPERM_SH04_EL2: return "sprr_pperm_sh04_el2"; - case REG_SPRR_PPERM_SH05_EL2: return "sprr_pperm_sh05_el2"; - case REG_SPRR_PPERM_SH06_EL2: return "sprr_pperm_sh06_el2"; - case REG_SPRR_PPERM_SH07_EL2: return "sprr_pperm_sh07_el2"; - case REG_SPRR_PMPRR_EL12: return "sprr_pmprr_el12"; - case REG_SPRR_PPERM_SH01_EL12: return "sprr_pperm_sh01_el12"; - case REG_SPRR_PPERM_SH02_EL12: return "sprr_pperm_sh02_el12"; - case REG_SPRR_PPERM_SH03_EL12: return "sprr_pperm_sh03_el12"; - case REG_SPRR_PPERM_SH04_EL12: return "sprr_pperm_sh04_el12"; - case REG_SPRR_PPERM_SH05_EL12: return "sprr_pperm_sh05_el12"; - case REG_SPRR_PPERM_SH06_EL12: return "sprr_pperm_sh06_el12"; - case REG_SPRR_PPERM_SH07_EL12: return "sprr_pperm_sh07_el12"; - case REG_APIAKEYLO_EL12: return "apiakeylo_el12"; - case REG_APIAKEYHI_EL12: return "apiakeyhi_el12"; - case REG_APIBKEYLO_EL12: return "apibkeylo_el12"; - case REG_APIBKEYHI_EL12: return "apibkeyhi_el12"; - case REG_APDAKEYLO_EL12: return "apdakeylo_el12"; - case REG_APDAKEYHI_EL12: return "apdakeyhi_el12"; - case REG_APDBKEYLO_EL12: return "apdbkeylo_el12"; - case REG_APDBKEYHI_EL12: return "apdbkeyhi_el12"; - case REG_CURRENTG: return "currentg"; - case REG_GXF_ENTRY_EL21: return "gxf_entry_el21"; - case REG_GXF_PABENTRY_EL21: return "gxf_pabentry_el21"; - case REG_ASPSR_EL21: return "aspsr_el21"; - case REG_ADSPSR_EL0: return "adspsr_el0"; - case REG_PMCR1_GL2: return "pmcr1_gl2"; - case REG_ASPSR_NV_EL21: return "aspsr_nv_el21"; - case REG_PMCR1_GL21: return "pmcr1_gl21"; - case REG_VBAR_GL12: return "vbar_gl12"; - case REG_SPSR_GL12: return "spsr_gl12"; - case REG_ASPSR_GL12: return "aspsr_gl12"; - case REG_ESR_GL12: return "esr_gl12"; - case REG_ELR_GL12: return "elr_gl12"; - case REG_FAR_GL12: return "far_gl12"; - case REG_SP_GL1: return "sp_gl1"; - case REG_TPIDR_GL1: return "tpidr_gl1"; - case REG_VBAR_GL21: return "vbar_gl21"; - case REG_SPSR_GL21: return "spsr_gl21"; - case REG_ASPSR_GL21: return "aspsr_gl21"; - case REG_ESR_GL21: return "esr_gl21"; - case REG_ELR_GL21: return "elr_gl21"; - case REG_FAR_GL21: return "far_gl21"; - case REG_SP_GL2: return "sp_gl2"; - case REG_TPIDR_GL2: return "tpidr_gl2"; - case REG_VBAR_GL2: return "vbar_gl2"; - case REG_SPSR_GL2: return "spsr_gl2"; - case REG_ASPSR_GL2: return "aspsr_gl2"; - case REG_ESR_GL2: return "esr_gl2"; - case REG_ELR_GL2: return "elr_gl2"; - case REG_FAR_GL2: return "far_gl2"; - case REG_GXF_ENTRY_EL2: return "gxf_entry_el2"; - case REG_GXF_PABENTRY_EL2: return "gxf_pabentry_el2"; - case REG_APCTL_EL2: return "apctl_el2"; - case REG_APSTS_EL2: return "apsts_el2"; - case REG_APSTS_NV1_EL1: return "apsts_nv1_el1"; - case REG_KERNKEYLO_NV_EL21: return "kernkeylo_nv_el21"; - case REG_KERNKEYHI_NV_EL21: return "kernkeyhi_nv_el21"; - case REG_ASPSR_EL12: return "aspsr_el12"; - case REG_APIAKEYLO_NV_EL21: return "apiakeylo_nv_el21"; - case REG_APIAKEYHI_NV_EL21: return "apiakeyhi_nv_el21"; - case REG_APIBKEYLO_NV_EL21: return "apibkeylo_nv_el21"; - case REG_APIBKEYHI_NV_EL21: return "apibkeyhi_nv_el21"; - case REG_APDAKEYLO_NV_EL21: return "apdakeylo_nv_el21"; - case REG_APDAKEYHI_NV_EL21: return "apdakeyhi_nv_el21"; - case REG_APDBKEYLO_NV_EL21: return "apdbkeylo_nv_el21"; - case REG_APDBKEYHI_NV_EL21: return "apdbkeyhi_nv_el21"; - case REG_APGAKEYLO_NV_EL21: return "apgakeylo_nv_el21"; - case REG_APGAKEYHI_NV_EL21: return "apgakeyhi_nv_el21"; - case REG_SPRR_CONFIG_EL2: return "sprr_config_el2"; - case REG_SPRR_AMRANGE_EL2: return "sprr_amrange_el2"; - case REG_VMKEYLO_EL2: return "vmkeylo_el2"; - case REG_VMKEYHI_EL2: return "vmkeyhi_el2"; - case REG_MMU_SFAR_EL2: return "mmu_sfar_el2"; - case REG_APSTS_EL12: return "apsts_el12"; - case REG_APCTL_EL12: return "apctl_el12"; - case REG_GXF_CONFIG_EL12: return "gxf_config_el12"; - case REG_GXF_ENTRY_EL12: return "gxf_entry_el12"; - case REG_GXF_PABENTRY_EL12: return "gxf_pabentry_el12"; - case REG_SPRR_CONFIG_EL12: return "sprr_config_el12"; - case REG_SPRR_AMRANGE_EL12: return "sprr_amrange_el12"; - case REG_MMU_SESR_CTL_EL2: return "mmu_sesr_ctl_el2"; - case REG_SPRR_PPERM_EL12: return "sprr_pperm_el12"; - case REG_CNTPS_TVAL_EL1: return "cntps_tval_el1"; - case REG_CNTPS_CTL_EL1: return "cntps_ctl_el1"; - case REG_CNTPS_CVAL_EL1: return "cntps_cval_el1"; - case REG_PSTATE_SPSEL: return "pstate_spsel"; - case REG_PWRDNSAVE0: return "pwrdnsave0"; - case REG_NRG_ACC_CTL: return "nrg_acc_ctl"; - case REG_AON_CNT0: return "aon_cnt0"; - case REG_CPU_CNT0: return "cpu_cnt0"; - case REG_UPMCR0_EL1: return "upmcr0_el1"; - case REG_UPMC8: return "upmc8"; - case REG_AON_CNT8: return "aon_cnt8"; - case REG_PWRDNSAVE1: return "pwrdnsave1"; - case REG_CORE_NRG_ACC_DAT: return "core_nrg_acc_dat"; - case REG_AON_CNT_CTL0: return "aon_cnt_ctl0"; - case REG_CPU_CNT_CTL0: return "cpu_cnt_ctl0"; - case REG_UPMESR0_EL1: return "upmesr0_el1"; - case REG_UPMC9: return "upmc9"; - case REG_AON_CNT_CTL8: return "aon_cnt_ctl8"; - case REG_ACC_PWR_DN_SAVE: return "acc_pwr_dn_save"; - case REG_CPM_NRG_ACC_DAT: return "cpm_nrg_acc_dat"; - case REG_AON_CNT1: return "aon_cnt1"; - case REG_CPU_CNT1: return "cpu_cnt1"; - case REG_UPMSWCTRL_EL1: return "upmswctrl_el1"; - case REG_UPMC10: return "upmc10"; - case REG_AON_CNT9: return "aon_cnt9"; - case REG_CORE_SRM_NRG_ACC_DAT: return "core_srm_nrg_acc_dat"; - case REG_AON_CNT_CTL1: return "aon_cnt_ctl1"; - case REG_CPU_CNT_CTL1: return "cpu_cnt_ctl1"; - case REG_UPMECM0_EL1: return "upmecm0_el1"; - case REG_UPMC11: return "upmc11"; - case REG_AON_CNT_CTL9: return "aon_cnt_ctl9"; - case REG_AON_CNT_CTL: return "aon_cnt_ctl"; - case REG_CPM_SRM_NRG_ACC_DAT: return "cpm_srm_nrg_acc_dat"; - case REG_AON_CNT2: return "aon_cnt2"; - case REG_CPU_CNT2: return "cpu_cnt2"; - case REG_UPMECM1_EL1: return "upmecm1_el1"; - case REG_UPMC12: return "upmc12"; - case REG_AON_CNT10: return "aon_cnt10"; - case REG_CPU_CNT_CTL: return "cpu_cnt_ctl"; - case REG_AON_CNT_CTL2: return "aon_cnt_ctl2"; - case REG_CPU_CNT_CTL2: return "cpu_cnt_ctl2"; - case REG_UPMPCM_EL1: return "upmpcm_el1"; - case REG_UPMC13: return "upmc13"; - case REG_AON_CNT_CTL10: return "aon_cnt_ctl10"; - case REG_AON_CNT3: return "aon_cnt3"; - case REG_CPU_CNT3: return "cpu_cnt3"; - case REG_UPMSR_EL1: return "upmsr_el1"; - case REG_UPMC14: return "upmc14"; - case REG_AON_CNT11: return "aon_cnt11"; - case REG_AON_CNT_CTL3: return "aon_cnt_ctl3"; - case REG_CPU_CNT_CTL3: return "cpu_cnt_ctl3"; - case REG_UPMC0: return "upmc0"; - case REG_UPMC15: return "upmc15"; - case REG_AON_CNT_CTL11: return "aon_cnt_ctl11"; - case REG_AON_CNT4: return "aon_cnt4"; - case REG_CPU_CNT4: return "cpu_cnt4"; - case REG_UPMC1: return "upmc1"; - case REG_UPMECM2_EL1: return "upmecm2_el1"; - case REG_AON_CNT_CTL4: return "aon_cnt_ctl4"; - case REG_CPU_CNT_CTL4: return "cpu_cnt_ctl4"; - case REG_UPMC2: return "upmc2"; - case REG_UPMECM3_EL1: return "upmecm3_el1"; - case REG_AON_CNT5: return "aon_cnt5"; - case REG_CPU_CNT5: return "cpu_cnt5"; - case REG_UPMC3: return "upmc3"; - case REG_UPMCR1_EL1: return "upmcr1_el1"; - case REG_AON_CNT_CTL5: return "aon_cnt_ctl5"; - case REG_CPU_CNT_CTL5: return "cpu_cnt_ctl5"; - case REG_UPMC4: return "upmc4"; - case REG_UPMESR1_EL1: return "upmesr1_el1"; - case REG_AON_CNT6: return "aon_cnt6"; - case REG_CPU_CNT6: return "cpu_cnt6"; - case REG_UPMC5: return "upmc5"; - case REG_AON_CNT_CTL6: return "aon_cnt_ctl6"; - case REG_CPU_CNT_CTL6: return "cpu_cnt_ctl6"; - case REG_UPMC6: return "upmc6"; - case REG_AON_CNT7: return "aon_cnt7"; - case REG_CPU_CNT7: return "cpu_cnt7"; - case REG_UPMC7: return "upmc7"; - case REG_AON_CNT_CTL7: return "aon_cnt_ctl7"; - case REG_CPU_CNT_CTL7: return "cpu_cnt_ctl7"; - default: return ""; + case REG_EDSCR: return "edscr"; + case REG_EDPRCR: return "edprcr"; + case REG_UAOIMM: return "uaoimm"; + case REG_PANIMM: return "panimm"; + case REG_SPSELIMM: return "spselimm"; + case REG_DITIMM: return "ditimm"; + case REG_SVCRIMM: return "svcrimm"; + case REG_ICIALLUIS: return "icialluis"; + case REG_ICIALLU: return "iciallu"; + case REG_DCIVAC: return "dcivac"; + case REG_DCISW: return "dcisw"; + case REG_ATS1E1R: return "ats1e1r"; + case REG_ATS1E1W: return "ats1e1w"; + case REG_ATS1E0R: return "ats1e0r"; + case REG_ATS1E0W: return "ats1e0w"; + case REG_DCCSW: return "dccsw"; + case REG_DCCISW: return "dccisw"; + case REG_TLBIVMALLE1IS: return "tlbivmalle1is"; + case REG_TLBIVAE1IS: return "tlbivae1is"; + case REG_TLBIASIDE1IS: return "tlbiaside1is"; + case REG_TLBIVAAE1IS: return "tlbivaae1is"; + case REG_TLBIVALE1IS: return "tlbivale1is"; + case REG_TLBIVAALE1IS: return "tlbivaale1is"; + case REG_TLBIVMALLE1: return "tlbivmalle1"; + case REG_TLBIVAE1: return "tlbivae1"; + case REG_TLBIASIDE1: return "tlbiaside1"; + case REG_TLBIVAAE1: return "tlbivaae1"; + case REG_TLBIVALE1: return "tlbivale1"; + case REG_TLBIVAALE1: return "tlbivaale1"; + case REG_DCZVA: return "dczva"; + case REG_ICIVAU: return "icivau"; + case REG_DCCVAC: return "dccvac"; + case REG_DCCVAU: return "dccvau"; + case REG_DCCIVAC: return "dccivac"; + case REG_ATS1E2R: return "ats1e2r"; + case REG_ATS1E2W: return "ats1e2w"; + case REG_ATS12E1R: return "ats12e1r"; + case REG_ATS12E1W: return "ats12e1w"; + case REG_ATS12E0R: return "ats12e0r"; + case REG_ATS12E0W: return "ats12e0w"; + case REG_TLBIIPAS2E1IS: return "tlbiipas2e1is"; + case REG_TLBIIPAS2LE1IS: return "tlbiipas2le1is"; + case REG_TLBIALLE2IS: return "tlbialle2is"; + case REG_TLBIVAE2IS: return "tlbivae2is"; + case REG_TLBIALLE1IS: return "tlbialle1is"; + case REG_TLBIVALE2IS: return "tlbivale2is"; + case REG_TLBIVMALLS12E1IS: return "tlbivmalls12e1is"; + case REG_TLBIIPAS2E1: return "tlbiipas2e1"; + case REG_TLBIIPAS2LE1: return "tlbiipas2le1"; + case REG_TLBIALLE2: return "tlbialle2"; + case REG_TLBIVAE2: return "tlbivae2"; + case REG_TLBIALLE1: return "tlbialle1"; + case REG_TLBIVALE2: return "tlbivale2"; + case REG_TLBIVMALLS12E1: return "tlbivmalls12e1"; + case REG_ATS1E3R: return "ats1e3r"; + case REG_ATS1E3W: return "ats1e3w"; + case REG_TLBIALLE3IS: return "tlbialle3is"; + case REG_TLBIVAE3IS: return "tlbivae3is"; + case REG_TLBIVALE3IS: return "tlbivale3is"; + case REG_TLBIALLE3: return "tlbialle3"; + case REG_TLBIVAE3: return "tlbivae3"; + case REG_TLBIVALE3: return "tlbivale3"; + case REG_OSDTRRX_EL1: return "osdtrrx_el1"; + case REG_DBGBVR0_EL1: return "dbgbvr0_el1"; + case REG_DBGBCR0_EL1: return "dbgbcr0_el1"; + case REG_DBGWVR0_EL1: return "dbgwvr0_el1"; + case REG_DBGWCR0_EL1: return "dbgwcr0_el1"; + case REG_DBGBVR1_EL1: return "dbgbvr1_el1"; + case REG_DBGBCR1_EL1: return "dbgbcr1_el1"; + case REG_DBGWVR1_EL1: return "dbgwvr1_el1"; + case REG_DBGWCR1_EL1: return "dbgwcr1_el1"; + case REG_MDCCINT_EL1: return "mdccint_el1"; + case REG_MDSCR_EL1: return "mdscr_el1"; + case REG_DBGBVR2_EL1: return "dbgbvr2_el1"; + case REG_DBGBCR2_EL1: return "dbgbcr2_el1"; + case REG_DBGWVR2_EL1: return "dbgwvr2_el1"; + case REG_DBGWCR2_EL1: return "dbgwcr2_el1"; + case REG_OSDTRTX_EL1: return "osdtrtx_el1"; + case REG_DBGBVR3_EL1: return "dbgbvr3_el1"; + case REG_DBGBCR3_EL1: return "dbgbcr3_el1"; + case REG_DBGWVR3_EL1: return "dbgwvr3_el1"; + case REG_DBGWCR3_EL1: return "dbgwcr3_el1"; + case REG_DBGBVR4_EL1: return "dbgbvr4_el1"; + case REG_DBGBCR4_EL1: return "dbgbcr4_el1"; + case REG_DBGWVR4_EL1: return "dbgwvr4_el1"; + case REG_DBGWCR4_EL1: return "dbgwcr4_el1"; + case REG_DBGBVR5_EL1: return "dbgbvr5_el1"; + case REG_DBGBCR5_EL1: return "dbgbcr5_el1"; + case REG_DBGWVR5_EL1: return "dbgwvr5_el1"; + case REG_DBGWCR5_EL1: return "dbgwcr5_el1"; + case REG_DBGWFAR: return "dbgwfar"; + case REG_OSECCR_EL1: return "oseccr_el1"; + case REG_DBGBVR6_EL1: return "dbgbvr6_el1"; + case REG_DBGBCR6_EL1: return "dbgbcr6_el1"; + case REG_DBGWVR6_EL1: return "dbgwvr6_el1"; + case REG_DBGWCR6_EL1: return "dbgwcr6_el1"; + case REG_DBGBVR7_EL1: return "dbgbvr7_el1"; + case REG_DBGBCR7_EL1: return "dbgbcr7_el1"; + case REG_DBGWVR7_EL1: return "dbgwvr7_el1"; + case REG_DBGWCR7_EL1: return "dbgwcr7_el1"; + case REG_DBGBVR8_EL1: return "dbgbvr8_el1"; + case REG_DBGBCR8_EL1: return "dbgbcr8_el1"; + case REG_DBGWVR8_EL1: return "dbgwvr8_el1"; + case REG_DBGWCR8_EL1: return "dbgwcr8_el1"; + case REG_DBGBVR9_EL1: return "dbgbvr9_el1"; + case REG_DBGBCR9_EL1: return "dbgbcr9_el1"; + case REG_DBGWVR9_EL1: return "dbgwvr9_el1"; + case REG_DBGWCR9_EL1: return "dbgwcr9_el1"; + case REG_DBGBVR10_EL1: return "dbgbvr10_el1"; + case REG_DBGBCR10_EL1: return "dbgbcr10_el1"; + case REG_DBGWVR10_EL1: return "dbgwvr10_el1"; + case REG_DBGWCR10_EL1: return "dbgwcr10_el1"; + case REG_DBGBVR11_EL1: return "dbgbvr11_el1"; + case REG_DBGBCR11_EL1: return "dbgbcr11_el1"; + case REG_DBGWVR11_EL1: return "dbgwvr11_el1"; + case REG_DBGWCR11_EL1: return "dbgwcr11_el1"; + case REG_DBGBVR12_EL1: return "dbgbvr12_el1"; + case REG_DBGBCR12_EL1: return "dbgbcr12_el1"; + case REG_DBGWVR12_EL1: return "dbgwvr12_el1"; + case REG_DBGWCR12_EL1: return "dbgwcr12_el1"; + case REG_DBGBVR13_EL1: return "dbgbvr13_el1"; + case REG_DBGBCR13_EL1: return "dbgbcr13_el1"; + case REG_DBGWVR13_EL1: return "dbgwvr13_el1"; + case REG_DBGWCR13_EL1: return "dbgwcr13_el1"; + case REG_DBGBVR14_EL1: return "dbgbvr14_el1"; + case REG_DBGBCR14_EL1: return "dbgbcr14_el1"; + case REG_DBGWVR14_EL1: return "dbgwvr14_el1"; + case REG_DBGWCR14_EL1: return "dbgwcr14_el1"; + case REG_DBGBVR15_EL1: return "dbgbvr15_el1"; + case REG_DBGBCR15_EL1: return "dbgbcr15_el1"; + case REG_DBGWVR15_EL1: return "dbgwvr15_el1"; + case REG_DBGWCR15_EL1: return "dbgwcr15_el1"; + case REG_MDRAR_EL1: return "mdrar_el1"; + case REG_OSLAR_EL1: return "oslar_el1"; + case REG_OSLSR_EL1: return "oslsr_el1"; + case REG_OSDLR_EL1: return "osdlr_el1"; + case REG_DBGPRCR_EL1: return "dbgprcr_el1"; + case REG_DBGCLAIMSET_EL1: return "dbgclaimset_el1"; + case REG_DBGCLAIMCLR_EL1: return "dbgclaimclr_el1"; + case REG_DBGAUTHSTAT_EL1: return "dbgauthstat_el1"; + case REG_TRCTRACEIDR: return "trctraceidr"; + case REG_TRCVICTLR: return "trcvictlr"; + case REG_TRCSEQEVR0: return "trcseqevr0"; + case REG_TRCCNTRLDVR0: return "trccntrldvr0"; + case REG_TRCIMSPEC0: return "trcimspec0"; + case REG_TRCPRGCTLR: return "trcprgctlr"; + case REG_TRCQCTLR: return "trcqctlr"; + case REG_TRCVIIECTLR: return "trcviiectlr"; + case REG_TRCSEQEVR1: return "trcseqevr1"; + case REG_TRCCNTRLDVR1: return "trccntrldvr1"; + case REG_TRCIMSPEC1: return "trcimspec1"; + case REG_TRCPROCSELR: return "trcprocselr"; + case REG_TRCVISSCTLR: return "trcvissctlr"; + case REG_TRCSEQEVR2: return "trcseqevr2"; + case REG_TRCCNTRLDVR2: return "trccntrldvr2"; + case REG_TRCIMSPEC2: return "trcimspec2"; + case REG_TRCVIPCSSCTLR: return "trcvipcssctlr"; + case REG_TRCCNTRLDVR3: return "trccntrldvr3"; + case REG_TRCIMSPEC3: return "trcimspec3"; + case REG_TRCCONFIGR: return "trcconfigr"; + case REG_TRCCNTCTLR0: return "trccntctlr0"; + case REG_TRCIMSPEC4: return "trcimspec4"; + case REG_TRCCNTCTLR1: return "trccntctlr1"; + case REG_TRCIMSPEC5: return "trcimspec5"; + case REG_TRCAUXCTLR: return "trcauxctlr"; + case REG_TRCSEQRSTEVR: return "trcseqrstevr"; + case REG_TRCCNTCTLR2: return "trccntctlr2"; + case REG_TRCIMSPEC6: return "trcimspec6"; + case REG_TRCSEQSTR: return "trcseqstr"; + case REG_TRCCNTCTLR3: return "trccntctlr3"; + case REG_TRCIMSPEC7: return "trcimspec7"; + case REG_TRCEVENTCTL0R: return "trceventctl0r"; + case REG_TRCVDCTLR: return "trcvdctlr"; + case REG_TRCEXTINSELR: return "trcextinselr"; + case REG_TRCCNTVR0: return "trccntvr0"; + case REG_TRCEVENTCTL1R: return "trceventctl1r"; + case REG_TRCVDSACCTLR: return "trcvdsacctlr"; + case REG_TRCEXTINSELR1: return "trcextinselr1"; + case REG_TRCCNTVR1: return "trccntvr1"; + case REG_TRCRSR: return "trcrsr"; + case REG_TRCVDARCCTLR: return "trcvdarcctlr"; + case REG_TRCEXTINSELR2: return "trcextinselr2"; + case REG_TRCCNTVR2: return "trccntvr2"; + case REG_TRCSTALLCTLR: return "trcstallctlr"; + case REG_TRCEXTINSELR3: return "trcextinselr3"; + case REG_TRCCNTVR3: return "trccntvr3"; + case REG_TRCTSCTLR: return "trctsctlr"; + case REG_TRCSYNCPR: return "trcsyncpr"; + case REG_TRCCCCTLR: return "trcccctlr"; + case REG_TRCBBCTLR: return "trcbbctlr"; + case REG_TRCRSCTLR16: return "trcrsctlr16"; + case REG_TRCSSCCR0: return "trcssccr0"; + case REG_TRCSSPCICR0: return "trcsspcicr0"; + case REG_TRCOSLAR: return "trcoslar"; + case REG_TRCRSCTLR17: return "trcrsctlr17"; + case REG_TRCSSCCR1: return "trcssccr1"; + case REG_TRCSSPCICR1: return "trcsspcicr1"; + case REG_TRCRSCTLR2: return "trcrsctlr2"; + case REG_TRCRSCTLR18: return "trcrsctlr18"; + case REG_TRCSSCCR2: return "trcssccr2"; + case REG_TRCSSPCICR2: return "trcsspcicr2"; + case REG_TRCRSCTLR3: return "trcrsctlr3"; + case REG_TRCRSCTLR19: return "trcrsctlr19"; + case REG_TRCSSCCR3: return "trcssccr3"; + case REG_TRCSSPCICR3: return "trcsspcicr3"; + case REG_TRCRSCTLR4: return "trcrsctlr4"; + case REG_TRCRSCTLR20: return "trcrsctlr20"; + case REG_TRCSSCCR4: return "trcssccr4"; + case REG_TRCSSPCICR4: return "trcsspcicr4"; + case REG_TRCPDCR: return "trcpdcr"; + case REG_TRCRSCTLR5: return "trcrsctlr5"; + case REG_TRCRSCTLR21: return "trcrsctlr21"; + case REG_TRCSSCCR5: return "trcssccr5"; + case REG_TRCSSPCICR5: return "trcsspcicr5"; + case REG_TRCRSCTLR6: return "trcrsctlr6"; + case REG_TRCRSCTLR22: return "trcrsctlr22"; + case REG_TRCSSCCR6: return "trcssccr6"; + case REG_TRCSSPCICR6: return "trcsspcicr6"; + case REG_TRCRSCTLR7: return "trcrsctlr7"; + case REG_TRCRSCTLR23: return "trcrsctlr23"; + case REG_TRCSSCCR7: return "trcssccr7"; + case REG_TRCSSPCICR7: return "trcsspcicr7"; + case REG_TRCRSCTLR8: return "trcrsctlr8"; + case REG_TRCRSCTLR24: return "trcrsctlr24"; + case REG_TRCSSCSR0: return "trcsscsr0"; + case REG_TRCRSCTLR9: return "trcrsctlr9"; + case REG_TRCRSCTLR25: return "trcrsctlr25"; + case REG_TRCSSCSR1: return "trcsscsr1"; + case REG_TRCRSCTLR10: return "trcrsctlr10"; + case REG_TRCRSCTLR26: return "trcrsctlr26"; + case REG_TRCSSCSR2: return "trcsscsr2"; + case REG_TRCRSCTLR11: return "trcrsctlr11"; + case REG_TRCRSCTLR27: return "trcrsctlr27"; + case REG_TRCSSCSR3: return "trcsscsr3"; + case REG_TRCRSCTLR12: return "trcrsctlr12"; + case REG_TRCRSCTLR28: return "trcrsctlr28"; + case REG_TRCSSCSR4: return "trcsscsr4"; + case REG_TRCRSCTLR13: return "trcrsctlr13"; + case REG_TRCRSCTLR29: return "trcrsctlr29"; + case REG_TRCSSCSR5: return "trcsscsr5"; + case REG_TRCRSCTLR14: return "trcrsctlr14"; + case REG_TRCRSCTLR30: return "trcrsctlr30"; + case REG_TRCSSCSR6: return "trcsscsr6"; + case REG_TRCRSCTLR15: return "trcrsctlr15"; + case REG_TRCRSCTLR31: return "trcrsctlr31"; + case REG_TRCSSCSR7: return "trcsscsr7"; + case REG_TRCACVR0: return "trcacvr0"; + case REG_TRCACVR8: return "trcacvr8"; + case REG_TRCACATR0: return "trcacatr0"; + case REG_TRCACATR8: return "trcacatr8"; + case REG_TRCDVCVR0: return "trcdvcvr0"; + case REG_TRCDVCVR4: return "trcdvcvr4"; + case REG_TRCDVCMR0: return "trcdvcmr0"; + case REG_TRCDVCMR4: return "trcdvcmr4"; + case REG_TRCACVR1: return "trcacvr1"; + case REG_TRCACVR9: return "trcacvr9"; + case REG_TRCACATR1: return "trcacatr1"; + case REG_TRCACATR9: return "trcacatr9"; + case REG_TRCACVR2: return "trcacvr2"; + case REG_TRCACVR10: return "trcacvr10"; + case REG_TRCACATR2: return "trcacatr2"; + case REG_TRCACATR10: return "trcacatr10"; + case REG_TRCDVCVR1: return "trcdvcvr1"; + case REG_TRCDVCVR5: return "trcdvcvr5"; + case REG_TRCDVCMR1: return "trcdvcmr1"; + case REG_TRCDVCMR5: return "trcdvcmr5"; + case REG_TRCACVR3: return "trcacvr3"; + case REG_TRCACVR11: return "trcacvr11"; + case REG_TRCACATR3: return "trcacatr3"; + case REG_TRCACATR11: return "trcacatr11"; + case REG_TRCACVR4: return "trcacvr4"; + case REG_TRCACVR12: return "trcacvr12"; + case REG_TRCACATR4: return "trcacatr4"; + case REG_TRCACATR12: return "trcacatr12"; + case REG_TRCDVCVR2: return "trcdvcvr2"; + case REG_TRCDVCVR6: return "trcdvcvr6"; + case REG_TRCDVCMR2: return "trcdvcmr2"; + case REG_TRCDVCMR6: return "trcdvcmr6"; + case REG_TRCACVR5: return "trcacvr5"; + case REG_TRCACVR13: return "trcacvr13"; + case REG_TRCACATR5: return "trcacatr5"; + case REG_TRCACATR13: return "trcacatr13"; + case REG_TRCACVR6: return "trcacvr6"; + case REG_TRCACVR14: return "trcacvr14"; + case REG_TRCACATR6: return "trcacatr6"; + case REG_TRCACATR14: return "trcacatr14"; + case REG_TRCDVCVR3: return "trcdvcvr3"; + case REG_TRCDVCVR7: return "trcdvcvr7"; + case REG_TRCDVCMR3: return "trcdvcmr3"; + case REG_TRCDVCMR7: return "trcdvcmr7"; + case REG_TRCACVR7: return "trcacvr7"; + case REG_TRCACVR15: return "trcacvr15"; + case REG_TRCACATR7: return "trcacatr7"; + case REG_TRCACATR15: return "trcacatr15"; + case REG_TRCCIDCVR0: return "trccidcvr0"; + case REG_TRCVMIDCVR0: return "trcvmidcvr0"; + case REG_TRCCIDCCTLR0: return "trccidcctlr0"; + case REG_TRCCIDCCTLR1: return "trccidcctlr1"; + case REG_TRCCIDCVR1: return "trccidcvr1"; + case REG_TRCVMIDCVR1: return "trcvmidcvr1"; + case REG_TRCVMIDCCTLR0: return "trcvmidcctlr0"; + case REG_TRCVMIDCCTLR1: return "trcvmidcctlr1"; + case REG_TRCCIDCVR2: return "trccidcvr2"; + case REG_TRCVMIDCVR2: return "trcvmidcvr2"; + case REG_TRCCIDCVR3: return "trccidcvr3"; + case REG_TRCVMIDCVR3: return "trcvmidcvr3"; + case REG_TRCCIDCVR4: return "trccidcvr4"; + case REG_TRCVMIDCVR4: return "trcvmidcvr4"; + case REG_TRCCIDCVR5: return "trccidcvr5"; + case REG_TRCVMIDCVR5: return "trcvmidcvr5"; + case REG_TRCCIDCVR6: return "trccidcvr6"; + case REG_TRCVMIDCVR6: return "trcvmidcvr6"; + case REG_TRCCIDCVR7: return "trccidcvr7"; + case REG_TRCVMIDCVR7: return "trcvmidcvr7"; + case REG_TRCITCTRL: return "trcitctrl"; + case REG_TRCCLAIMSET: return "trcclaimset"; + case REG_TRCCLAIMCLR: return "trcclaimclr"; + case REG_TRCLAR: return "trclar"; + case REG_TEECR32_EL1: return "teecr32_el1"; + case REG_TEEHBR32_EL1: return "teehbr32_el1"; + case REG_MDCCSR_EL0: return "mdccsr_el0"; + case REG_DBGDTR_EL0: return "dbgdtr_el0"; + case REG_DBGDTRRX_EL0: return "dbgdtrrx_el0"; + case REG_DBGVCR32_EL2: return "dbgvcr32_el2"; + case REG_MIDR_EL1: return "midr_el1"; + case REG_MPIDR_EL1: return "mpidr_el1"; + case REG_REVIDR_EL1: return "revidr_el1"; + case REG_ID_PFR0_EL1: return "id_pfr0_el1"; + case REG_ID_PFR1_EL1: return "id_pfr1_el1"; + case REG_ID_DFR0_EL1: return "id_dfr0_el1"; + case REG_ID_AFR0_EL1: return "id_afr0_el1"; + case REG_ID_MMFR0_EL1: return "id_mmfr0_el1"; + case REG_ID_MMFR1_EL1: return "id_mmfr1_el1"; + case REG_ID_MMFR2_EL1: return "id_mmfr2_el1"; + case REG_ID_MMFR3_EL1: return "id_mmfr3_el1"; + case REG_ID_ISAR0_EL1: return "id_isar0_el1"; + case REG_ID_ISAR1_EL1: return "id_isar1_el1"; + case REG_ID_ISAR2_EL1: return "id_isar2_el1"; + case REG_ID_ISAR3_EL1: return "id_isar3_el1"; + case REG_ID_ISAR4_EL1: return "id_isar4_el1"; + case REG_ID_ISAR5_EL1: return "id_isar5_el1"; + case REG_ID_MMFR4_EL1: return "id_mmfr4_el1"; + case REG_ID_ISAR6_EL1: return "id_isar6_el1"; + case REG_MVFR0_EL1: return "mvfr0_el1"; + case REG_MVFR1_EL1: return "mvfr1_el1"; + case REG_MVFR2_EL1: return "mvfr2_el1"; + case REG_ID_AA32RES3_EL1: return "id_aa32res3_el1"; + case REG_ID_PFR2_EL1: return "id_pfr2_el1"; + case REG_ID_AA32RES5_EL1: return "id_aa32res5_el1"; + case REG_ID_AA32RES6_EL1: return "id_aa32res6_el1"; + case REG_ID_AA32RES7_EL1: return "id_aa32res7_el1"; + case REG_ID_AA64PFR0_EL1: return "id_aa64pfr0_el1"; + case REG_ID_AA64PFR1_EL1: return "id_aa64pfr1_el1"; + case REG_ID_AA64PFR2_EL1: return "id_aa64pfr2_el1"; + case REG_ID_AA64PFR3_EL1: return "id_aa64pfr3_el1"; + case REG_ID_AA64ZFR0_EL1: return "id_aa64zfr0_el1"; + case REG_ID_AA64SMFR0_EL1: return "id_aa64smfr0_el1"; + case REG_ID_AA64ZFR2_EL1: return "id_aa64zfr2_el1"; + case REG_ID_AA64ZFR3_EL1: return "id_aa64zfr3_el1"; + case REG_ID_AA64DFR0_EL1: return "id_aa64dfr0_el1"; + case REG_ID_AA64DFR1_EL1: return "id_aa64dfr1_el1"; + case REG_ID_AA64DFR2_EL1: return "id_aa64dfr2_el1"; + case REG_ID_AA64DFR3_EL1: return "id_aa64dfr3_el1"; + case REG_ID_AA64AFR0_EL1: return "id_aa64afr0_el1"; + case REG_ID_AA64AFR1_EL1: return "id_aa64afr1_el1"; + case REG_ID_AA64AFR2_EL1: return "id_aa64afr2_el1"; + case REG_ID_AA64AFR3_EL1: return "id_aa64afr3_el1"; + case REG_ID_AA64ISAR0_EL1: return "id_aa64isar0_el1"; + case REG_ID_AA64ISAR1_EL1: return "id_aa64isar1_el1"; + case REG_ID_AA64ISAR2_EL1: return "id_aa64isar2_el1"; + case REG_ID_AA64ISAR3_EL1: return "id_aa64isar3_el1"; + case REG_ID_AA64ISAR4_EL1: return "id_aa64isar4_el1"; + case REG_ID_AA64ISAR5_EL1: return "id_aa64isar5_el1"; + case REG_ID_AA64ISAR6_EL1: return "id_aa64isar6_el1"; + case REG_ID_AA64ISAR7_EL1: return "id_aa64isar7_el1"; + case REG_ID_AA64MMFR0_EL1: return "id_aa64mmfr0_el1"; + case REG_ID_AA64MMFR1_EL1: return "id_aa64mmfr1_el1"; + case REG_ID_AA64MMFR2_EL1: return "id_aa64mmfr2_el1"; + case REG_ID_AA64MMFR3_EL1: return "id_aa64mmfr3_el1"; + case REG_ID_AA64MMFR4_EL1: return "id_aa64mmfr4_el1"; + case REG_ID_AA64MMFR5_EL1: return "id_aa64mmfr5_el1"; + case REG_ID_AA64MMFR6_EL1: return "id_aa64mmfr6_el1"; + case REG_ID_AA64MMFR7_EL1: return "id_aa64mmfr7_el1"; + case REG_SCTLR_EL1: return "sctlr_el1"; + case REG_ACTLR_EL1: return "actlr_el1"; + case REG_CPACR_EL1: return "cpacr_el1"; + case REG_RGSR_EL1: return "rgsr_el1"; + case REG_GCR_EL1: return "gcr_el1"; + case REG_TRFCR_EL1: return "trfcr_el1"; + case REG_SMPRI_EL1: return "smpri_el1"; + case REG_SMCR_EL1: return "smcr_el1"; + case REG_TTBR0_EL1: return "ttbr0_el1"; + case REG_TTBR1_EL1: return "ttbr1_el1"; + case REG_TCR_EL1: return "tcr_el1"; + case REG_APIAKEYLO_EL1: return "apiakeylo_el1"; + case REG_APIAKEYHI_EL1: return "apiakeyhi_el1"; + case REG_APIBKEYLO_EL1: return "apibkeylo_el1"; + case REG_APIBKEYHI_EL1: return "apibkeyhi_el1"; + case REG_APDAKEYLO_EL1: return "apdakeylo_el1"; + case REG_APDAKEYHI_EL1: return "apdakeyhi_el1"; + case REG_APDBKEYLO_EL1: return "apdbkeylo_el1"; + case REG_APDBKEYHI_EL1: return "apdbkeyhi_el1"; + case REG_APGAKEYLO_EL1: return "apgakeylo_el1"; + case REG_APGAKEYHI_EL1: return "apgakeyhi_el1"; + case REG_SPSR_EL1: return "spsr_el1"; + case REG_ELR_EL1: return "elr_el1"; + case REG_SP_EL0: return "sp_el0"; + case REG_SPSEL: return "spsel"; + case REG_CURRENTEL: return "currentel"; + case REG_PAN: return "pan"; + case REG_UAO: return "uao"; + case REG_ICV_PMR_EL1: return "icv_pmr_el1"; + case REG_AFSR0_EL1: return "afsr0_el1"; + case REG_AFSR1_EL1: return "afsr1_el1"; + case REG_ESR_EL1: return "esr_el1"; + case REG_ERRIDR_EL1: return "erridr_el1"; + case REG_ERRSELR_EL1: return "errselr_el1"; + case REG_ERXCTLR_EL1: return "erxctlr_el1"; + case REG_ERXSTATUS_EL1: return "erxstatus_el1"; + case REG_ERXADDR_EL1: return "erxaddr_el1"; + case REG_ERXPFGCTL_EL1: return "erxpfgctl_el1"; + case REG_ERXPFGCDN_EL1: return "erxpfgcdn_el1"; + case REG_ERXMISC0_EL1: return "erxmisc0_el1"; + case REG_ERXMISC1_EL1: return "erxmisc1_el1"; + case REG_ERXMISC2_EL1: return "erxmisc2_el1"; + case REG_ERXMISC3_EL1: return "erxmisc3_el1"; + case REG_ERXTS_EL1: return "erxts_el1"; + case REG_TFSR_EL1: return "tfsr_el1"; + case REG_TFSRE0_EL1: return "tfsre0_el1"; + case REG_FAR_EL1: return "far_el1"; + case REG_PAR_EL1: return "par_el1"; + case REG_PMSCR_EL1: return "pmscr_el1"; + case REG_PMSICR_EL1: return "pmsicr_el1"; + case REG_PMSIRR_EL1: return "pmsirr_el1"; + case REG_PMSFCR_EL1: return "pmsfcr_el1"; + case REG_PMSEVFR_EL1: return "pmsevfr_el1"; + case REG_PMSLATFR_EL1: return "pmslatfr_el1"; + case REG_PMSIDR_EL1: return "pmsidr_el1"; + case REG_PMBLIMITR_EL1: return "pmblimitr_el1"; + case REG_PMBPTR_EL1: return "pmbptr_el1"; + case REG_PMBSR_EL1: return "pmbsr_el1"; + case REG_PMBIDR_EL1: return "pmbidr_el1"; + case REG_TRBLIMITR_EL1: return "trblimitr_el1"; + case REG_TRBPTR_EL1: return "trbptr_el1"; + case REG_TRBBASER_EL1: return "trbbaser_el1"; + case REG_TRBSR_EL1: return "trbsr_el1"; + case REG_TRBMAR_EL1: return "trbmar_el1"; + case REG_TRBTRG_EL1: return "trbtrg_el1"; + case REG_PMINTENSET_EL1: return "pmintenset_el1"; + case REG_PMINTENCLR_EL1: return "pmintenclr_el1"; + case REG_PMMIR_EL1: return "pmmir_el1"; + case REG_MAIR_EL1: return "mair_el1"; + case REG_AMAIR_EL1: return "amair_el1"; + case REG_LORSA_EL1: return "lorsa_el1"; + case REG_LOREA_EL1: return "lorea_el1"; + case REG_LORN_EL1: return "lorn_el1"; + case REG_LORC_EL1: return "lorc_el1"; + case REG_LORID_EL1: return "lorid_el1"; + case REG_MPAM1_EL1: return "mpam1_el1"; + case REG_MPAM0_EL1: return "mpam0_el1"; + case REG_CTRR_C_LWR_EL1: return "ctrr_c_lwr_el1"; + case REG_CTRR_C_UPR_EL1: return "ctrr_c_upr_el1"; + case REG_CTRR_D_LWR_EL1: return "ctrr_d_lwr_el1"; + case REG_CTRR_D_UPR_EL1: return "ctrr_d_upr_el1"; + case REG_CTRR_C_LWR_EL12: return "ctrr_c_lwr_el12"; + case REG_CTRR_C_UPR_EL12: return "ctrr_c_upr_el12"; + case REG_CTRR_D_LWR_EL12: return "ctrr_d_lwr_el12"; + case REG_CTRR_D_UPR_EL12: return "ctrr_d_upr_el12"; + case REG_CTRR_C_LWR_EL2: return "ctrr_c_lwr_el2"; + case REG_CTRR_C_UPR_EL2: return "ctrr_c_upr_el2"; + case REG_CTRR_D_LWR_EL2: return "ctrr_d_lwr_el2"; + case REG_CTRR_D_UPR_EL2: return "ctrr_d_upr_el2"; + case REG_CTRR_C_CTL_EL1: return "ctrr_c_ctl_el1"; + case REG_CTRR_D_CTL_EL1: return "ctrr_d_ctl_el1"; + case REG_CTRR_C_CTL_EL12: return "ctrr_c_ctl_el12"; + case REG_CTRR_D_CTL_EL12: return "ctrr_d_ctl_el12"; + case REG_CTRR_C_CTL_EL2: return "ctrr_c_ctl_el2"; + case REG_CTRR_D_CTL_EL2: return "ctrr_d_ctl_el2"; + case REG_CTXR_A_LWR_EL1: return "ctxr_a_lwr_el1"; + case REG_CTXR_A_UPR_EL1: return "ctxr_a_upr_el1"; + case REG_CTXR_B_LWR_EL1: return "ctxr_b_lwr_el1"; + case REG_CTXR_B_UPR_EL1: return "ctxr_b_upr_el1"; + case REG_CTXR_C_LWR_EL1: return "ctxr_c_lwr_el1"; + case REG_CTXR_C_UPR_EL1: return "ctxr_c_upr_el1"; + case REG_CTXR_D_LWR_EL1: return "ctxr_d_lwr_el1"; + case REG_CTXR_D_UPR_EL1: return "ctxr_d_upr_el1"; + case REG_CTXR_A_LWR_EL12: return "ctxr_a_lwr_el12"; + case REG_CTXR_A_UPR_EL12: return "ctxr_a_upr_el12"; + case REG_CTXR_B_LWR_EL12: return "ctxr_b_lwr_el12"; + case REG_CTXR_B_UPR_EL12: return "ctxr_b_upr_el12"; + case REG_CTXR_C_LWR_EL12: return "ctxr_c_lwr_el12"; + case REG_CTXR_C_UPR_EL12: return "ctxr_c_upr_el12"; + case REG_CTXR_D_LWR_EL12: return "ctxr_d_lwr_el12"; + case REG_CTXR_D_UPR_EL12: return "ctxr_d_upr_el12"; + case REG_CTXR_A_LWR_EL2: return "ctxr_a_lwr_el2"; + case REG_CTXR_A_UPR_EL2: return "ctxr_a_upr_el2"; + case REG_CTXR_B_LWR_EL2: return "ctxr_b_lwr_el2"; + case REG_CTXR_B_UPR_EL2: return "ctxr_b_upr_el2"; + case REG_CTXR_C_LWR_EL2: return "ctxr_c_lwr_el2"; + case REG_CTXR_C_UPR_EL2: return "ctxr_c_upr_el2"; + case REG_CTXR_D_LWR_EL2: return "ctxr_d_lwr_el2"; + case REG_CTXR_D_UPR_EL2: return "ctxr_d_upr_el2"; + case REG_CTXR_A_CTL_EL1: return "ctxr_a_ctl_el1"; + case REG_CTXR_B_CTL_EL1: return "ctxr_b_ctl_el1"; + case REG_CTXR_C_CTL_EL1: return "ctxr_c_ctl_el1"; + case REG_CTXR_D_CTL_EL1: return "ctxr_d_ctl_el1"; + case REG_CTXR_A_CTL_EL12: return "ctxr_a_ctl_el12"; + case REG_CTXR_B_CTL_EL12: return "ctxr_b_ctl_el12"; + case REG_CTXR_C_CTL_EL12: return "ctxr_c_ctl_el12"; + case REG_CTXR_D_CTL_EL12: return "ctxr_d_ctl_el12"; + case REG_CTXR_A_CTL_EL2: return "ctxr_a_ctl_el2"; + case REG_CTXR_B_CTL_EL2: return "ctxr_b_ctl_el2"; + case REG_CTXR_C_CTL_EL2: return "ctxr_c_ctl_el2"; + case REG_CTXR_D_CTL_EL2: return "ctxr_d_ctl_el2"; + case REG_ACC_CTRR_C_LWR_EL2: return "acc_ctrr_c_lwr_el2"; + case REG_ACC_CTRR_C_UPR_EL2: return "acc_ctrr_c_upr_el2"; + case REG_ACC_CTRR_D_LWR_EL2: return "acc_ctrr_d_lwr_el2"; + case REG_ACC_CTRR_D_UPR_EL2: return "acc_ctrr_d_upr_el2"; + case REG_ACC_CTXR_A_LWR_EL2: return "acc_ctxr_a_lwr_el2"; + case REG_ACC_CTXR_A_UPR_EL2: return "acc_ctxr_a_upr_el2"; + case REG_ACC_CTXR_B_LWR_EL2: return "acc_ctxr_b_lwr_el2"; + case REG_ACC_CTXR_B_UPR_EL2: return "acc_ctxr_b_upr_el2"; + case REG_ACC_CTXR_C_LWR_EL2: return "acc_ctxr_c_lwr_el2"; + case REG_ACC_CTXR_C_UPR_EL2: return "acc_ctxr_c_upr_el2"; + case REG_ACC_CTXR_D_LWR_EL2: return "acc_ctxr_d_lwr_el2"; + case REG_ACC_CTXR_D_UPR_EL2: return "acc_ctxr_d_upr_el2"; + case REG_ACC_CTRR_C_CTL_EL2: return "acc_ctrr_c_ctl_el2"; + case REG_ACC_CTRR_D_CTL_EL2: return "acc_ctrr_d_ctl_el2"; + case REG_ACC_CTXR_A_CTL_EL2: return "acc_ctxr_a_ctl_el2"; + case REG_ACC_CTXR_B_CTL_EL2: return "acc_ctxr_b_ctl_el2"; + case REG_ACC_CTXR_C_CTL_EL2: return "acc_ctxr_c_ctl_el2"; + case REG_ACC_CTXR_D_CTL_EL2: return "acc_ctxr_d_ctl_el2"; + case REG_VBAR_EL1: return "vbar_el1"; + case REG_RVBAR_EL1: return "rvbar_el1"; + case REG_RMR_EL1: return "rmr_el1"; + case REG_ISR_EL1: return "isr_el1"; + case REG_DISR_EL1: return "disr_el1"; + case REG_ICV_IAR0_EL1: return "icv_iar0_el1"; + case REG_ICV_EOIR0_EL1: return "icv_eoir0_el1"; + case REG_ICV_HPPIR0_EL1: return "icv_hppir0_el1"; + case REG_ICV_BPR0_EL1: return "icv_bpr0_el1"; + case REG_ICC_AP0R0_EL1: return "icc_ap0r0_el1"; + case REG_ICC_AP0R1_EL1: return "icc_ap0r1_el1"; + case REG_ICC_AP0R2_EL1: return "icc_ap0r2_el1"; + case REG_ICC_AP0R3_EL1: return "icc_ap0r3_el1"; + case REG_ICC_AP1R0_EL1: return "icc_ap1r0_el1"; + case REG_ICC_AP1R1_EL1: return "icc_ap1r1_el1"; + case REG_ICC_AP1R2_EL1: return "icc_ap1r2_el1"; + case REG_ICC_AP1R3_EL1: return "icc_ap1r3_el1"; + case REG_ICV_DIR_EL1: return "icv_dir_el1"; + case REG_ICV_RPR_EL1: return "icv_rpr_el1"; + case REG_ICC_SGI1R_EL1: return "icc_sgi1r_el1"; + case REG_ICC_ASGI1R_EL1: return "icc_asgi1r_el1"; + case REG_ICC_SGI0R_EL1: return "icc_sgi0r_el1"; + case REG_ICV_IAR1_EL1: return "icv_iar1_el1"; + case REG_ICV_EOIR1_EL1: return "icv_eoir1_el1"; + case REG_ICV_HPPIR1_EL1: return "icv_hppir1_el1"; + case REG_ICV_BPR1CBPR_EL1: return "icv_bpr1cbpr_el1"; + case REG_ICV_CTLR_EL1: return "icv_ctlr_el1"; + case REG_ICC_SRE_EL1: return "icc_sre_el1"; + case REG_ICV_IGRPEN0_EL1: return "icv_igrpen0_el1"; + case REG_ICV_IGRPEN1_EL1: return "icv_igrpen1_el1"; + case REG_ICC_SEIEN_EL1: return "icc_seien_el1"; + case REG_CONTEXTIDR_EL1: return "contextidr_el1"; + case REG_TPIDR_EL1: return "tpidr_el1"; + case REG_SCXTNUM_EL1: return "scxtnum_el1"; + case REG_CNTHCTL_EL21: return "cnthctl_el21"; + case REG_HID0: return "hid0"; + case REG_HID25: return "hid25"; + case REG_HID26: return "hid26"; + case REG_HID27: return "hid27"; + case REG_HID28: return "hid28"; + case REG_HID29: return "hid29"; + case REG_HID34: return "hid34"; + case REG_HID1: return "hid1"; + case REG_HID21: return "hid21"; + case REG_BIUVCSCUPCMDCRD: return "biuvcscupcmdcrd"; + case REG_BIUVCSCUPDATCRD: return "biuvcscupdatcrd"; + case REG_HID2: return "hid2"; + case REG_HID30: return "hid30"; + case REG_HID31: return "hid31"; + case REG_HID32: return "hid32"; + case REG_HID33: return "hid33"; + case REG_HID3: return "hid3"; + case REG_BIUVCSCUPCMDCRDC2: return "biuvcscupcmdcrdc2"; + case REG_BIUVCSCUPDATCRDC2: return "biuvcscupdatcrdc2"; + case REG_HID4: return "hid4"; + case REG_HID5: return "hid5"; + case REG_HID6: return "hid6"; + case REG_HID7: return "hid7"; + case REG_HID8: return "hid8"; + case REG_HID9: return "hid9"; + case REG_HID10: return "hid10"; + case REG_BLOCK_CMAINT_CFG: return "block_cmaint_cfg"; + case REG_HID11: return "hid11"; + case REG_HID18: return "hid18"; + case REG_HID36: return "hid36"; + case REG_HID37: return "hid37"; + case REG_HID12: return "hid12"; + case REG_HID15: return "hid15"; + case REG_HID19: return "hid19"; + case REG_BIU_TLIMIT: return "biu_tlimit"; + case REG_HID13: return "hid13"; + case REG_HID_RCTX_G0CTL: return "hid_rctx_g0ctl"; + case REG_HID_RCTX_G1CTL: return "hid_rctx_g1ctl"; + case REG_HID14: return "hid14"; + case REG_HID16: return "hid16"; + case REG_LLC_WRR2: return "llc_wrr2"; + case REG_BIU_AFI_CFG: return "biu_afi_cfg"; + case REG_HID17: return "hid17"; + case REG_HID24: return "hid24"; + case REG_HID35: return "hid35"; + case REG_CCSIDR_EL1: return "ccsidr_el1"; + case REG_CLIDR_EL1: return "clidr_el1"; + case REG_SMIDR_EL1: return "smidr_el1"; + case REG_AIDR_EL1: return "aidr_el1"; + case REG_PMCR0_EL1: return "pmcr0_el1"; + case REG_APPL_CONTEXTPTR: return "appl_contextptr"; + case REG_LD_LATPROF_CTL_EL1: return "ld_latprof_ctl_el1"; + case REG_AON_CPU_MSTALL_CTL01_EL1: return "aon_cpu_mstall_ctl01_el1"; + case REG_PM_MEMFLT_CTL23_EL1: return "pm_memflt_ctl23_el1"; + case REG_AGTCNTHV_CTL_EL21: return "agtcnthv_ctl_el21"; + case REG_AGTCNTVCTSS_NOREDIR_EL0: return "agtcntvctss_noredir_el0"; + case REG_PMCR1_EL1: return "pmcr1_el1"; + case REG_LD_LATPROF_CTR_EL1: return "ld_latprof_ctr_el1"; + case REG_AON_CPU_MSTALL_CTL23_EL1: return "aon_cpu_mstall_ctl23_el1"; + case REG_PM_MEMFLT_CTL45_EL1: return "pm_memflt_ctl45_el1"; + case REG_AGTCNTRDIR_EL1: return "agtcntrdir_el1"; + case REG_AGTCNTHCTL_NOREDIR_EL21: return "agtcnthctl_noredir_el21"; + case REG_PMCR2_EL1: return "pmcr2_el1"; + case REG_LD_LATPROF_STS_EL1: return "ld_latprof_sts_el1"; + case REG_AON_CPU_MSTALL_CTL45_EL1: return "aon_cpu_mstall_ctl45_el1"; + case REG_AGTCNTHP_CVAL_EL2: return "agtcnthp_cval_el2"; + case REG_CNTVCT_NOREDIR_EL0: return "cntvct_noredir_el0"; + case REG_AGTCNTHP_CVAL_NOREDIR_EL21: return "agtcnthp_cval_noredir_el21"; + case REG_PMCR3_EL1: return "pmcr3_el1"; + case REG_LD_LATPROF_INF_EL1: return "ld_latprof_inf_el1"; + case REG_AON_CPU_MSTALL_CTL67_EL1: return "aon_cpu_mstall_ctl67_el1"; + case REG_AGTCNTHP_TVAL_EL2: return "agtcnthp_tval_el2"; + case REG_CNTPCTSS_NOREDIR_EL0: return "cntpctss_noredir_el0"; + case REG_AGTCNTHP_TVAL_NOREDIR_EL21: return "agtcnthp_tval_noredir_el21"; + case REG_PMCR4_EL1: return "pmcr4_el1"; + case REG_LD_LATPROF_CTL_EL2: return "ld_latprof_ctl_el2"; + case REG_AON_CPU_MEMFLT_CTL01_EL1: return "aon_cpu_memflt_ctl01_el1"; + case REG_AGTCNTHP_CTL_EL2: return "agtcnthp_ctl_el2"; + case REG_CNTVCTSS_NOREDIR_EL0: return "cntvctss_noredir_el0"; + case REG_AGTCNTHP_CTL_NOREDIR_EL21: return "agtcnthp_ctl_noredir_el21"; + case REG_PMESR0_EL1: return "pmesr0_el1"; + case REG_LD_LATPROF_CMD_EL1: return "ld_latprof_cmd_el1"; + case REG_AON_CPU_MEMFLT_CTL23_EL1: return "aon_cpu_memflt_ctl23_el1"; + case REG_AGTCNTHV_CVAL_EL2: return "agtcnthv_cval_el2"; + case REG_AGTCNTHV_CVAL_NOREDIR_EL21: return "agtcnthv_cval_noredir_el21"; + case REG_PMESR1_EL1: return "pmesr1_el1"; + case REG_PMCR1_EL2: return "pmcr1_el2"; + case REG_AON_CPU_MEMFLT_CTL45_EL1: return "aon_cpu_memflt_ctl45_el1"; + case REG_AGTCNTHV_TVAL_EL2: return "agtcnthv_tval_el2"; + case REG_CNTHCTL_NOREDIR_EL21: return "cnthctl_noredir_el21"; + case REG_AGTCNTHV_TVAL_NOREDIR_EL21: return "agtcnthv_tval_noredir_el21"; + case REG_OPMAT0_EL1: return "opmat0_el1"; + case REG_PMCR1_EL12: return "pmcr1_el12"; + case REG_AON_CPU_MEMFLT_CTL67_EL1: return "aon_cpu_memflt_ctl67_el1"; + case REG_AGTCNTHV_CTL_EL2: return "agtcnthv_ctl_el2"; + case REG_CNTHP_CVAL_NOREDIR_EL21: return "cnthp_cval_noredir_el21"; + case REG_AGTCNTHV_CTL_NOREDIR_EL21: return "agtcnthv_ctl_noredir_el21"; + case REG_OPMAT1_EL1: return "opmat1_el1"; + case REG_PMCR1_GL12: return "pmcr1_gl12"; + case REG_AON_CPU_MSTALL_CTR0_EL1: return "aon_cpu_mstall_ctr0_el1"; + case REG_AGTCNTFRQ_EL0: return "agtcntfrq_el0"; + case REG_CNTHP_TVAL_NOREDIR_EL21: return "cnthp_tval_noredir_el21"; + case REG_CNTPCT_NOREDIR_EL0: return "cntpct_noredir_el0"; + case REG_OPMSK0_EL1: return "opmsk0_el1"; + case REG_LD_LATPROF_CTL_EL12: return "ld_latprof_ctl_el12"; + case REG_AON_CPU_MSTALL_CTR1_EL1: return "aon_cpu_mstall_ctr1_el1"; + case REG_AGTCNTVOFF_EL2: return "agtcntvoff_el2"; + case REG_CNTHP_CTL_NOREDIR_EL21: return "cnthp_ctl_noredir_el21"; + case REG_CNTHV_CTL_NOREDIR_EL21: return "cnthv_ctl_noredir_el21"; + case REG_OPMSK1_EL1: return "opmsk1_el1"; + case REG_LD_LATPROF_INF_EL2: return "ld_latprof_inf_el2"; + case REG_AON_CPU_MSTALL_CTR2_EL1: return "aon_cpu_mstall_ctr2_el1"; + case REG_AGTCNTHP_CVAL_EL21: return "agtcnthp_cval_el21"; + case REG_CNTHV_CVAL_NOREDIR_EL21: return "cnthv_cval_noredir_el21"; + case REG_AGTCNTPCT_NOREDIR_EL0: return "agtcntpct_noredir_el0"; + case REG_AON_CPU_MSTALL_CTR3_EL1: return "aon_cpu_mstall_ctr3_el1"; + case REG_AGTCNTHP_TVAL_EL21: return "agtcnthp_tval_el21"; + case REG_CNTHV_TVAL_NOREDIR_EL21: return "cnthv_tval_noredir_el21"; + case REG_VMSA_HV_LOCK_EL2: return "vmsa_hv_lock_el2"; + case REG_PMSWCTRL_EL1: return "pmswctrl_el1"; + case REG_PMCR5_EL0: return "pmcr5_el0"; + case REG_AON_CPU_MSTALL_CTR4_EL1: return "aon_cpu_mstall_ctr4_el1"; + case REG_PMCOMPARE0_EL1: return "pmcompare0_el1"; + case REG_PMCOMPARE1_EL1: return "pmcompare1_el1"; + case REG_VMSA_NV_LOCK_EL2: return "vmsa_nv_lock_el2"; + case REG_PMSR_EL1: return "pmsr_el1"; + case REG_AON_CPU_MSTALL_CTR5_EL1: return "aon_cpu_mstall_ctr5_el1"; + case REG_AGTCNTHP_CTL_EL21: return "agtcnthp_ctl_el21"; + case REG_PMCOMPARE5_EL1: return "pmcompare5_el1"; + case REG_PMCOMPARE6_EL1: return "pmcompare6_el1"; + case REG_PMCOMPARE7_EL1: return "pmcompare7_el1"; + case REG_PMCR_BVRNG4_EL1: return "pmcr_bvrng4_el1"; + case REG_PM_PMI_PC: return "pm_pmi_pc"; + case REG_AON_CPU_MSTALL_CTR6_EL1: return "aon_cpu_mstall_ctr6_el1"; + case REG_AGTCNTHV_CVAL_EL21: return "agtcnthv_cval_el21"; + case REG_AGTCNTVCT_NOREDIR_EL0: return "agtcntvct_noredir_el0"; + case REG_PMCR_BVRNG5_EL1: return "pmcr_bvrng5_el1"; + case REG_AON_CPU_MSTALL_CTR7_EL1: return "aon_cpu_mstall_ctr7_el1"; + case REG_AGTCNTHV_TVAL_EL21: return "agtcnthv_tval_el21"; + case REG_AGTCNTPCTSS_NOREDIR_EL0: return "agtcntpctss_noredir_el0"; + case REG_CSSELR_EL1: return "csselr_el1"; + case REG_PMC0: return "pmc0"; + case REG_UPMCFILTER0: return "upmcfilter0"; + case REG_UPMCFILTER1: return "upmcfilter1"; + case REG_UPMCFILTER2: return "upmcfilter2"; + case REG_UPMCFILTER3: return "upmcfilter3"; + case REG_UPMCFILTER4: return "upmcfilter4"; + case REG_UPMCFILTER5: return "upmcfilter5"; + case REG_UPMCFILTER6: return "upmcfilter6"; + case REG_PMC1: return "pmc1"; + case REG_UPMCFILTER7: return "upmcfilter7"; + case REG_PMC2: return "pmc2"; + case REG_PMC3: return "pmc3"; + case REG_PMC4: return "pmc4"; + case REG_PMC5: return "pmc5"; + case REG_PMC6: return "pmc6"; + case REG_PMC7: return "pmc7"; + case REG_PMC8: return "pmc8"; + case REG_PMC9: return "pmc9"; + case REG_PMTRHLD6_EL1: return "pmtrhld6_el1"; + case REG_PMTRHLD4_EL1: return "pmtrhld4_el1"; + case REG_PMTRHLD2_EL1: return "pmtrhld2_el1"; + case REG_PMMMAP_EL1: return "pmmmap_el1"; + case REG_CTR_EL0: return "ctr_el0"; + case REG_DCZID_EL0: return "dczid_el0"; + case REG_NZCV: return "nzcv"; + case REG_DAIF: return "daif"; + case REG_SVCR: return "svcr"; + case REG_DIT: return "dit"; + case REG_SSBS: return "ssbs"; + case REG_TCO: return "tco"; + case REG_FPCR: return "fpcr"; + case REG_FPSR: return "fpsr"; + case REG_DSPSR: return "dspsr"; + case REG_DLR: return "dlr"; + case REG_PMCR_EL0: return "pmcr_el0"; + case REG_PMCNTENSET_EL0: return "pmcntenset_el0"; + case REG_PMCNTENCLR_EL0: return "pmcntenclr_el0"; + case REG_PMOVSCLR_EL0: return "pmovsclr_el0"; + case REG_PMSWINC_EL0: return "pmswinc_el0"; + case REG_PMSELR_EL0: return "pmselr_el0"; + case REG_PMCCNTR_EL0: return "pmccntr_el0"; + case REG_PMXEVTYPER_EL0: return "pmxevtyper_el0"; + case REG_PMXEVCNTR_EL0: return "pmxevcntr_el0"; + case REG_DAIFCLR: return "daifclr"; + case REG_PMUSERENR_EL0: return "pmuserenr_el0"; + case REG_PMOVSSET_EL0: return "pmovsset_el0"; + case REG_TPIDR_EL0: return "tpidr_el0"; + case REG_TPIDRRO_EL0: return "tpidrro_el0"; + case REG_TPIDR2_EL0: return "tpidr2_el0"; + case REG_SCXTNUM_EL0: return "scxtnum_el0"; + case REG_AMCR_EL0: return "amcr_el0"; + case REG_AMUSERENR_EL0: return "amuserenr_el0"; + case REG_AMCNTENCLR0_EL0: return "amcntenclr0_el0"; + case REG_AMCNTENSET0_EL0: return "amcntenset0_el0"; + case REG_AMCNTENCLR1_EL0: return "amcntenclr1_el0"; + case REG_AMCNTENSET1_EL0: return "amcntenset1_el0"; + case REG_AMEVCNTR00_EL0: return "amevcntr00_el0"; + case REG_AMEVCNTR01_EL0: return "amevcntr01_el0"; + case REG_AMEVCNTR02_EL0: return "amevcntr02_el0"; + case REG_AMEVCNTR03_EL0: return "amevcntr03_el0"; + case REG_AMEVCNTR10_EL0: return "amevcntr10_el0"; + case REG_AMEVCNTR11_EL0: return "amevcntr11_el0"; + case REG_AMEVCNTR12_EL0: return "amevcntr12_el0"; + case REG_AMEVCNTR13_EL0: return "amevcntr13_el0"; + case REG_AMEVCNTR14_EL0: return "amevcntr14_el0"; + case REG_AMEVCNTR15_EL0: return "amevcntr15_el0"; + case REG_AMEVCNTR16_EL0: return "amevcntr16_el0"; + case REG_AMEVCNTR17_EL0: return "amevcntr17_el0"; + case REG_AMEVCNTR18_EL0: return "amevcntr18_el0"; + case REG_AMEVCNTR19_EL0: return "amevcntr19_el0"; + case REG_AMEVCNTR110_EL0: return "amevcntr110_el0"; + case REG_AMEVCNTR111_EL0: return "amevcntr111_el0"; + case REG_AMEVCNTR112_EL0: return "amevcntr112_el0"; + case REG_AMEVCNTR113_EL0: return "amevcntr113_el0"; + case REG_AMEVCNTR114_EL0: return "amevcntr114_el0"; + case REG_AMEVCNTR115_EL0: return "amevcntr115_el0"; + case REG_AMEVTYPER10_EL0: return "amevtyper10_el0"; + case REG_AMEVTYPER11_EL0: return "amevtyper11_el0"; + case REG_AMEVTYPER12_EL0: return "amevtyper12_el0"; + case REG_AMEVTYPER13_EL0: return "amevtyper13_el0"; + case REG_AMEVTYPER14_EL0: return "amevtyper14_el0"; + case REG_AMEVTYPER15_EL0: return "amevtyper15_el0"; + case REG_AMEVTYPER16_EL0: return "amevtyper16_el0"; + case REG_AMEVTYPER17_EL0: return "amevtyper17_el0"; + case REG_AMEVTYPER18_EL0: return "amevtyper18_el0"; + case REG_AMEVTYPER19_EL0: return "amevtyper19_el0"; + case REG_AMEVTYPER110_EL0: return "amevtyper110_el0"; + case REG_AMEVTYPER111_EL0: return "amevtyper111_el0"; + case REG_AMEVTYPER112_EL0: return "amevtyper112_el0"; + case REG_AMEVTYPER113_EL0: return "amevtyper113_el0"; + case REG_AMEVTYPER114_EL0: return "amevtyper114_el0"; + case REG_AMEVTYPER115_EL0: return "amevtyper115_el0"; + case REG_CNTFRQ_EL0: return "cntfrq_el0"; + case REG_CNTPCT_EL0: return "cntpct_el0"; + case REG_CNTVCT_EL0: return "cntvct_el0"; + case REG_CNTPCTSS_EL0: return "cntpctss_el0"; + case REG_CNTVCTSS_EL0: return "cntvctss_el0"; + case REG_CNTHP_TVAL_EL21: return "cnthp_tval_el21"; + case REG_CNTHP_CTL_EL21: return "cnthp_ctl_el21"; + case REG_CNTHP_CVAL_EL21: return "cnthp_cval_el21"; + case REG_CNTHV_TVAL_EL21: return "cnthv_tval_el21"; + case REG_CNTHV_CTL_EL21: return "cnthv_ctl_el21"; + case REG_CNTHV_CVAL_EL21: return "cnthv_cval_el21"; + case REG_PMEVCNTR0_EL0: return "pmevcntr0_el0"; + case REG_PMEVCNTR1_EL0: return "pmevcntr1_el0"; + case REG_PMEVCNTR2_EL0: return "pmevcntr2_el0"; + case REG_PMEVCNTR3_EL0: return "pmevcntr3_el0"; + case REG_PMEVCNTR4_EL0: return "pmevcntr4_el0"; + case REG_PMEVCNTR5_EL0: return "pmevcntr5_el0"; + case REG_PMEVCNTR6_EL0: return "pmevcntr6_el0"; + case REG_PMEVCNTR7_EL0: return "pmevcntr7_el0"; + case REG_PMEVCNTR8_EL0: return "pmevcntr8_el0"; + case REG_PMEVCNTR9_EL0: return "pmevcntr9_el0"; + case REG_PMEVCNTR10_EL0: return "pmevcntr10_el0"; + case REG_PMEVCNTR11_EL0: return "pmevcntr11_el0"; + case REG_PMEVCNTR12_EL0: return "pmevcntr12_el0"; + case REG_PMEVCNTR13_EL0: return "pmevcntr13_el0"; + case REG_PMEVCNTR14_EL0: return "pmevcntr14_el0"; + case REG_PMEVCNTR15_EL0: return "pmevcntr15_el0"; + case REG_PMEVCNTR16_EL0: return "pmevcntr16_el0"; + case REG_PMEVCNTR17_EL0: return "pmevcntr17_el0"; + case REG_PMEVCNTR18_EL0: return "pmevcntr18_el0"; + case REG_PMEVCNTR19_EL0: return "pmevcntr19_el0"; + case REG_PMEVCNTR20_EL0: return "pmevcntr20_el0"; + case REG_PMEVCNTR21_EL0: return "pmevcntr21_el0"; + case REG_PMEVCNTR22_EL0: return "pmevcntr22_el0"; + case REG_PMEVCNTR23_EL0: return "pmevcntr23_el0"; + case REG_PMEVCNTR24_EL0: return "pmevcntr24_el0"; + case REG_PMEVCNTR25_EL0: return "pmevcntr25_el0"; + case REG_PMEVCNTR26_EL0: return "pmevcntr26_el0"; + case REG_PMEVCNTR27_EL0: return "pmevcntr27_el0"; + case REG_PMEVCNTR28_EL0: return "pmevcntr28_el0"; + case REG_PMEVCNTR29_EL0: return "pmevcntr29_el0"; + case REG_PMEVCNTR30_EL0: return "pmevcntr30_el0"; + case REG_PMEVTYPER0_EL0: return "pmevtyper0_el0"; + case REG_PMEVTYPER1_EL0: return "pmevtyper1_el0"; + case REG_PMEVTYPER2_EL0: return "pmevtyper2_el0"; + case REG_PMEVTYPER3_EL0: return "pmevtyper3_el0"; + case REG_PMEVTYPER4_EL0: return "pmevtyper4_el0"; + case REG_PMEVTYPER5_EL0: return "pmevtyper5_el0"; + case REG_PMEVTYPER6_EL0: return "pmevtyper6_el0"; + case REG_PMEVTYPER7_EL0: return "pmevtyper7_el0"; + case REG_PMEVTYPER8_EL0: return "pmevtyper8_el0"; + case REG_PMEVTYPER9_EL0: return "pmevtyper9_el0"; + case REG_PMEVTYPER10_EL0: return "pmevtyper10_el0"; + case REG_PMEVTYPER11_EL0: return "pmevtyper11_el0"; + case REG_PMEVTYPER12_EL0: return "pmevtyper12_el0"; + case REG_PMEVTYPER13_EL0: return "pmevtyper13_el0"; + case REG_PMEVTYPER14_EL0: return "pmevtyper14_el0"; + case REG_PMEVTYPER15_EL0: return "pmevtyper15_el0"; + case REG_PMEVTYPER16_EL0: return "pmevtyper16_el0"; + case REG_PMEVTYPER17_EL0: return "pmevtyper17_el0"; + case REG_PMEVTYPER18_EL0: return "pmevtyper18_el0"; + case REG_PMEVTYPER19_EL0: return "pmevtyper19_el0"; + case REG_PMEVTYPER20_EL0: return "pmevtyper20_el0"; + case REG_PMEVTYPER21_EL0: return "pmevtyper21_el0"; + case REG_PMEVTYPER22_EL0: return "pmevtyper22_el0"; + case REG_PMEVTYPER23_EL0: return "pmevtyper23_el0"; + case REG_PMEVTYPER24_EL0: return "pmevtyper24_el0"; + case REG_PMEVTYPER25_EL0: return "pmevtyper25_el0"; + case REG_PMEVTYPER26_EL0: return "pmevtyper26_el0"; + case REG_PMEVTYPER27_EL0: return "pmevtyper27_el0"; + case REG_PMEVTYPER28_EL0: return "pmevtyper28_el0"; + case REG_PMEVTYPER29_EL0: return "pmevtyper29_el0"; + case REG_PMEVTYPER30_EL0: return "pmevtyper30_el0"; + case REG_PMCCFILTR_EL0: return "pmccfiltr_el0"; + case REG_LSU_ERR_STS: return "lsu_err_sts"; + case REG_AFLATCTL1_EL1: return "aflatctl1_el1"; + case REG_AFLATVALBIN0_EL1: return "aflatvalbin0_el1"; + case REG_AFLATINFLO_EL1: return "aflatinflo_el1"; + case REG_LSU_ERR_CTL: return "lsu_err_ctl"; + case REG_AFLATCTL2_EL1: return "aflatctl2_el1"; + case REG_AFLATVALBIN1_EL1: return "aflatvalbin1_el1"; + case REG_AFLATINFHI_EL1: return "aflatinfhi_el1"; + case REG_AFLATCTL3_EL1: return "aflatctl3_el1"; + case REG_AFLATVALBIN2_EL1: return "aflatvalbin2_el1"; + case REG_AFLATCTL4_EL1: return "aflatctl4_el1"; + case REG_AFLATVALBIN3_EL1: return "aflatvalbin3_el1"; + case REG_LLC_FILL_CTL: return "llc_fill_ctl"; + case REG_AFLATCTL5_LO_EL1: return "aflatctl5_lo_el1"; + case REG_AFLATVALBIN4_EL1: return "aflatvalbin4_el1"; + case REG_AFLATCTL5_HI_EL1: return "aflatctl5_hi_el1"; + case REG_LLC_FILL_DAT: return "llc_fill_dat"; + case REG_AFLATVALBIN5_EL1: return "aflatvalbin5_el1"; + case REG_AFLATVALBIN6_EL1: return "aflatvalbin6_el1"; + case REG_LLC_RAM_CONFIG: return "llc_ram_config"; + case REG_AFLATVALBIN7_EL1: return "aflatvalbin7_el1"; + case REG_LLC_ERR_STS: return "llc_err_sts"; + case REG_CMAINT_BCAST_LIST_0: return "cmaint_bcast_list_0"; + case REG_CMAINT_BCAST_LIST_1: return "cmaint_bcast_list_1"; + case REG_CMAINT_BCAST_CTL: return "cmaint_bcast_ctl"; + case REG_LLC_ERR_ADR: return "llc_err_adr"; + case REG_LLC_ERR_CTL: return "llc_err_ctl"; + case REG_LLC_ERR_INJ: return "llc_err_inj"; + case REG_LLC_ERR_INF: return "llc_err_inf"; + case REG_USERTAGSEL_EL1: return "usertagsel_el1"; + case REG_UUSERTAG_EL0: return "uusertag_el0"; + case REG_KUSERTAG_EL1: return "kusertag_el1"; + case REG_HUSERTAG_EL2: return "husertag_el2"; + case REG_LLC_TRACE_CTL0: return "llc_trace_ctl0"; + case REG_LLC_TRACE_CTL1: return "llc_trace_ctl1"; + case REG_LLC_UP_REQ_VC: return "llc_up_req_vc"; + case REG_LLC_UP_REQ_VC_THRESH: return "llc_up_req_vc_thresh"; + case REG_LLC_UP_REQ_VC_2: return "llc_up_req_vc_2"; + case REG_LLC_UP_REQ_VC_THRESH_2: return "llc_up_req_vc_thresh_2"; + case REG_LLC_DRAM_HASH0: return "llc_dram_hash0"; + case REG_LLC_DRAM_HASH1: return "llc_dram_hash1"; + case REG_LLC_DRAM_HASH2: return "llc_dram_hash2"; + case REG_LLC_DRAM_HASH3: return "llc_dram_hash3"; + case REG_LLC_TRACE_CTL2: return "llc_trace_ctl2"; + case REG_LLC_DRAM_HASH4: return "llc_dram_hash4"; + case REG_LLC_UP_REQ_VC_3: return "llc_up_req_vc_3"; + case REG_LLC_UP_REQ_VC_THRESH_3: return "llc_up_req_vc_thresh_3"; + case REG_LLC_UP_REQ_VC_4: return "llc_up_req_vc_4"; + case REG_LLC_UP_REQ_VC_THRESH_4: return "llc_up_req_vc_thresh_4"; + case REG_LLC_HASH0: return "llc_hash0"; + case REG_LLC_HASH1: return "llc_hash1"; + case REG_LLC_HASH2: return "llc_hash2"; + case REG_LLC_HASH3: return "llc_hash3"; + case REG_LLC_WRR: return "llc_wrr"; + case REG_LLC_DRAM_HASH5: return "llc_dram_hash5"; + case REG_LLC_DRAM_HASH6: return "llc_dram_hash6"; + case REG_VPIDR_EL2: return "vpidr_el2"; + case REG_VMPIDR_EL2: return "vmpidr_el2"; + case REG_SCTLR_EL2: return "sctlr_el2"; + case REG_ACTLR_EL2: return "actlr_el2"; + case REG_HCR_EL2: return "hcr_el2"; + case REG_MDCR_EL2: return "mdcr_el2"; + case REG_CPTR_EL2: return "cptr_el2"; + case REG_HSTR_EL2: return "hstr_el2"; + case REG_HFGRTR_EL2: return "hfgrtr_el2"; + case REG_HFGWTR_EL2: return "hfgwtr_el2"; + case REG_HFGITR_EL2: return "hfgitr_el2"; + case REG_HACR_EL2: return "hacr_el2"; + case REG_TRFCR_EL2: return "trfcr_el2"; + case REG_HCRX_EL2: return "hcrx_el2"; + case REG_SMPRIMAP_EL2: return "smprimap_el2"; + case REG_SMCR_EL2: return "smcr_el2"; + case REG_SDER32_EL2: return "sder32_el2"; + case REG_TTBR0_EL2: return "ttbr0_el2"; + case REG_TTBR1_EL2: return "ttbr1_el2"; + case REG_TCR_EL2: return "tcr_el2"; + case REG_VTTBR_EL2: return "vttbr_el2"; + case REG_VTCR_EL2: return "vtcr_el2"; + case REG_VNCR_EL2: return "vncr_el2"; + case REG_VSTTBR_EL2: return "vsttbr_el2"; + case REG_VSTCR_EL2: return "vstcr_el2"; + case REG_DACR32_EL2: return "dacr32_el2"; + case REG_HDFGRTR_EL2: return "hdfgrtr_el2"; + case REG_HDFGWTR_EL2: return "hdfgwtr_el2"; + case REG_SPSR_EL2: return "spsr_el2"; + case REG_ELR_EL2: return "elr_el2"; + case REG_SP_EL1: return "sp_el1"; + case REG_SPSR_IRQ: return "spsr_irq"; + case REG_SPSR_ABT: return "spsr_abt"; + case REG_SPSR_UND: return "spsr_und"; + case REG_SPSR_FIQ: return "spsr_fiq"; + case REG_IFSR32_EL2: return "ifsr32_el2"; + case REG_AFSR0_EL2: return "afsr0_el2"; + case REG_AFSR1_EL2: return "afsr1_el2"; + case REG_ESR_EL2: return "esr_el2"; + case REG_VSESR_EL2: return "vsesr_el2"; + case REG_FPEXC32_EL2: return "fpexc32_el2"; + case REG_TFSR_EL2: return "tfsr_el2"; + case REG_FAR_EL2: return "far_el2"; + case REG_HPFAR_EL2: return "hpfar_el2"; + case REG_PMSCR_EL2: return "pmscr_el2"; + case REG_MAIR_EL2: return "mair_el2"; + case REG_AMAIR_EL2: return "amair_el2"; + case REG_MPAMHCR_EL2: return "mpamhcr_el2"; + case REG_MPAMVPMV_EL2: return "mpamvpmv_el2"; + case REG_MPAM2_EL2: return "mpam2_el2"; + case REG_MPAMVPM0_EL2: return "mpamvpm0_el2"; + case REG_MPAMVPM1_EL2: return "mpamvpm1_el2"; + case REG_MPAMVPM2_EL2: return "mpamvpm2_el2"; + case REG_MPAMVPM3_EL2: return "mpamvpm3_el2"; + case REG_MPAMVPM4_EL2: return "mpamvpm4_el2"; + case REG_MPAMVPM5_EL2: return "mpamvpm5_el2"; + case REG_MPAMVPM6_EL2: return "mpamvpm6_el2"; + case REG_MPAMVPM7_EL2: return "mpamvpm7_el2"; + case REG_VBAR_EL2: return "vbar_el2"; + case REG_RVBAR_EL2: return "rvbar_el2"; + case REG_RMR_EL2: return "rmr_el2"; + case REG_VDISR_EL2: return "vdisr_el2"; + case REG_ICH_AP0R0_EL2: return "ich_ap0r0_el2"; + case REG_ICH_AP0R1_EL2: return "ich_ap0r1_el2"; + case REG_ICH_AP0R2_EL2: return "ich_ap0r2_el2"; + case REG_ICH_AP0R3_EL2: return "ich_ap0r3_el2"; + case REG_ICH_AP1R0_EL2: return "ich_ap1r0_el2"; + case REG_ICH_AP1R1_EL2: return "ich_ap1r1_el2"; + case REG_ICH_AP1R2_EL2: return "ich_ap1r2_el2"; + case REG_ICH_AP1R3_EL2: return "ich_ap1r3_el2"; + case REG_ICH_VSEIR_EL2: return "ich_vseir_el2"; + case REG_ICC_SRE_EL2: return "icc_sre_el2"; + case REG_ICH_HCR_EL2: return "ich_hcr_el2"; + case REG_ICH_VTR_EL2: return "ich_vtr_el2"; + case REG_ICH_MISR_EL2: return "ich_misr_el2"; + case REG_ICH_EISR_EL2: return "ich_eisr_el2"; + case REG_ICH_ELRSR_EL2: return "ich_elrsr_el2"; + case REG_ICH_VMCR_EL2: return "ich_vmcr_el2"; + case REG_ICH_LR0_EL2: return "ich_lr0_el2"; + case REG_ICH_LR1_EL2: return "ich_lr1_el2"; + case REG_ICH_LR2_EL2: return "ich_lr2_el2"; + case REG_ICH_LR3_EL2: return "ich_lr3_el2"; + case REG_ICH_LR4_EL2: return "ich_lr4_el2"; + case REG_ICH_LR5_EL2: return "ich_lr5_el2"; + case REG_ICH_LR6_EL2: return "ich_lr6_el2"; + case REG_ICH_LR7_EL2: return "ich_lr7_el2"; + case REG_ICH_LR8_EL2: return "ich_lr8_el2"; + case REG_ICH_LR9_EL2: return "ich_lr9_el2"; + case REG_ICH_LR10_EL2: return "ich_lr10_el2"; + case REG_ICH_LR11_EL2: return "ich_lr11_el2"; + case REG_ICH_LR12_EL2: return "ich_lr12_el2"; + case REG_ICH_LR13_EL2: return "ich_lr13_el2"; + case REG_ICH_LR14_EL2: return "ich_lr14_el2"; + case REG_ICH_LR15_EL2: return "ich_lr15_el2"; + case REG_CONTEXTIDR_EL2: return "contextidr_el2"; + case REG_TPIDR_EL2: return "tpidr_el2"; + case REG_SCXTNUM_EL2: return "scxtnum_el2"; + case REG_CNTVOFF_EL2: return "cntvoff_el2"; + case REG_CNTHCTL_EL2: return "cnthctl_el2"; + case REG_CNTHP_TVAL_EL2: return "cnthp_tval_el2"; + case REG_CNTHP_CTL_EL2: return "cnthp_ctl_el2"; + case REG_CNTHP_CVAL_EL2: return "cnthp_cval_el2"; + case REG_CNTHV_TVAL_EL2: return "cnthv_tval_el2"; + case REG_CNTHV_CTL_EL2: return "cnthv_ctl_el2"; + case REG_CNTHV_CVAL_EL2: return "cnthv_cval_el2"; + case REG_CNTHVS_TVAL_EL2: return "cnthvs_tval_el2"; + case REG_CNTHVS_CTL_EL2: return "cnthvs_ctl_el2"; + case REG_CNTHVS_CVAL_EL2: return "cnthvs_cval_el2"; + case REG_CNTHPS_TVAL_EL2: return "cnthps_tval_el2"; + case REG_CNTHPS_CTL_EL2: return "cnthps_ctl_el2"; + case REG_CNTHPS_CVAL_EL2: return "cnthps_cval_el2"; + case REG_FED_ERR_STS: return "fed_err_sts"; + case REG_FED_ERR_CTL: return "fed_err_ctl"; + case REG_APCTL_EL1: return "apctl_el1"; + case REG_KERNKEYLO_EL1: return "kernkeylo_el1"; + case REG_KERNKEYHI_EL1: return "kernkeyhi_el1"; + case REG_VMSALOCK_EL21: return "vmsalock_el21"; + case REG_AMX_STATE_T_EL1: return "amx_state_t_el1"; + case REG_AMX_CONFIG_EL1: return "amx_config_el1"; + case REG_VMSA_LOCK_EL2: return "vmsa_lock_el2"; + case REG_CTRR_B_UPR_EL1: return "ctrr_b_upr_el1"; + case REG_CTRR_B_LWR_EL1: return "ctrr_b_lwr_el1"; + case REG_SP_SETUP_GL1: return "sp_setup_gl1"; + case REG_SP_SETUP_GL2: return "sp_setup_gl2"; + case REG_CTRR_B_CTL_EL1: return "ctrr_b_ctl_el1"; + case REG_CTRR_A_LWR_EL1: return "ctrr_a_lwr_el1"; + case REG_CTRR_A_UPR_EL1: return "ctrr_a_upr_el1"; + case REG_CTRR_A_CTL_EL1: return "ctrr_a_ctl_el1"; + case REG_VMSA_LOCK_EL12: return "vmsa_lock_el12"; + case REG_AGTCNTV_CTL_EL02: return "agtcntv_ctl_el02"; + case REG_AMX_STATE_EL1: return "amx_state_el1"; + case REG_AMX_STATUS_EL1: return "amx_status_el1"; + case REG_AGTCNTP_CVAL_EL02: return "agtcntp_cval_el02"; + case REG_REDIR_ACNTP_TVAL_EL02: return "redir_acntp_tval_el02"; + case REG_AGTCNTP_CTL_EL02: return "agtcntp_ctl_el02"; + case REG_AGTCNTV_CVAL_EL02: return "agtcntv_cval_el02"; + case REG_AGTCNTV_TVAL_EL02: return "agtcntv_tval_el02"; + case REG_AMX_CONFIG_EL12: return "amx_config_el12"; + case REG_AMX_CONFIG_EL2: return "amx_config_el2"; + case REG_SPRR_HUPERM_EL0: return "sprr_huperm_el0"; + case REG_SPRR_VUPERM_EL0: return "sprr_vuperm_el0"; + case REG_CTRR_A_CTL_EL2: return "ctrr_a_ctl_el2"; + case REG_CTRR_B_CTL_EL2: return "ctrr_b_ctl_el2"; + case REG_CTRR_A_LWR_EL2: return "ctrr_a_lwr_el2"; + case REG_CTRR_A_UPR_EL2: return "ctrr_a_upr_el2"; + case REG_CTRR_B_LWR_EL2: return "ctrr_b_lwr_el2"; + case REG_CTRR_B_UPR_EL2: return "ctrr_b_upr_el2"; + case REG_SPRR_HUMPRR_EL2: return "sprr_humprr_el2"; + case REG_SPRR_HUPERM_SH01_EL2: return "sprr_huperm_sh01_el2"; + case REG_SPRR_HUPERM_SH02_EL2: return "sprr_huperm_sh02_el2"; + case REG_SPRR_HUPERM_SH03_EL2: return "sprr_huperm_sh03_el2"; + case REG_SPRR_HUPERM_SH04_EL2: return "sprr_huperm_sh04_el2"; + case REG_SPRR_HUPERM_SH05_EL2: return "sprr_huperm_sh05_el2"; + case REG_SPRR_HUPERM_SH06_EL2: return "sprr_huperm_sh06_el2"; + case REG_SPRR_HUPERM_SH07_EL2: return "sprr_huperm_sh07_el2"; + case REG_SPRR_VUMPRR_EL1: return "sprr_vumprr_el1"; + case REG_SPRR_VUPERM_SH01_EL1: return "sprr_vuperm_sh01_el1"; + case REG_SPRR_VUPERM_SH02_EL1: return "sprr_vuperm_sh02_el1"; + case REG_SPRR_VUPERM_SH03_EL1: return "sprr_vuperm_sh03_el1"; + case REG_SPRR_VUPERM_SH04_EL1: return "sprr_vuperm_sh04_el1"; + case REG_SPRR_VUPERM_SH05_EL1: return "sprr_vuperm_sh05_el1"; + case REG_SPRR_VUPERM_SH06_EL1: return "sprr_vuperm_sh06_el1"; + case REG_SPRR_VUPERM_SH07_EL1: return "sprr_vuperm_sh07_el1"; + case REG_CTRR_A_LWR_EL12: return "ctrr_a_lwr_el12"; + case REG_CTRR_A_UPR_EL12: return "ctrr_a_upr_el12"; + case REG_CTRR_B_LWR_EL12: return "ctrr_b_lwr_el12"; + case REG_CTRR_B_UPR_EL12: return "ctrr_b_upr_el12"; + case REG_CTRR_A_CTL_EL12: return "ctrr_a_ctl_el12"; + case REG_CTRR_B_CTL_EL12: return "ctrr_b_ctl_el12"; + case REG_AGTCNTHCTL_EL21: return "agtcnthctl_el21"; + case REG_AGTCNTKCTL_EL12: return "agtcntkctl_el12"; + case REG_PREDAKEYLO_EL1: return "predakeylo_el1"; + case REG_PREDAKEYHI_EL1: return "predakeyhi_el1"; + case REG_PREDBKEYLO_EL1: return "predbkeylo_el1"; + case REG_PREDBKEYHI_EL1: return "predbkeyhi_el1"; + case REG_SIQ_CFG_EL1: return "siq_cfg_el1"; + case REG_AGTCNTPCTSS_EL0: return "agtcntpctss_el0"; + case REG_AGTCNTVCTSS_EL0: return "agtcntvctss_el0"; + case REG_AVNCR_EL2: return "avncr_el2"; + case REG_ACC_CTRR_A_LWR_EL2: return "acc_ctrr_a_lwr_el2"; + case REG_ACC_CTRR_A_UPR_EL2: return "acc_ctrr_a_upr_el2"; + case REG_ACC_CTRR_B_LWR_EL2: return "acc_ctrr_b_lwr_el2"; + case REG_ACC_CTRR_B_UPR_EL2: return "acc_ctrr_b_upr_el2"; + case REG_ACC_CTRR_A_CTL_EL2: return "acc_ctrr_a_ctl_el2"; + case REG_ACC_CTRR_B_CTL_EL2: return "acc_ctrr_b_ctl_el2"; + case REG_AGTCNTPCT_EL0: return "agtcntpct_el0"; + case REG_AGTCNTVCT_EL0: return "agtcntvct_el0"; + case REG_ACFG_EL1: return "acfg_el1"; + case REG_AHCR_EL2: return "ahcr_el2"; + case REG_APL_INTSTATUS_EL1: return "apl_intstatus_el1"; + case REG_APL_INTSTATUS_EL2: return "apl_intstatus_el2"; + case REG_AGTCNTHCTL_EL2: return "agtcnthctl_el2"; + case REG_JAPIAKEYLO_EL2: return "japiakeylo_el2"; + case REG_JAPIAKEYHI_EL2: return "japiakeyhi_el2"; + case REG_JAPIBKEYLO_EL2: return "japibkeylo_el2"; + case REG_JAPIBKEYHI_EL2: return "japibkeyhi_el2"; + case REG_JAPIAKEYLO_EL1: return "japiakeylo_el1"; + case REG_JAPIAKEYHI_EL1: return "japiakeyhi_el1"; + case REG_JAPIBKEYLO_EL1: return "japibkeylo_el1"; + case REG_JAPIBKEYHI_EL1: return "japibkeyhi_el1"; + case REG_JAPIAKEYLO_EL12: return "japiakeylo_el12"; + case REG_JAPIAKEYHI_EL12: return "japiakeyhi_el12"; + case REG_JAPIBKEYLO_EL12: return "japibkeylo_el12"; + case REG_JAPIBKEYHI_EL12: return "japibkeyhi_el12"; + case REG_AGTCNTRDIR_EL2: return "agtcntrdir_el2"; + case REG_AGTCNTRDIR_EL12: return "agtcntrdir_el12"; + case REG_JRANGE_EL2: return "jrange_el2"; + case REG_JRANGE_EL1: return "jrange_el1"; + case REG_JRANGE_EL12: return "jrange_el12"; + case REG_JCTL_EL2: return "jctl_el2"; + case REG_JCTL_EL1: return "jctl_el1"; + case REG_JCTL_EL12: return "jctl_el12"; + case REG_JCTL_EL0: return "jctl_el0"; + case REG_AMDSCR_EL1: return "amdscr_el1"; + case REG_SCTLR_EL12: return "sctlr_el12"; + case REG_ACTLR_EL12: return "actlr_el12"; + case REG_CPACR_EL12: return "cpacr_el12"; + case REG_TRFCR_EL12: return "trfcr_el12"; + case REG_SMCR_EL12: return "smcr_el12"; + case REG_TTBR0_EL12: return "ttbr0_el12"; + case REG_TTBR1_EL12: return "ttbr1_el12"; + case REG_TCR_EL12: return "tcr_el12"; + case REG_SPSR_EL12: return "spsr_el12"; + case REG_ELR_EL12: return "elr_el12"; + case REG_AFSR0_EL12: return "afsr0_el12"; + case REG_AFSR1_EL12: return "afsr1_el12"; + case REG_ESR_EL12: return "esr_el12"; + case REG_TFSR_EL12: return "tfsr_el12"; + case REG_FAR_EL12: return "far_el12"; + case REG_PMSCR_EL12: return "pmscr_el12"; + case REG_MAIR_EL12: return "mair_el12"; + case REG_AMAIR_EL12: return "amair_el12"; + case REG_MPAM1_EL12: return "mpam1_el12"; + case REG_VBAR_EL12: return "vbar_el12"; + case REG_CONTEXTIDR_EL12: return "contextidr_el12"; + case REG_SCXTNUM_EL12: return "scxtnum_el12"; + case REG_CNTKCTL_EL12: return "cntkctl_el12"; + case REG_CNTP_TVAL_EL02: return "cntp_tval_el02"; + case REG_CNTP_CTL_EL02: return "cntp_ctl_el02"; + case REG_CNTP_CVAL_EL02: return "cntp_cval_el02"; + case REG_CNTV_TVAL_EL02: return "cntv_tval_el02"; + case REG_CNTV_CTL_EL02: return "cntv_ctl_el02"; + case REG_CNTV_CVAL_EL02: return "cntv_cval_el02"; + case REG_IPI_RR_LOCAL_EL1: return "ipi_rr_local_el1"; + case REG_IPI_RR_GLOBAL_EL1: return "ipi_rr_global_el1"; + case REG_AF_ERR_CFG0: return "af_err_cfg0"; + case REG_AP_ERR_CFG0: return "ap_err_cfg0"; + case REG_AF_ERR_SRC_IDS: return "af_err_src_ids"; + case REG_DPC_ERR_STS: return "dpc_err_sts"; + case REG_DPC_ERR_CTL: return "dpc_err_ctl"; + case REG_PROD_TRC_CORE_CFG_EL1: return "prod_trc_core_cfg_el1"; + case REG_TRACE_CORE_CFG: return "trace_core_cfg"; + case REG_IPI_SR: return "ipi_sr"; + case REG_APL_LRTMR_EL2: return "apl_lrtmr_el2"; + case REG_APL_INTENABLE_EL2: return "apl_intenable_el2"; + case REG_KTRACE_MESSAGE: return "ktrace_message"; + case REG_TRACE_CORE_CFG_EXT: return "trace_core_cfg_ext"; + case REG_PROD_TRC_CORE_CFG_EL2: return "prod_trc_core_cfg_el2"; + case REG_HID_PROD_TRC_CORE_CFG_EL1: return "hid_prod_trc_core_cfg_el1"; + case REG_DBG_WRAP_GLB: return "dbg_wrap_glb"; + case REG_TRACE_STREAM_BASE: return "trace_stream_base"; + case REG_TRACE_STREAM_FILL: return "trace_stream_fill"; + case REG_TRACE_STREAM_BASE1: return "trace_stream_base1"; + case REG_TRACE_STREAM_FILL1: return "trace_stream_fill1"; + case REG_TRACE_STREAM_IRQ: return "trace_stream_irq"; + case REG_WATCHDOGDIAG0: return "watchdogdiag0"; + case REG_WATCHDOGDIAG1: return "watchdogdiag1"; + case REG_TRACE_AUX_CTL: return "trace_aux_ctl"; + case REG_IPI_CR: return "ipi_cr"; + case REG_UTRIG_EVENT: return "utrig_event"; + case REG_HID_PROD_TRC_MASK_EL1: return "hid_prod_trc_mask_el1"; + case REG_TRACE_CTL: return "trace_ctl"; + case REG_TRACE_DAT: return "trace_dat"; + case REG_PROD_TRC_STRM_BASE0_GL2: return "prod_trc_strm_base0_gl2"; + case REG_PROD_TRC_STRM_BASE1_GL2: return "prod_trc_strm_base1_gl2"; + case REG_CPU_CFG: return "cpu_cfg"; + case REG_PBLK_STS: return "pblk_sts"; + case REG_PROD_TRC_CTL_EL1: return "prod_trc_ctl_el1"; + case REG_PROD_TRC_STRM_BASE0_GL1: return "prod_trc_strm_base0_gl1"; + case REG_PROD_TRC_STRM_BASE1_GL1: return "prod_trc_strm_base1_gl1"; + case REG_PROD_TRC_STRM_FIQ_EL1: return "prod_trc_strm_fiq_el1"; + case REG_CPU_OVRD: return "cpu_ovrd"; + case REG_PBLK_EXE_ST: return "pblk_exe_st"; + case REG_PROD_TRC_CORE_GL_CTL_GL1: return "prod_trc_core_gl_ctl_gl1"; + case REG_PROD_TRC_CORE_GL_CTL_GL2: return "prod_trc_core_gl_ctl_gl2"; + case REG_ACC_OVRD: return "acc_ovrd"; + case REG_ACC_OVRD1: return "acc_ovrd1"; + case REG_CPM_PWRDN_CTL: return "cpm_pwrdn_ctl"; + case REG_PROD_TRC_BUF_RESTORE0_GL1: return "prod_trc_buf_restore0_gl1"; + case REG_PROD_TRC_BUF_RESTORE1_GL1: return "prod_trc_buf_restore1_gl1"; + case REG_PROD_TRC_EN_GL1: return "prod_trc_en_gl1"; + case REG_PRE_LLCFLUSH_TMR: return "pre_llcflush_tmr"; + case REG_BIUINTFCTL_CFG: return "biuintfctl_cfg"; + case REG_BIUINTFWRR_CFG: return "biuintfwrr_cfg"; + case REG_PRE_TD_TMR: return "pre_td_tmr"; + case REG_ACC_SLP_WAKE_UP_TMR: return "acc_slp_wake_up_tmr"; + case REG_PBLK_PSW_DLY: return "pblk_psw_dly"; + case REG_CPU_STS: return "cpu_sts"; + case REG_HIST_TRIG: return "hist_trig"; + case REG_PROD_TRC_BUF_RESTORE0_GL2: return "prod_trc_buf_restore0_gl2"; + case REG_PROD_TRC_BUF_RESTORE1_GL2: return "prod_trc_buf_restore1_gl2"; + case REG_PROD_TRC_STRM_FILL0_EL1: return "prod_trc_strm_fill0_el1"; + case REG_PROD_TRC_STRM_FILL1_EL1: return "prod_trc_strm_fill1_el1"; + case REG_ARRAY_INDEX: return "array_index"; + case REG_PROD_TRC_CTL_EL2: return "prod_trc_ctl_el2"; + case REG_PROD_TRC_EN_GL2: return "prod_trc_en_gl2"; + case REG_PROD_TRC_STRM_FIQ_EL2: return "prod_trc_strm_fiq_el2"; + case REG_PROD_TRC_CPMU_DUMP_TRIG_EL1: return "prod_trc_cpmu_dump_trig_el1"; + case REG_PROD_LOSS_COUNT_EL1: return "prod_loss_count_el1"; + case REG_SW_TRACE_DATA_EL0: return "sw_trace_data_el0"; + case REG_IL1_DATA0: return "il1_data0"; + case REG_IL1_DATA1: return "il1_data1"; + case REG_DL1_DATA0: return "dl1_data0"; + case REG_DL1_DATA1: return "dl1_data1"; + case REG_MMUDATA0: return "mmudata0"; + case REG_MMUDATA1: return "mmudata1"; + case REG_DL1_DATA2: return "dl1_data2"; + case REG_IL1_DATA2: return "il1_data2"; + case REG_LLC_DATA0: return "llc_data0"; + case REG_LLC_DATA1: return "llc_data1"; + case REG_SCTLR_EL3: return "sctlr_el3"; + case REG_ACTLR_EL3: return "actlr_el3"; + case REG_SCR_EL3: return "scr_el3"; + case REG_SDER32_EL3: return "sder32_el3"; + case REG_CPTR_EL3: return "cptr_el3"; + case REG_MDCR_EL3: return "mdcr_el3"; + case REG_TTBR0_EL3: return "ttbr0_el3"; + case REG_TCR_EL3: return "tcr_el3"; + case REG_SPSR_EL3: return "spsr_el3"; + case REG_ELR_EL3: return "elr_el3"; + case REG_SP_EL2: return "sp_el2"; + case REG_AFSR0_EL3: return "afsr0_el3"; + case REG_AFSR1_EL3: return "afsr1_el3"; + case REG_ESR_EL3: return "esr_el3"; + case REG_TFSR_EL3: return "tfsr_el3"; + case REG_FAR_EL3: return "far_el3"; + case REG_MAIR_EL3: return "mair_el3"; + case REG_AMAIR_EL3: return "amair_el3"; + case REG_MPAM3_EL3: return "mpam3_el3"; + case REG_VBAR_EL3: return "vbar_el3"; + case REG_RVBAR_EL3: return "rvbar_el3"; + case REG_RMR_EL3: return "rmr_el3"; + case REG_ICC_CTLR_EL3: return "icc_ctlr_el3"; + case REG_ICC_SRE_EL3: return "icc_sre_el3"; + case REG_ICC_IGRPEN1_EL3: return "icc_igrpen1_el3"; + case REG_TPIDR_EL3: return "tpidr_el3"; + case REG_SCXTNUM_EL3: return "scxtnum_el3"; + case REG_MMU_ERR_STS: return "mmu_err_sts"; + case REG_AFSR1_GL1: return "afsr1_gl1"; + case REG_AFSR1_GL2: return "afsr1_gl2"; + case REG_AFSR1_GL12: return "afsr1_gl12"; + case REG_BP_OBJC_ADR_EL1: return "bp_objc_adr_el1"; + case REG_BP_OBJC_CTL_EL1: return "bp_objc_ctl_el1"; + case REG_SP_GL11: return "sp_gl11"; + case REG_MMU_SESR_EL2: return "mmu_sesr_el2"; + case REG_SPRR_CONFIG_EL1: return "sprr_config_el1"; + case REG_HPFAR_GL2: return "hpfar_gl2"; + case REG_GXF_CONFIG_EL1: return "gxf_config_el1"; + case REG_AMRANGE_EL21: return "amrange_el21"; + case REG_GXF_CONFIG_EL2: return "gxf_config_el2"; + case REG_SPRR_UPERM_EL0: return "sprr_uperm_el0"; + case REG_SPRR_PPERM_EL1: return "sprr_pperm_el1"; + case REG_SPRR_PPERM_EL2: return "sprr_pperm_el2"; + case REG_APGAKEYLO_EL12: return "apgakeylo_el12"; + case REG_APGAKEYHI_EL12: return "apgakeyhi_el12"; + case REG_KERNKEYLO_EL12: return "kernkeylo_el12"; + case REG_KERNKEYHI_EL12: return "kernkeyhi_el12"; + case REG_AFPCR_EL0: return "afpcr_el0"; + case REG_SP_GL22: return "sp_gl22"; + case REG_AMXIDR_EL1: return "amxidr_el1"; + case REG_SPRR_HUMPRR_EL21: return "sprr_humprr_el21"; + case REG_SPRR_PMPRR_EL1: return "sprr_pmprr_el1"; + case REG_SPRR_PMPRR_EL2: return "sprr_pmprr_el2"; + case REG_SPRR_HUPERM_SH01_EL21: return "sprr_huperm_sh01_el21"; + case REG_SPRR_HUPERM_SH02_EL21: return "sprr_huperm_sh02_el21"; + case REG_SPRR_HUPERM_SH03_EL21: return "sprr_huperm_sh03_el21"; + case REG_SPRR_HUPERM_SH04_EL21: return "sprr_huperm_sh04_el21"; + case REG_SPRR_HUPERM_SH05_EL21: return "sprr_huperm_sh05_el21"; + case REG_SPRR_HUPERM_SH06_EL21: return "sprr_huperm_sh06_el21"; + case REG_SPRR_HUPERM_SH07_EL21: return "sprr_huperm_sh07_el21"; + case REG_SPRR_PPERM_SH01_EL1: return "sprr_pperm_sh01_el1"; + case REG_SPRR_PPERM_SH02_EL1: return "sprr_pperm_sh02_el1"; + case REG_SPRR_PPERM_SH03_EL1: return "sprr_pperm_sh03_el1"; + case REG_SPRR_PPERM_SH04_EL1: return "sprr_pperm_sh04_el1"; + case REG_SPRR_PPERM_SH05_EL1: return "sprr_pperm_sh05_el1"; + case REG_SPRR_PPERM_SH06_EL1: return "sprr_pperm_sh06_el1"; + case REG_SPRR_PPERM_SH07_EL1: return "sprr_pperm_sh07_el1"; + case REG_SPRR_PPERM_SH01_EL2: return "sprr_pperm_sh01_el2"; + case REG_SPRR_PPERM_SH02_EL2: return "sprr_pperm_sh02_el2"; + case REG_SPRR_PPERM_SH03_EL2: return "sprr_pperm_sh03_el2"; + case REG_SPRR_PPERM_SH04_EL2: return "sprr_pperm_sh04_el2"; + case REG_SPRR_PPERM_SH05_EL2: return "sprr_pperm_sh05_el2"; + case REG_SPRR_PPERM_SH06_EL2: return "sprr_pperm_sh06_el2"; + case REG_SPRR_PPERM_SH07_EL2: return "sprr_pperm_sh07_el2"; + case REG_SPRR_PMPRR_EL12: return "sprr_pmprr_el12"; + case REG_SPRR_PPERM_SH01_EL12: return "sprr_pperm_sh01_el12"; + case REG_SPRR_PPERM_SH02_EL12: return "sprr_pperm_sh02_el12"; + case REG_SPRR_PPERM_SH03_EL12: return "sprr_pperm_sh03_el12"; + case REG_SPRR_PPERM_SH04_EL12: return "sprr_pperm_sh04_el12"; + case REG_SPRR_PPERM_SH05_EL12: return "sprr_pperm_sh05_el12"; + case REG_SPRR_PPERM_SH06_EL12: return "sprr_pperm_sh06_el12"; + case REG_SPRR_PPERM_SH07_EL12: return "sprr_pperm_sh07_el12"; + case REG_APIAKEYLO_EL12: return "apiakeylo_el12"; + case REG_APIAKEYHI_EL12: return "apiakeyhi_el12"; + case REG_APIBKEYLO_EL12: return "apibkeylo_el12"; + case REG_APIBKEYHI_EL12: return "apibkeyhi_el12"; + case REG_APDAKEYLO_EL12: return "apdakeylo_el12"; + case REG_APDAKEYHI_EL12: return "apdakeyhi_el12"; + case REG_APDBKEYLO_EL12: return "apdbkeylo_el12"; + case REG_APDBKEYHI_EL12: return "apdbkeyhi_el12"; + case REG_CURRENTG: return "currentg"; + case REG_GXF_ENTRY_EL1: return "gxf_entry_el1"; + case REG_GXF_PABENTRY_EL1: return "gxf_pabentry_el1"; + case REG_ASPSR_EL1: return "aspsr_el1"; + case REG_ADSPSR_EL0: return "adspsr_el0"; + case REG_PMCR1_GL2: return "pmcr1_gl2"; + case REG_ASPSR_EL2: return "aspsr_el2"; + case REG_PMCR1_GL1: return "pmcr1_gl1"; + case REG_VBAR_GL12: return "vbar_gl12"; + case REG_SPSR_GL12: return "spsr_gl12"; + case REG_ASPSR_GL12: return "aspsr_gl12"; + case REG_ESR_GL12: return "esr_gl12"; + case REG_ELR_GL12: return "elr_gl12"; + case REG_FAR_GL12: return "far_gl12"; + case REG_SP_GL1: return "sp_gl1"; + case REG_TPIDR_GL1: return "tpidr_gl1"; + case REG_VBAR_GL1: return "vbar_gl1"; + case REG_SPSR_GL1: return "spsr_gl1"; + case REG_ASPSR_GL1: return "aspsr_gl1"; + case REG_ESR_GL1: return "esr_gl1"; + case REG_ELR_GL1: return "elr_gl1"; + case REG_FAR_GL1: return "far_gl1"; + case REG_SP_GL2: return "sp_gl2"; + case REG_TPIDR_GL2: return "tpidr_gl2"; + case REG_VBAR_GL2: return "vbar_gl2"; + case REG_SPSR_GL2: return "spsr_gl2"; + case REG_ASPSR_GL2: return "aspsr_gl2"; + case REG_ESR_GL2: return "esr_gl2"; + case REG_ELR_GL2: return "elr_gl2"; + case REG_FAR_GL2: return "far_gl2"; + case REG_GXF_ENTRY_EL2: return "gxf_entry_el2"; + case REG_GXF_PABENTRY_EL2: return "gxf_pabentry_el2"; + case REG_APCTL_EL2: return "apctl_el2"; + case REG_APSTS_EL2: return "apsts_el2"; + case REG_APSTS_EL1: return "apsts_el1"; + case REG_KERNKEYLO_EL2: return "kernkeylo_el2"; + case REG_KERNKEYHI_EL2: return "kernkeyhi_el2"; + case REG_ASPSR_EL12: return "aspsr_el12"; + case REG_APIAKEYLO_EL2: return "apiakeylo_el2"; + case REG_APIAKEYHI_EL2: return "apiakeyhi_el2"; + case REG_APIBKEYLO_EL2: return "apibkeylo_el2"; + case REG_APIBKEYHI_EL2: return "apibkeyhi_el2"; + case REG_APDAKEYLO_EL2: return "apdakeylo_el2"; + case REG_APDAKEYHI_EL2: return "apdakeyhi_el2"; + case REG_APDBKEYLO_EL2: return "apdbkeylo_el2"; + case REG_APDBKEYHI_EL2: return "apdbkeyhi_el2"; + case REG_APGAKEYLO_EL2: return "apgakeylo_el2"; + case REG_APGAKEYHI_EL2: return "apgakeyhi_el2"; + case REG_SPRR_CONFIG_EL2: return "sprr_config_el2"; + case REG_SPRR_AMRANGE_EL2: return "sprr_amrange_el2"; + case REG_VMKEYLO_EL2: return "vmkeylo_el2"; + case REG_VMKEYHI_EL2: return "vmkeyhi_el2"; + case REG_MMU_SFAR_EL2: return "mmu_sfar_el2"; + case REG_APSTS_EL12: return "apsts_el12"; + case REG_APCTL_EL12: return "apctl_el12"; + case REG_GXF_CONFIG_EL12: return "gxf_config_el12"; + case REG_GXF_ENTRY_EL12: return "gxf_entry_el12"; + case REG_GXF_PABENTRY_EL12: return "gxf_pabentry_el12"; + case REG_SPRR_CONFIG_EL12: return "sprr_config_el12"; + case REG_SPRR_AMRANGE_EL12: return "sprr_amrange_el12"; + case REG_MMU_SESR_CTL_EL2: return "mmu_sesr_ctl_el2"; + case REG_SPRR_PPERM_EL12: return "sprr_pperm_el12"; + case REG_CNTPS_TVAL_EL1: return "cntps_tval_el1"; + case REG_CNTPS_CTL_EL1: return "cntps_ctl_el1"; + case REG_CNTPS_CVAL_EL1: return "cntps_cval_el1"; + case REG_PSTATE_SPSEL: return "pstate_spsel"; + case REG_PWRDNSAVE0: return "pwrdnsave0"; + case REG_NRG_ACC_CTL: return "nrg_acc_ctl"; + case REG_AON_CNT0: return "aon_cnt0"; + case REG_CPU_CNT0: return "cpu_cnt0"; + case REG_UPMCR0_EL1: return "upmcr0_el1"; + case REG_UPMC8: return "upmc8"; + case REG_AON_CNT8: return "aon_cnt8"; + case REG_PWRDNSAVE1: return "pwrdnsave1"; + case REG_CORE_NRG_ACC_DAT: return "core_nrg_acc_dat"; + case REG_AON_CNT_CTL0: return "aon_cnt_ctl0"; + case REG_CPU_CNT_CTL0: return "cpu_cnt_ctl0"; + case REG_UPMESR0_EL1: return "upmesr0_el1"; + case REG_UPMC9: return "upmc9"; + case REG_AON_CNT_CTL8: return "aon_cnt_ctl8"; + case REG_ACC_PWR_DN_SAVE: return "acc_pwr_dn_save"; + case REG_CPM_NRG_ACC_DAT: return "cpm_nrg_acc_dat"; + case REG_AON_CNT1: return "aon_cnt1"; + case REG_CPU_CNT1: return "cpu_cnt1"; + case REG_UPMSWCTRL_EL1: return "upmswctrl_el1"; + case REG_UPMC10: return "upmc10"; + case REG_AON_CNT9: return "aon_cnt9"; + case REG_CORE_SRM_NRG_ACC_DAT: return "core_srm_nrg_acc_dat"; + case REG_AON_CNT_CTL1: return "aon_cnt_ctl1"; + case REG_CPU_CNT_CTL1: return "cpu_cnt_ctl1"; + case REG_UPMECM0_EL1: return "upmecm0_el1"; + case REG_UPMC11: return "upmc11"; + case REG_AON_CNT_CTL9: return "aon_cnt_ctl9"; + case REG_AON_CNT_CTL: return "aon_cnt_ctl"; + case REG_CPM_SRM_NRG_ACC_DAT: return "cpm_srm_nrg_acc_dat"; + case REG_AON_CNT2: return "aon_cnt2"; + case REG_CPU_CNT2: return "cpu_cnt2"; + case REG_UPMECM1_EL1: return "upmecm1_el1"; + case REG_UPMC12: return "upmc12"; + case REG_AON_CNT10: return "aon_cnt10"; + case REG_CPU_CNT_CTL: return "cpu_cnt_ctl"; + case REG_AON_CNT_CTL2: return "aon_cnt_ctl2"; + case REG_CPU_CNT_CTL2: return "cpu_cnt_ctl2"; + case REG_UPMPCM_EL1: return "upmpcm_el1"; + case REG_UPMC13: return "upmc13"; + case REG_AON_CNT_CTL10: return "aon_cnt_ctl10"; + case REG_AON_CNT3: return "aon_cnt3"; + case REG_CPU_CNT3: return "cpu_cnt3"; + case REG_UPMSR_EL1: return "upmsr_el1"; + case REG_UPMC14: return "upmc14"; + case REG_AON_CNT11: return "aon_cnt11"; + case REG_AON_CNT_CTL3: return "aon_cnt_ctl3"; + case REG_CPU_CNT_CTL3: return "cpu_cnt_ctl3"; + case REG_UPMC0: return "upmc0"; + case REG_UPMC15: return "upmc15"; + case REG_AON_CNT_CTL11: return "aon_cnt_ctl11"; + case REG_AON_CNT4: return "aon_cnt4"; + case REG_CPU_CNT4: return "cpu_cnt4"; + case REG_UPMC1: return "upmc1"; + case REG_UPMECM2_EL1: return "upmecm2_el1"; + case REG_AON_CNT_CTL4: return "aon_cnt_ctl4"; + case REG_CPU_CNT_CTL4: return "cpu_cnt_ctl4"; + case REG_UPMC2: return "upmc2"; + case REG_UPMECM3_EL1: return "upmecm3_el1"; + case REG_AON_CNT5: return "aon_cnt5"; + case REG_CPU_CNT5: return "cpu_cnt5"; + case REG_UPMC3: return "upmc3"; + case REG_UPMCR1_EL1: return "upmcr1_el1"; + case REG_AON_CNT_CTL5: return "aon_cnt_ctl5"; + case REG_CPU_CNT_CTL5: return "cpu_cnt_ctl5"; + case REG_UPMC4: return "upmc4"; + case REG_UPMESR1_EL1: return "upmesr1_el1"; + case REG_AON_CNT6: return "aon_cnt6"; + case REG_CPU_CNT6: return "cpu_cnt6"; + case REG_UPMC5: return "upmc5"; + case REG_AON_CNT_CTL6: return "aon_cnt_ctl6"; + case REG_CPU_CNT_CTL6: return "cpu_cnt_ctl6"; + case REG_UPMC6: return "upmc6"; + case REG_AON_CNT7: return "aon_cnt7"; + case REG_CPU_CNT7: return "cpu_cnt7"; + case REG_UPMC7: return "upmc7"; + case REG_AON_CNT_CTL7: return "aon_cnt_ctl7"; + case REG_CPU_CNT_CTL7: return "cpu_cnt_ctl7"; + default: return ""; } } @@ -1498,4 +1499,3 @@ const char *get_system_register_name_decomposed(int op0, int op1, int CRn, int C enum SystemReg sr = (enum SystemReg)((op0<<14)|(op1<<11)|(CRn<<7)|(CRm<<3)|op2); return get_system_register_name(sr); } - diff --git a/arch/arm64/disassembler/sysregs_fmt_gen.h b/arch/arm64/disassembler/sysregs_fmt_gen.h index aaa54fed..b74c292e 100644 --- a/arch/arm64/disassembler/sysregs_fmt_gen.h +++ b/arch/arm64/disassembler/sysregs_fmt_gen.h @@ -1,3 +1,4 @@ +/* GENERATED FILE - DO NOT MODIFY - SUBMIT GITHUB ISSUE IF PROBLEM FOUND */ #pragma once #include "sysregs_gen.h" diff --git a/arch/arm64/disassembler/sysregs_gen.c b/arch/arm64/disassembler/sysregs_gen.c index 0ef69869..d9ec819f 100644 --- a/arch/arm64/disassembler/sysregs_gen.c +++ b/arch/arm64/disassembler/sysregs_gen.c @@ -1,3 +1,5 @@ +/* GENERATED FILE - DO NOT MODIFY - SUBMIT GITHUB ISSUE IF PROBLEM FOUND */ + #include <stddef.h> #include "sysregs_gen.h" @@ -5,1493 +7,1493 @@ /* must parallel has_system_register_name() from the decode side */ bool has_system_register_name(enum SystemReg sr) { - switch(sr) { - case REG_EDSCR: - case REG_EDPRSR: - case REG_UAOIMM: - case REG_PANIMM: - case REG_SPSELIMM: - case REG_DITIMM: - case REG_SVCRIMM: - case REG_ICIALLUIS: - case REG_ICIALLU: - case REG_DCIVAC: - case REG_DCISW: - case REG_ATS1E1R: - case REG_ATS1E1W: - case REG_ATS1E0R: - case REG_ATS1E0W: - case REG_DCCSW: - case REG_DCCISW: - case REG_TLBIVMALLE1IS: - case REG_TLBIVAE1IS: - case REG_TLBIASIDE1IS: - case REG_TLBIVAAE1IS: - case REG_TLBIVALE1IS: - case REG_TLBIVAALE1IS: - case REG_TLBIVMALLE1: - case REG_TLBIVAE1: - case REG_TLBIASIDE1: - case REG_TLBIVAAE1: - case REG_TLBIVALE1: - case REG_TLBIVAALE1: - case REG_DCZVA: - case REG_ICIVAU: - case REG_DCCVAC: - case REG_DCCVAU: - case REG_DCCIVAC: - case REG_ATS1E2R: - case REG_ATS1E2W: - case REG_ATS12E1R: - case REG_ATS12E1W: - case REG_ATS12E0R: - case REG_ATS12E0W: - case REG_TLBIIPAS2E1IS: - case REG_TLBIIPAS2LE1IS: - case REG_TLBIALLE2IS: - case REG_TLBIVAE2IS: - case REG_TLBIALLE1IS: - case REG_TLBIVALE2IS: - case REG_TLBIVMALLS12E1IS: - case REG_TLBIIPAS2E1: - case REG_TLBIIPAS2LE1: - case REG_TLBIALLE2: - case REG_TLBIVAE2: - case REG_TLBIALLE1: - case REG_TLBIVALE2: - case REG_TLBIVMALLS12E1: - case REG_ATS1E3R: - case REG_ATS1E3W: - case REG_TLBIALLE3IS: - case REG_TLBIVAE3IS: - case REG_TLBIVALE3IS: - case REG_TLBIALLE3: - case REG_TLBIVAE3: - case REG_TLBIVALE3: - case REG_OSDTRRX_EL1: - case REG_DBGBVR0_EL1: - case REG_DBGBCR0_EL1: - case REG_DBGWVR0_EL1: - case REG_DBGWCR0_EL1: - case REG_DBGBVR1_EL1: - case REG_DBGBCR1_EL1: - case REG_DBGWVR1_EL1: - case REG_DBGWCR1_EL1: - case REG_MDCCINT_EL1: - case REG_MDSCR_EL1: - case REG_DBGBVR2_EL1: - case REG_DBGBCR2_EL1: - case REG_DBGWVR2_EL1: - case REG_DBGWCR2_EL1: - case REG_OSDTRTX_EL1: - case REG_DBGBVR3_EL1: - case REG_DBGBCR3_EL1: - case REG_DBGWVR3_EL1: - case REG_DBGWCR3_EL1: - case REG_DBGBVR4_EL1: - case REG_DBGBCR4_EL1: - case REG_DBGWVR4_EL1: - case REG_DBGWCR4_EL1: - case REG_DBGBVR5_EL1: - case REG_DBGBCR5_EL1: - case REG_DBGWVR5_EL1: - case REG_DBGWCR5_EL1: - case REG_DBGWFAR: - case REG_OSECCR_EL1: - case REG_DBGBVR6_EL1: - case REG_DBGBCR6_EL1: - case REG_DBGWVR6_EL1: - case REG_DBGWCR6_EL1: - case REG_DBGBVR7_EL1: - case REG_DBGBCR7_EL1: - case REG_DBGWVR7_EL1: - case REG_DBGWCR7_EL1: - case REG_DBGBVR8_EL1: - case REG_DBGBCR8_EL1: - case REG_DBGWVR8_EL1: - case REG_DBGWCR8_EL1: - case REG_DBGBVR9_EL1: - case REG_DBGBCR9_EL1: - case REG_DBGWVR9_EL1: - case REG_DBGWCR9_EL1: - case REG_DBGBVR10_EL1: - case REG_DBGBCR10_EL1: - case REG_DBGWVR10_EL1: - case REG_DBGWCR10_EL1: - case REG_DBGBVR11_EL1: - case REG_DBGBCR11_EL1: - case REG_DBGWVR11_EL1: - case REG_DBGWCR11_EL1: - case REG_DBGBVR12_EL1: - case REG_DBGBCR12_EL1: - case REG_DBGWVR12_EL1: - case REG_DBGWCR12_EL1: - case REG_DBGBVR13_EL1: - case REG_DBGBCR13_EL1: - case REG_DBGWVR13_EL1: - case REG_DBGWCR13_EL1: - case REG_DBGBVR14_EL1: - case REG_DBGBCR14_EL1: - case REG_DBGWVR14_EL1: - case REG_DBGWCR14_EL1: - case REG_DBGBVR15_EL1: - case REG_DBGBCR15_EL1: - case REG_DBGWVR15_EL1: - case REG_DBGWCR15_EL1: - case REG_MDRAR_EL1: - case REG_OSLAR_EL1: - case REG_OSLSR_EL1: - case REG_OSDLR_EL1: - case REG_DBGPRCR_EL1: - case REG_CLAIMSET_EL1: - case REG_CLAIMCLR_EL1: - case REG_AUTHSTAT_EL1: - case REG_TRCTRACEIDR: - case REG_TRCVICTLR: - case REG_TRCSEQEVR0: - case REG_TRCCNTRLDVR0: - case REG_TRCIMSPEC0: - case REG_TRCPRGCTLR: - case REG_TRCQCTLR: - case REG_TRCVIIECTLR: - case REG_TRCSEQEVR1: - case REG_TRCCNTRLDVR1: - case REG_TRCIMSPEC1: - case REG_TRCPROCSELR: - case REG_TRCVISSCTLR: - case REG_TRCSEQEVR2: - case REG_TRCCNTRLDVR2: - case REG_TRCIMSPEC2: - case REG_TRCVIPCSSCTLR: - case REG_TRCCNTRLDVR3: - case REG_TRCIMSPEC3: - case REG_TRCCONFIGR: - case REG_TRCCNTCTLR0: - case REG_TRCIMSPEC4: - case REG_TRCCNTCTLR1: - case REG_TRCIMSPEC5: - case REG_TRCAUXCTLR: - case REG_TRCSEQRSTEVR: - case REG_TRCCNTCTLR2: - case REG_TRCIMSPEC6: - case REG_TRCSEQSTR: - case REG_TRCCNTCTLR3: - case REG_TRCIMSPEC7: - case REG_TRCEVENTCTL0R: - case REG_TRCVDCTLR: - case REG_TRCEXTINSELR: - case REG_TRCCNTVR0: - case REG_TRCEVENTCTL1R: - case REG_TRCVDSACCTLR: - case REG_TRCEXTINSELR1: - case REG_TRCCNTVR1: - case REG_TRCRSR: - case REG_TRCVDARCCTLR: - case REG_TRCEXTINSELR2: - case REG_TRCCNTVR2: - case REG_TRCSTALLCTLR: - case REG_TRCEXTINSELR3: - case REG_TRCCNTVR3: - case REG_TRCTSCTLR: - case REG_TRCSYNCPR: - case REG_TRCCCCTLR: - case REG_TRCBBCTLR: - case REG_TRCRSCTLR16: - case REG_TRCSSCCR0: - case REG_TRCSSPCICR0: - case REG_TRCOSLAR: - case REG_TRCRSCTLR17: - case REG_TRCSSCCR1: - case REG_TRCSSPCICR1: - case REG_TRCRSCTLR2: - case REG_TRCRSCTLR18: - case REG_TRCSSCCR2: - case REG_TRCSSPCICR2: - case REG_TRCRSCTLR3: - case REG_TRCRSCTLR19: - case REG_TRCSSCCR3: - case REG_TRCSSPCICR3: - case REG_TRCRSCTLR4: - case REG_TRCRSCTLR20: - case REG_TRCSSCCR4: - case REG_TRCSSPCICR4: - case REG_TRCPDCR: - case REG_TRCRSCTLR5: - case REG_TRCRSCTLR21: - case REG_TRCSSCCR5: - case REG_TRCSSPCICR5: - case REG_TRCRSCTLR6: - case REG_TRCRSCTLR22: - case REG_TRCSSCCR6: - case REG_TRCSSPCICR6: - case REG_TRCRSCTLR7: - case REG_TRCRSCTLR23: - case REG_TRCSSCCR7: - case REG_TRCSSPCICR7: - case REG_TRCRSCTLR8: - case REG_TRCRSCTLR24: - case REG_TRCSSCSR0: - case REG_TRCRSCTLR9: - case REG_TRCRSCTLR25: - case REG_TRCSSCSR1: - case REG_TRCRSCTLR10: - case REG_TRCRSCTLR26: - case REG_TRCSSCSR2: - case REG_TRCRSCTLR11: - case REG_TRCRSCTLR27: - case REG_TRCSSCSR3: - case REG_TRCRSCTLR12: - case REG_TRCRSCTLR28: - case REG_TRCSSCSR4: - case REG_TRCRSCTLR13: - case REG_TRCRSCTLR29: - case REG_TRCSSCSR5: - case REG_TRCRSCTLR14: - case REG_TRCRSCTLR30: - case REG_TRCSSCSR6: - case REG_TRCRSCTLR15: - case REG_TRCRSCTLR31: - case REG_TRCSSCSR7: - case REG_TRCACVR0: - case REG_TRCACVR8: - case REG_TRCACATR0: - case REG_TRCACATR8: - case REG_TRCDVCVR0: - case REG_TRCDVCVR4: - case REG_TRCDVCMR0: - case REG_TRCDVCMR4: - case REG_TRCACVR1: - case REG_TRCACVR9: - case REG_TRCACATR1: - case REG_TRCACATR9: - case REG_TRCACVR2: - case REG_TRCACVR10: - case REG_TRCACATR2: - case REG_TRCACATR10: - case REG_TRCDVCVR1: - case REG_TRCDVCVR5: - case REG_TRCDVCMR1: - case REG_TRCDVCMR5: - case REG_TRCACVR3: - case REG_TRCACVR11: - case REG_TRCACATR3: - case REG_TRCACATR11: - case REG_TRCACVR4: - case REG_TRCACVR12: - case REG_TRCACATR4: - case REG_TRCACATR12: - case REG_TRCDVCVR2: - case REG_TRCDVCVR6: - case REG_TRCDVCMR2: - case REG_TRCDVCMR6: - case REG_TRCACVR5: - case REG_TRCACVR13: - case REG_TRCACATR5: - case REG_TRCACATR13: - case REG_TRCACVR6: - case REG_TRCACVR14: - case REG_TRCACATR6: - case REG_TRCACATR14: - case REG_TRCDVCVR3: - case REG_TRCDVCVR7: - case REG_TRCDVCMR3: - case REG_TRCDVCMR7: - case REG_TRCACVR7: - case REG_TRCACVR15: - case REG_TRCACATR7: - case REG_TRCACATR15: - case REG_TRCCIDCVR0: - case REG_TRCVMIDCVR0: - case REG_TRCCIDCCTLR0: - case REG_TRCCIDCCTLR1: - case REG_TRCCIDCVR1: - case REG_TRCVMIDCVR1: - case REG_TRCVMIDCCTLR0: - case REG_TRCVMIDCCTLR1: - case REG_TRCCIDCVR2: - case REG_TRCVMIDCVR2: - case REG_TRCCIDCVR3: - case REG_TRCVMIDCVR3: - case REG_TRCCIDCVR4: - case REG_TRCVMIDCVR4: - case REG_TRCCIDCVR5: - case REG_TRCVMIDCVR5: - case REG_TRCCIDCVR6: - case REG_TRCVMIDCVR6: - case REG_TRCCIDCVR7: - case REG_TRCVMIDCVR7: - case REG_TRCITCTRL: - case REG_TRCCLAIMSET: - case REG_TRCCLAIMCLR: - case REG_TRCLAR: - case REG_TEECR32_EL1: - case REG_TEEHBR32_EL1: - case REG_MDCCSR_EL0: - case REG_MDDTR_EL0: - case REG_MDDTRTX_EL0: - case REG_DBGVCR32_EL2: - case REG_MIDR_EL1: - case REG_MPIDR_EL1: - case REG_REVIDR_EL1: - case REG_ID_PFR0_EL1: - case REG_ID_PFR1_EL1: - case REG_ID_DFR0_EL1: - case REG_ID_AFR0_EL1: - case REG_ID_MMFR0_EL1: - case REG_ID_MMFR1_EL1: - case REG_ID_MMFR2_EL1: - case REG_ID_MMFR3_EL1: - case REG_ID_ISAR0_EL1: - case REG_ID_ISAR1_EL1: - case REG_ID_ISAR2_EL1: - case REG_ID_ISAR3_EL1: - case REG_ID_ISAR4_EL1: - case REG_ID_ISAR5_EL1: - case REG_ID_MMFR4_EL1: - case REG_ID_ISAR6_EL1: - case REG_MVFR0_EL1: - case REG_MVFR1_EL1: - case REG_MVFR2_EL1: - case REG_ID_AA32RES3_EL1: - case REG_ID_PFR2_EL1: - case REG_ID_AA32RES5_EL1: - case REG_ID_AA32RES6_EL1: - case REG_ID_AA32RES7_EL1: - case REG_ID_AA64PFR0_EL1: - case REG_ID_AA64PFR1_EL1: - case REG_ID_AA64PFR2_EL1: - case REG_ID_AA64PFR3_EL1: - case REG_ID_AA64ZFR0_EL1: - case REG_ID_AA64SMFR0_EL1: - case REG_ID_AA64ZFR2_EL1: - case REG_ID_AA64ZFR3_EL1: - case REG_ID_AA64DFR0_EL1: - case REG_ID_AA64DFR1_EL1: - case REG_ID_AA64DFR2_EL1: - case REG_ID_AA64DFR3_EL1: - case REG_ID_AA64AFR0_EL1: - case REG_ID_AA64AFR1_EL1: - case REG_ID_AA64AFR2_EL1: - case REG_ID_AA64AFR3_EL1: - case REG_ID_AA64ISAR0_EL1: - case REG_ID_AA64ISAR1_EL1: - case REG_ID_AA64ISAR2_EL1: - case REG_ID_AA64ISAR3_EL1: - case REG_ID_AA64ISAR4_EL1: - case REG_ID_AA64ISAR5_EL1: - case REG_ID_AA64ISAR6_EL1: - case REG_ID_AA64ISAR7_EL1: - case REG_ID_AA64MMFR0_EL1: - case REG_ID_AA64MMFR1_EL1: - case REG_ID_AA64MMFR2_EL1: - case REG_ID_AA64MMFR3_EL1: - case REG_ID_AA64MMFR4_EL1: - case REG_ID_AA64MMFR5_EL1: - case REG_ID_AA64MMFR6_EL1: - case REG_ID_AA64MMFR7_EL1: - case REG_SCTLR_EL21: - case REG_ACTLR_EL21: - case REG_CPTR_EL21: - case REG_RGSR_EL1: - case REG_GCR_EL1: - case REG_TRFCR_EL1: - case REG_SMPRI_EL1: - case REG_SMCR_EL21: - case REG_TTBR0_EL21: - case REG_TTBR1_EL21: - case REG_TCR_EL21: - case REG_APIAKEYLO_EL21: - case REG_APIAKEYHI_EL21: - case REG_APIBKEYLO_EL21: - case REG_APIBKEYHI_EL21: - case REG_APDAKEYLO_EL21: - case REG_APDAKEYHI_EL21: - case REG_APDBKEYLO_EL21: - case REG_APDBKEYHI_EL21: - case REG_APGAKEYLO_EL21: - case REG_APGAKEYHI_EL21: - case REG_SPSR_EL21: - case REG_ELR_EL21: - case REG_SP_EL0: - case REG_SPSEL: - case REG_NESTEDCURRENTEL: - case REG_PAN: - case REG_UAO: - case REG_ICV_PMR_EL1: - case REG_AFSR0_EL21: - case REG_AFSR1_EL21: - case REG_ESR_EL21: - case REG_ERRIDR_EL1: - case REG_ERRSELR_EL1: - case REG_ERXCTLR_EL1: - case REG_ERXSTATUS_EL1: - case REG_ERXADDR_EL1: - case REG_ERXPFGCTL_EL1: - case REG_ERXPFGCDN_EL1: - case REG_ERXMISC0_EL1: - case REG_ERXMISC1_EL1: - case REG_ERXMISC2_EL1: - case REG_ERXMISC3_EL1: - case REG_ERXTS_EL1: - case REG_TFSR_EL1: - case REG_TFSRE0_EL1: - case REG_FAR_EL21: - case REG_PAR_EL1: - case REG_PMSCR_EL1: - case REG_PMSICR_EL1: - case REG_PMSIRR_EL1: - case REG_PMSFCR_EL1: - case REG_PMSEVFR_EL1: - case REG_PMSLATFR_EL1: - case REG_PMSIDR_EL1: - case REG_PMBLIMITR_EL1: - case REG_PMBPTR_EL1: - case REG_PMBSR_EL1: - case REG_PMBIDR_EL1: - case REG_TRBLIMITR_EL1: - case REG_TRBPTR_EL1: - case REG_TRBBASER_EL1: - case REG_TRBSR_EL1: - case REG_TRBMAR_EL1: - case REG_TRBTRG_EL1: - case REG_PMINTENSET_EL1: - case REG_PMINTENCLR_EL1: - case REG_PMMIR_EL1: - case REG_MAIR_EL21: - case REG_AMAIR_EL21: - case REG_LORSA_EL1: - case REG_LOREA_EL1: - case REG_LORN_EL1: - case REG_LORC_EL1: - case REG_LORID_EL1: - case REG_MPAM1_EL1: - case REG_MPAM0_EL1: - case REG_CTRR_C_LWR_EL21: - case REG_CTRR_C_UPR_EL21: - case REG_CTRR_D_LWR_EL21: - case REG_CTRR_D_UPR_EL21: - case REG_CTRR_C_LWR_EL12: - case REG_CTRR_C_UPR_EL12: - case REG_CTRR_D_LWR_EL12: - case REG_CTRR_D_UPR_EL12: - case REG_CTRR_C_LWR_EL2: - case REG_CTRR_C_UPR_EL2: - case REG_CTRR_D_LWR_EL2: - case REG_CTRR_D_UPR_EL2: - case REG_CTRR_C_CTL_EL21: - case REG_CTRR_D_CTL_EL21: - case REG_CTRR_C_CTL_EL12: - case REG_CTRR_D_CTL_EL12: - case REG_CTRR_C_CTL_EL2: - case REG_CTRR_D_CTL_EL2: - case REG_CTXR_A_LWR_EL21: - case REG_CTXR_A_UPR_EL21: - case REG_CTXR_B_LWR_EL21: - case REG_CTXR_B_UPR_EL21: - case REG_CTXR_C_LWR_EL21: - case REG_CTXR_C_UPR_EL21: - case REG_CTXR_D_LWR_EL21: - case REG_CTXR_D_UPR_EL21: - case REG_CTXR_A_LWR_EL12: - case REG_CTXR_A_UPR_EL12: - case REG_CTXR_B_LWR_EL12: - case REG_CTXR_B_UPR_EL12: - case REG_CTXR_C_LWR_EL12: - case REG_CTXR_C_UPR_EL12: - case REG_CTXR_D_LWR_EL12: - case REG_CTXR_D_UPR_EL12: - case REG_CTXR_A_LWR_EL2: - case REG_CTXR_A_UPR_EL2: - case REG_CTXR_B_LWR_EL2: - case REG_CTXR_B_UPR_EL2: - case REG_CTXR_C_LWR_EL2: - case REG_CTXR_C_UPR_EL2: - case REG_CTXR_D_LWR_EL2: - case REG_CTXR_D_UPR_EL2: - case REG_CTXR_A_CTL_EL21: - case REG_CTXR_B_CTL_EL21: - case REG_CTXR_C_CTL_EL21: - case REG_CTXR_D_CTL_EL21: - case REG_CTXR_A_CTL_EL12: - case REG_CTXR_B_CTL_EL12: - case REG_CTXR_C_CTL_EL12: - case REG_CTXR_D_CTL_EL12: - case REG_CTXR_A_CTL_EL2: - case REG_CTXR_B_CTL_EL2: - case REG_CTXR_C_CTL_EL2: - case REG_CTXR_D_CTL_EL2: - case REG_ACC_CTRR_C_LWR_EL2: - case REG_ACC_CTRR_C_UPR_EL2: - case REG_ACC_CTRR_D_LWR_EL2: - case REG_ACC_CTRR_D_UPR_EL2: - case REG_ACC_CTXR_A_LWR_EL2: - case REG_ACC_CTXR_A_UPR_EL2: - case REG_ACC_CTXR_B_LWR_EL2: - case REG_ACC_CTXR_B_UPR_EL2: - case REG_ACC_CTXR_C_LWR_EL2: - case REG_ACC_CTXR_C_UPR_EL2: - case REG_ACC_CTXR_D_LWR_EL2: - case REG_ACC_CTXR_D_UPR_EL2: - case REG_ACC_CTRR_C_CTL_EL2: - case REG_ACC_CTRR_D_CTL_EL2: - case REG_ACC_CTXR_A_CTL_EL2: - case REG_ACC_CTXR_B_CTL_EL2: - case REG_ACC_CTXR_C_CTL_EL2: - case REG_ACC_CTXR_D_CTL_EL2: - case REG_VBAR_EL21: - case REG_RVBAR_EL1: - case REG_RMR_EL1: - case REG_ISR_EL1: - case REG_DISR_EL1: - case REG_ICV_IAR0_EL1: - case REG_ICV_EOIR0_EL1: - case REG_ICV_HPPIR0_EL1: - case REG_ICV_BPR0_EL1: - case REG_ICC_AP0R0_EL1: - case REG_ICC_AP0R1_EL1: - case REG_ICC_AP0R2_EL1: - case REG_ICC_AP0R3_EL1: - case REG_ICC_AP1R0_EL1: - case REG_ICC_AP1R1_EL1: - case REG_ICC_AP1R2_EL1: - case REG_ICC_AP1R3_EL1: - case REG_ICV_DIR_EL1: - case REG_ICV_RPR_EL1: - case REG_ICC_SGI1R_EL1: - case REG_ICC_ASGI1R_EL1: - case REG_ICC_SGI0R_EL1: - case REG_ICV_IAR1_EL1: - case REG_ICV_EOIR1_EL1: - case REG_ICV_HPPIR1_EL1: - case REG_ICV_BPR1_EL1: - case REG_ICV_CTLR_EL1: - case REG_ICC_SRE_EL1: - case REG_ICV_IGRPEN0_EL1: - case REG_ICV_IGRPEN1_EL1: - case REG_ICC_SEIEN_EL1: - case REG_CONTEXTIDR_EL21: - case REG_TPIDR_EL1: - case REG_SCXTNUM_EL21: - case REG_REDIR_CNTKCTL_EL1: - case REG_HID0: - case REG_HID25: - case REG_HID26: - case REG_HID27: - case REG_HID28: - case REG_HID29: - case REG_HID34: - case REG_HID1: - case REG_HID21: - case REG_BIUVCSCUPCMDCRD: - case REG_BIUVCSCUPDATCRD: - case REG_HID2: - case REG_HID30: - case REG_HID31: - case REG_HID32: - case REG_HID33: - case REG_HID3: - case REG_BIUVCSCUPCMDCRDC2: - case REG_BIUVCSCUPDATCRDC2: - case REG_HID4: - case REG_HID5: - case REG_HID6: - case REG_HID7: - case REG_HID8: - case REG_HID9: - case REG_HID10: - case REG_BLOCK_CMAINT_CFG: - case REG_HID11: - case REG_HID18: - case REG_HID36: - case REG_HID37: - case REG_HID12: - case REG_HID15: - case REG_HID19: - case REG_BIU_TLIMIT: - case REG_HID13: - case REG_HID_RCTX_G0CTL: - case REG_HID_RCTX_G1CTL: - case REG_HID14: - case REG_HID16: - case REG_LLC_WRR2: - case REG_BIU_AFI_CFG: - case REG_HID17: - case REG_HID24: - case REG_HID35: - case REG_CCSIDRPL1_I_EL1: - case REG_CLIDR_EL1: - case REG_SMIDR_EL1: - case REG_AIDR_EL1: - case REG_PMCR0_EL1: - case REG_APPL_CONTEXTPTR: - case REG_LD_LATPROF_CTL_EL21: - case REG_AON_CPU_MSTALL_CTL01_EL1: - case REG_PM_MEMFLT_CTL23_EL1: - case REG_REDIR_ACNTV_CTL_EL0: - case REG_LCL_ACNTVCTSS_NOREDIR_EL0: - case REG_PMCR1_EL21: - case REG_LD_LATPROF_CTR_EL1: - case REG_AON_CPU_MSTALL_CTL23_EL1: - case REG_PM_MEMFLT_CTL45_EL1: - case REG_AGTCNTRDIR_EL21: - case REG_AGTCNTKCTL_NOREDIR_EL1: - case REG_PMCR2_EL1: - case REG_LD_LATPROF_STS_EL1: - case REG_AON_CPU_MSTALL_CTL45_EL1: - case REG_REDIR_ACNTHP_CVAL_EL2: - case REG_LCL_CNTVCT_NOREDIR_EL0: - case REG_AGTCNTP_CVAL_NOREDIR_EL0: - case REG_PMCR3_EL1: - case REG_LD_LATPROF_INF_EL1: - case REG_AON_CPU_MSTALL_CTL67_EL1: - case REG_REDIR_ACNTHP_TVAL_EL2: - case REG_LCL_CNTPCTSS_NOREDIR_EL0: - case REG_AGTCNTP_TVAL_NOREDIR_EL0: - case REG_PMCR4_EL1: - case REG_LD_LATPROF_CTL_EL2: - case REG_AON_CPU_MEMFLT_CTL01_EL1: - case REG_REDIR_ACNTHP_CTL_EL2: - case REG_LCL_CNTVCTSS_NOREDIR_EL0: - case REG_AGTCNTP_CTL_NOREDIR_EL0: - case REG_PMESR0_EL1: - case REG_LD_LATPROF_CMD_EL1: - case REG_AON_CPU_MEMFLT_CTL23_EL1: - case REG_REDIR_ACNTHV_CVAL_EL2: - case REG_AGTCNTV_CVAL_NOREDIR_EL0: - case REG_PMESR1_EL1: - case REG_PMCR1_EL2: - case REG_AON_CPU_MEMFLT_CTL45_EL1: - case REG_REDIR_ACNTHV_TVAL_EL2: - case REG_CNTKCTL_NOREDIR_EL1: - case REG_AGTCNTV_TVAL_NOREDIR_EL0: - case REG_OPMAT0_EL1: - case REG_PMCR1_EL12: - case REG_AON_CPU_MEMFLT_CTL67_EL1: - case REG_REDIR_ACNTHV_CTL_EL2: - case REG_CNTP_CVAL_NOREDIR_EL0: - case REG_AGTCNTV_CTL_NOREDIR_EL0: - case REG_OPMAT1_EL1: - case REG_PMCR1_GL12: - case REG_AON_CPU_MSTALL_CTR0_EL1: - case REG_REDIR_ACNTFRQ_EL0: - case REG_CNTP_TVAL_NOREDIR_EL0: - case REG_LCL_CNTPCT_NOREDIR_EL0: - case REG_OPMSK0_EL1: - case REG_LD_LATPROF_CTL_EL12: - case REG_AON_CPU_MSTALL_CTR1_EL1: - case REG_AGTCNTVOFF_EL2: - case REG_CNTP_CTL_NOREDIR_EL0: - case REG_CNTV_CTL_NOREDIR_EL0: - case REG_OPMSK1_EL1: - case REG_LD_LATPROF_INF_EL2: - case REG_AON_CPU_MSTALL_CTR2_EL1: - case REG_REDIR_ACNTP_CVAL_EL0: - case REG_CNTV_CVAL_NOREDIR_EL0: - case REG_LCL_ACNTPCT_NOREDIR_EL0: - case REG_AON_CPU_MSTALL_CTR3_EL1: - case REG_REDIR_ACNTP_TVAL_EL0: - case REG_CNTV_TVAL_NOREDIR_EL0: - case REG_VMSA_HV_LOCK_EL2: - case REG_PMSWCTRL_EL1: - case REG_PMCR5_EL0: - case REG_AON_CPU_MSTALL_CTR4_EL1: - case REG_PMCOMPARE0_EL1: - case REG_PMCOMPARE1_EL1: - case REG_VMSA_NV_LOCK_EL2: - case REG_PMSR_EL1: - case REG_AON_CPU_MSTALL_CTR5_EL1: - case REG_REDIR_ACNTP_CTL_EL0: - case REG_PMCOMPARE5_EL1: - case REG_PMCOMPARE6_EL1: - case REG_PMCOMPARE7_EL1: - case REG_PMCR_BVRNG4_EL1: - case REG_PM_PMI_PC: - case REG_AON_CPU_MSTALL_CTR6_EL1: - case REG_REDIR_ACNTV_CVAL_EL0: - case REG_LCL_ACNTVCT_NOREDIR_EL0: - case REG_PMCR_BVRNG5_EL1: - case REG_AON_CPU_MSTALL_CTR7_EL1: - case REG_REDIR_ACNTV_TVAL_EL0: - case REG_LCL_ACNTPCTSS_NOREDIR_EL0: - case REG_CSSELR_EL1: - case REG_PMC0: - case REG_UPMCFILTER0: - case REG_UPMCFILTER1: - case REG_UPMCFILTER2: - case REG_UPMCFILTER3: - case REG_UPMCFILTER4: - case REG_UPMCFILTER5: - case REG_UPMCFILTER6: - case REG_PMC1: - case REG_UPMCFILTER7: - case REG_PMC2: - case REG_PMC3: - case REG_PMC4: - case REG_PMC5: - case REG_PMC6: - case REG_PMC7: - case REG_PMC8: - case REG_PMC9: - case REG_PMTRHLD6_EL1: - case REG_PMTRHLD4_EL1: - case REG_PMTRHLD2_EL1: - case REG_PMMMAP_EL1: - case REG_CTR_EL0: - case REG_DCZID_EL0: - case REG_NZCV: - case REG_DAIF: - case REG_SVCR: - case REG_DIT: - case REG_SSBS: - case REG_TCO: - case REG_FPCR: - case REG_FPSR: - case REG_DSPSR_EL0: - case REG_DLR_EL0: - case REG_PMCR_EL0: - case REG_PMCNTENSET_EL0: - case REG_PMCNTENCLR_EL0: - case REG_PMOVSCLR_EL0: - case REG_PMSWINC_EL0: - case REG_PMSELR_EL0: - case REG_PMCCNTR_EL0: - case REG_PMXEVTYPER_EL0: - case REG_PMXEVCNTR_EL0: - case REG_DAIFCLR: - case REG_PMUSERENR_EL0: - case REG_PMOVSSET_EL0: - case REG_TPIDR_EL0: - case REG_TPIDRRO_EL0: - case REG_TPIDR2_EL0: - case REG_SCXTNUM_EL0: - case REG_AMCR_EL0: - case REG_AMUSERENR_EL0: - case REG_AMCNTENCLR0_EL0: - case REG_AMCNTENSET0_EL0: - case REG_AMCNTENCLR1_EL0: - case REG_AMCNTENSET1_EL0: - case REG_AMEVCNTR00_EL0: - case REG_AMEVCNTR01_EL0: - case REG_AMEVCNTR02_EL0: - case REG_AMEVCNTR03_EL0: - case REG_AMEVCNTR10_EL0: - case REG_AMEVCNTR11_EL0: - case REG_AMEVCNTR12_EL0: - case REG_AMEVCNTR13_EL0: - case REG_AMEVCNTR14_EL0: - case REG_AMEVCNTR15_EL0: - case REG_AMEVCNTR16_EL0: - case REG_AMEVCNTR17_EL0: - case REG_AMEVCNTR18_EL0: - case REG_AMEVCNTR19_EL0: - case REG_AMEVCNTR110_EL0: - case REG_AMEVCNTR111_EL0: - case REG_AMEVCNTR112_EL0: - case REG_AMEVCNTR113_EL0: - case REG_AMEVCNTR114_EL0: - case REG_AMEVCNTR115_EL0: - case REG_AMEVTYPER10_EL0: - case REG_AMEVTYPER11_EL0: - case REG_AMEVTYPER12_EL0: - case REG_AMEVTYPER13_EL0: - case REG_AMEVTYPER14_EL0: - case REG_AMEVTYPER15_EL0: - case REG_AMEVTYPER16_EL0: - case REG_AMEVTYPER17_EL0: - case REG_AMEVTYPER18_EL0: - case REG_AMEVTYPER19_EL0: - case REG_AMEVTYPER110_EL0: - case REG_AMEVTYPER111_EL0: - case REG_AMEVTYPER112_EL0: - case REG_AMEVTYPER113_EL0: - case REG_AMEVTYPER114_EL0: - case REG_AMEVTYPER115_EL0: - case REG_REDIR_CNTFRQ_EL0: - case REG_REDIR_LCL_CNTPCT_EL0: - case REG_REDIR_LCL_CNTVCT_EL0: - case REG_REDIR_LCL_CNTPCTSS_EL0: - case REG_REDIR_LCL_CNTVCTSS_EL0: - case REG_REDIR_CNTP_TVAL_EL0: - case REG_REDIR_CNTP_CTL_EL0: - case REG_REDIR_CNTP_CVAL_EL0: - case REG_REDIR_CNTV_TVAL_EL0: - case REG_REDIR_CNTV_CTL_EL0: - case REG_REDIR_CNTV_CVAL_EL0: - case REG_PMEVCNTR0_EL0: - case REG_PMEVCNTR1_EL0: - case REG_PMEVCNTR2_EL0: - case REG_PMEVCNTR3_EL0: - case REG_PMEVCNTR4_EL0: - case REG_PMEVCNTR5_EL0: - case REG_PMEVCNTR6_EL0: - case REG_PMEVCNTR7_EL0: - case REG_PMEVCNTR8_EL0: - case REG_PMEVCNTR9_EL0: - case REG_PMEVCNTR10_EL0: - case REG_PMEVCNTR11_EL0: - case REG_PMEVCNTR12_EL0: - case REG_PMEVCNTR13_EL0: - case REG_PMEVCNTR14_EL0: - case REG_PMEVCNTR15_EL0: - case REG_PMEVCNTR16_EL0: - case REG_PMEVCNTR17_EL0: - case REG_PMEVCNTR18_EL0: - case REG_PMEVCNTR19_EL0: - case REG_PMEVCNTR20_EL0: - case REG_PMEVCNTR21_EL0: - case REG_PMEVCNTR22_EL0: - case REG_PMEVCNTR23_EL0: - case REG_PMEVCNTR24_EL0: - case REG_PMEVCNTR25_EL0: - case REG_PMEVCNTR26_EL0: - case REG_PMEVCNTR27_EL0: - case REG_PMEVCNTR28_EL0: - case REG_PMEVCNTR29_EL0: - case REG_PMEVCNTR30_EL0: - case REG_PMEVTYPER0_EL0: - case REG_PMEVTYPER1_EL0: - case REG_PMEVTYPER2_EL0: - case REG_PMEVTYPER3_EL0: - case REG_PMEVTYPER4_EL0: - case REG_PMEVTYPER5_EL0: - case REG_PMEVTYPER6_EL0: - case REG_PMEVTYPER7_EL0: - case REG_PMEVTYPER8_EL0: - case REG_PMEVTYPER9_EL0: - case REG_PMEVTYPER10_EL0: - case REG_PMEVTYPER11_EL0: - case REG_PMEVTYPER12_EL0: - case REG_PMEVTYPER13_EL0: - case REG_PMEVTYPER14_EL0: - case REG_PMEVTYPER15_EL0: - case REG_PMEVTYPER16_EL0: - case REG_PMEVTYPER17_EL0: - case REG_PMEVTYPER18_EL0: - case REG_PMEVTYPER19_EL0: - case REG_PMEVTYPER20_EL0: - case REG_PMEVTYPER21_EL0: - case REG_PMEVTYPER22_EL0: - case REG_PMEVTYPER23_EL0: - case REG_PMEVTYPER24_EL0: - case REG_PMEVTYPER25_EL0: - case REG_PMEVTYPER26_EL0: - case REG_PMEVTYPER27_EL0: - case REG_PMEVTYPER28_EL0: - case REG_PMEVTYPER29_EL0: - case REG_PMEVTYPER30_EL0: - case REG_PMCCFILTR_EL0: - case REG_LSU_ERR_STS: - case REG_AFLATCTL1_EL1: - case REG_AFLATVALBIN0_EL1: - case REG_AFLATINFLO_EL1: - case REG_LSU_ERR_CTL: - case REG_AFLATCTL2_EL1: - case REG_AFLATVALBIN1_EL1: - case REG_AFLATINFHI_EL1: - case REG_AFLATCTL3_EL1: - case REG_AFLATVALBIN2_EL1: - case REG_AFLATCTL4_EL1: - case REG_AFLATVALBIN3_EL1: - case REG_LLC_FILL_CTL: - case REG_AFLATCTL5_LO_EL1: - case REG_AFLATVALBIN4_EL1: - case REG_AFLATCTL5_HI_EL1: - case REG_LLC_FILL_DAT: - case REG_AFLATVALBIN5_EL1: - case REG_AFLATVALBIN6_EL1: - case REG_LLC_RAM_CONFIG: - case REG_AFLATVALBIN7_EL1: - case REG_LLC_ERR_STS: - case REG_CMAINT_BCAST_LIST_0: - case REG_CMAINT_BCAST_LIST_1: - case REG_CMAINT_BCAST_CTL: - case REG_LLC_ERR_ADR: - case REG_LLC_ERR_CTL: - case REG_LLC_ERR_INJ: - case REG_LLC_ERR_INF: - case REG_USERTAGSEL_EL1: - case REG_UUSERTAG_EL0: - case REG_KUSERTAG_EL1: - case REG_HUSERTAG_EL2: - case REG_LLC_TRACE_CTL0: - case REG_LLC_TRACE_CTL1: - case REG_LLC_UP_REQ_VC: - case REG_LLC_UP_REQ_VC_THRESH: - case REG_LLC_UP_REQ_VC_2: - case REG_LLC_UP_REQ_VC_THRESH_2: - case REG_LLC_DRAM_HASH0: - case REG_LLC_DRAM_HASH1: - case REG_LLC_DRAM_HASH2: - case REG_LLC_DRAM_HASH3: - case REG_LLC_TRACE_CTL2: - case REG_LLC_DRAM_HASH4: - case REG_LLC_UP_REQ_VC_3: - case REG_LLC_UP_REQ_VC_THRESH_3: - case REG_LLC_UP_REQ_VC_4: - case REG_LLC_UP_REQ_VC_THRESH_4: - case REG_LLC_HASH0: - case REG_LLC_HASH1: - case REG_LLC_HASH2: - case REG_LLC_HASH3: - case REG_LLC_WRR: - case REG_LLC_DRAM_HASH5: - case REG_LLC_DRAM_HASH6: - case REG_VPIDR_EL2: - case REG_VMPIDR_EL2: - case REG_SCTLR_EL2: - case REG_ACTLR_EL2: - case REG_HCR_EL2: - case REG_MDCR_EL2: - case REG_CPTR_EL2: - case REG_HSTR_EL2: - case REG_HFGRTR_EL2: - case REG_HFGWTR_EL2: - case REG_HFGITR_EL2: - case REG_HACR_EL2: - case REG_TRFCR_EL2: - case REG_HCRX_EL2: - case REG_SMPRIMAP_EL2: - case REG_SMCR_EL2: - case REG_SDER32_EL2: - case REG_TTBR0_EL2: - case REG_TTBR1_EL2: - case REG_TCR_EL2: - case REG_VTTBR_EL2: - case REG_VTCR_EL2: - case REG_VNCR_EL2: - case REG_VSTTBR_EL2: - case REG_VSTCR_EL2: - case REG_DACR32_EL2: - case REG_HDFGRTR_EL2: - case REG_HDFGWTR_EL2: - case REG_SPSR_NV_EL21: - case REG_ELR_NV_EL21: - case REG_SP_EL1: - case REG_SPSR_IRQ: - case REG_SPSR_ABT: - case REG_SPSR_UND: - case REG_SPSR_FIQ: - case REG_IFSR32_EL2: - case REG_AFSR0_EL2: - case REG_AFSR1_EL2: - case REG_ESR_NV_EL21: - case REG_VSESR_EL2: - case REG_FPEXC32_EL2: - case REG_TFSR_EL2: - case REG_FAR_NV_EL21: - case REG_HPFAR_EL2: - case REG_PMSCR_EL2: - case REG_MAIR_EL2: - case REG_AMAIR_EL2: - case REG_MPAMHCR_EL2: - case REG_MPAMVPMV_EL2: - case REG_MPAM2_EL2: - case REG_MPAMVPM0_EL2: - case REG_MPAMVPM1_EL2: - case REG_MPAMVPM2_EL2: - case REG_MPAMVPM3_EL2: - case REG_MPAMVPM4_EL2: - case REG_MPAMVPM5_EL2: - case REG_MPAMVPM6_EL2: - case REG_MPAMVPM7_EL2: - case REG_VBAR_EL2: - case REG_RVBAR_EL2: - case REG_RMR_EL2: - case REG_VDISR_EL2: - case REG_ICH_AP0R0_EL2: - case REG_ICH_AP0R1_EL2: - case REG_ICH_AP0R2_EL2: - case REG_ICH_AP0R3_EL2: - case REG_ICH_AP1R0_EL2: - case REG_ICH_AP1R1_EL2: - case REG_ICH_AP1R2_EL2: - case REG_ICH_AP1R3_EL2: - case REG_ICH_VSEIR_EL2: - case REG_ICC_SRE_EL2: - case REG_ICH_HCR_EL2: - case REG_ICH_VTR_EL2: - case REG_ICH_MISR_EL2: - case REG_ICH_EISR_EL2: - case REG_ICH_ELRSR_EL2: - case REG_ICH_VMCR_EL2: - case REG_ICH_LR0_EL2: - case REG_ICH_LR1_EL2: - case REG_ICH_LR2_EL2: - case REG_ICH_LR3_EL2: - case REG_ICH_LR4_EL2: - case REG_ICH_LR5_EL2: - case REG_ICH_LR6_EL2: - case REG_ICH_LR7_EL2: - case REG_ICH_LR8_EL2: - case REG_ICH_LR9_EL2: - case REG_ICH_LR10_EL2: - case REG_ICH_LR11_EL2: - case REG_ICH_LR12_EL2: - case REG_ICH_LR13_EL2: - case REG_ICH_LR14_EL2: - case REG_ICH_LR15_EL2: - case REG_CONTEXTIDR_EL2: - case REG_TPIDR_EL2: - case REG_SCXTNUM_EL2: - case REG_CNTVOFF_EL2: - case REG_REDIR_CNTHCTL_EL2: - case REG_REDIR_CNTHP_TVAL_EL2: - case REG_REDIR_CNTHP_CTL_EL2: - case REG_REDIR_CNTHP_CVAL_EL2: - case REG_REDIR_CNTHV_TVAL_EL2: - case REG_REDIR_CNTHV_CTL_EL2: - case REG_REDIR_CNTHV_CVAL_EL2: - case REG_CNTHVS_TVAL_EL2: - case REG_CNTHVS_CTL_EL2: - case REG_CNTHVS_CVAL_EL2: - case REG_CNTHPS_TVAL_EL2: - case REG_CNTHPS_CTL_EL2: - case REG_CNTHPS_CVAL_EL2: - case REG_FED_ERR_STS: - case REG_FED_ERR_CTL: - case REG_APCTL_EL21: - case REG_KERNKEYLO_EL21: - case REG_KERNKEYHI_EL21: - case REG_VMSA_LOCK_EL1: - case REG_AMX_STATE_T_EL1: - case REG_AMX_CONFIG_EL21: - case REG_VMSA_LOCK_EL2: - case REG_CTRR_B_UPR_EL21: - case REG_CTRR_B_LWR_EL21: - case REG_SP_SETUP_GL21: - case REG_SP_SETUP_GL2: - case REG_CTRR_B_CTL_EL21: - case REG_CTRR_A_LWR_EL21: - case REG_CTRR_A_UPR_EL21: - case REG_CTRR_A_CTL_EL21: - case REG_VMSA_LOCK_EL12: - case REG_AGTCNTV_CTL_EL02: - case REG_AMX_STATE_EL1: - case REG_AMX_STATUS_EL1: - case REG_AGTCNTP_CVAL_EL02: - case REG_REDIR_ACNTP_TVAL_EL02: - case REG_AGTCNTP_CTL_EL02: - case REG_AGTCNTV_CVAL_EL02: - case REG_AGTCNTV_TVAL_EL02: - case REG_AMX_CONFIG_EL12: - case REG_AMX_CONFIG_EL2: - case REG_SPRR_HUPERM_EL0: - case REG_SPRR_VUPERM_EL0: - case REG_CTRR_A_CTL_EL2: - case REG_CTRR_B_CTL_EL2: - case REG_CTRR_A_LWR_EL2: - case REG_CTRR_A_UPR_EL2: - case REG_CTRR_B_LWR_EL2: - case REG_CTRR_B_UPR_EL2: - case REG_SPRR_HUMPRR_EL2: - case REG_SPRR_HUPERM_SH01_EL2: - case REG_SPRR_HUPERM_SH02_EL2: - case REG_SPRR_HUPERM_SH03_EL2: - case REG_SPRR_HUPERM_SH04_EL2: - case REG_SPRR_HUPERM_SH05_EL2: - case REG_SPRR_HUPERM_SH06_EL2: - case REG_SPRR_HUPERM_SH07_EL2: - case REG_SPRR_VUMPRR_EL1: - case REG_SPRR_VUPERM_SH01_EL1: - case REG_SPRR_VUPERM_SH02_EL1: - case REG_SPRR_VUPERM_SH03_EL1: - case REG_SPRR_VUPERM_SH04_EL1: - case REG_SPRR_VUPERM_SH05_EL1: - case REG_SPRR_VUPERM_SH06_EL1: - case REG_SPRR_VUPERM_SH07_EL1: - case REG_CTRR_A_LWR_EL12: - case REG_CTRR_A_UPR_EL12: - case REG_CTRR_B_LWR_EL12: - case REG_CTRR_B_UPR_EL12: - case REG_CTRR_A_CTL_EL12: - case REG_CTRR_B_CTL_EL12: - case REG_REDIR_ACNTKCTL_EL1: - case REG_AGTCNTKCTL_EL12: - case REG_PREDAKEYLO_EL1: - case REG_PREDAKEYHI_EL1: - case REG_PREDBKEYLO_EL1: - case REG_PREDBKEYHI_EL1: - case REG_SIQ_CFG_EL1: - case REG_REDIR_LCL_ACNTPCTSS_EL0: - case REG_REDIR_LCL_ACNTVCTSS_EL0: - case REG_AVNCR_EL2: - case REG_ACC_CTRR_A_LWR_EL2: - case REG_ACC_CTRR_A_UPR_EL2: - case REG_ACC_CTRR_B_LWR_EL2: - case REG_ACC_CTRR_B_UPR_EL2: - case REG_ACC_CTRR_A_CTL_EL2: - case REG_ACC_CTRR_B_CTL_EL2: - case REG_REDIR_LCL_ACNTPCT_EL0: - case REG_REDIR_LCL_ACNTVCT_EL0: - case REG_ACFG_EL1: - case REG_AHCR_EL2: - case REG_APL_INTSTATUS_EL21: - case REG_APL_INTSTATUS_EL2: - case REG_REDIR_ACNTHCTL_EL2: - case REG_JAPIAKEYLO_NV_EL21: - case REG_JAPIAKEYHI_NV_EL21: - case REG_JAPIBKEYLO_NV_EL21: - case REG_JAPIBKEYHI_NV_EL21: - case REG_JAPIAKEYLO_EL21: - case REG_JAPIAKEYHI_EL21: - case REG_JAPIBKEYLO_EL21: - case REG_JAPIBKEYHI_EL21: - case REG_JAPIAKEYLO_EL12: - case REG_JAPIAKEYHI_EL12: - case REG_JAPIBKEYLO_EL12: - case REG_JAPIBKEYHI_EL12: - case REG_AGTCNTRDIR_EL2: - case REG_AGTCNTRDIR_EL12: - case REG_JRANGE_EL2: - case REG_JRANGE_EL21: - case REG_JRANGE_EL12: - case REG_JCTL_EL2: - case REG_JCTL_EL21: - case REG_JCTL_EL12: - case REG_JCTL_EL0: - case REG_AMDSCR_EL1: - case REG_SCTLR_EL12: - case REG_ACTLR_EL12: - case REG_CPACR_EL12: - case REG_TRFCR_EL12: - case REG_SMCR_EL12: - case REG_TTBR0_EL12: - case REG_TTBR1_EL12: - case REG_TCR_EL12: - case REG_SPSR_EL12: - case REG_ELR_EL12: - case REG_AFSR0_EL12: - case REG_AFSR1_EL12: - case REG_ESR_EL12: - case REG_TFSR_EL12: - case REG_FAR_EL12: - case REG_PMSCR_EL12: - case REG_MAIR_EL12: - case REG_AMAIR_EL12: - case REG_MPAM1_EL12: - case REG_VBAR_EL12: - case REG_CONTEXTIDR_EL12: - case REG_SCXTNUM_EL12: - case REG_CNTKCTL_EL12: - case REG_CNTP_TVAL_EL02: - case REG_CNTP_CTL_EL02: - case REG_CNTP_CVAL_EL02: - case REG_CNTV_TVAL_EL02: - case REG_CNTV_CTL_EL02: - case REG_CNTV_CVAL_EL02: - case REG_IPI_RR_LOCAL_EL1: - case REG_IPI_RR_GLOBAL_EL1: - case REG_AF_ERR_CFG0: - case REG_AP_ERR_CFG0: - case REG_AF_ERR_SRC_IDS: - case REG_DPC_ERR_STS: - case REG_DPC_ERR_CTL: - case REG_PROD_TRC_CORE_CFG_EL21: - case REG_TRACE_CORE_CFG: - case REG_IPI_SR: - case REG_APL_LRTMR_EL2: - case REG_APL_INTENABLE_EL2: - case REG_KTRACE_MESSAGE: - case REG_TRACE_CORE_CFG_EXT: - case REG_PROD_TRC_CORE_CFG_EL2: - case REG_HID_PROD_TRC_CORE_CFG_EL1: - case REG_DBG_WRAP_GLB: - case REG_TRACE_STREAM_BASE: - case REG_TRACE_STREAM_FILL: - case REG_TRACE_STREAM_BASE1: - case REG_TRACE_STREAM_FILL1: - case REG_TRACE_STREAM_IRQ: - case REG_WATCHDOGDIAG0: - case REG_WATCHDOGDIAG1: - case REG_TRACE_AUX_CTL: - case REG_IPI_CR: - case REG_UTRIG_EVENT: - case REG_HID_PROD_TRC_MASK_EL1: - case REG_TRACE_CTL: - case REG_TRACE_DAT: - case REG_PROD_TRC_STRM_BASE0_GL2: - case REG_PROD_TRC_STRM_BASE1_GL2: - case REG_CPU_CFG: - case REG_PBLK_STS: - case REG_PROD_TRC_CTL_EL21: - case REG_PROD_TRC_STRM_BASE0_GL21: - case REG_PROD_TRC_STRM_BASE1_GL21: - case REG_PROD_TRC_STRM_FIQ_EL21: - case REG_CPU_OVRD: - case REG_PBLK_EXE_ST: - case REG_PROD_TRC_CORE_GL_CTL_GL21: - case REG_PROD_TRC_CORE_GL_CTL_GL2: - case REG_ACC_OVRD: - case REG_ACC_OVRD1: - case REG_CPM_PWRDN_CTL: - case REG_PROD_TRC_BUF_RESTORE0_GL21: - case REG_PROD_TRC_BUF_RESTORE1_GL21: - case REG_PROD_TRC_EN_GL21: - case REG_PRE_LLCFLUSH_TMR: - case REG_BIUINTFCTL_CFG: - case REG_BIUINTFWRR_CFG: - case REG_PRE_TD_TMR: - case REG_ACC_SLP_WAKE_UP_TMR: - case REG_PBLK_PSW_DLY: - case REG_CPU_STS: - case REG_HIST_TRIG: - case REG_PROD_TRC_BUF_RESTORE0_GL2: - case REG_PROD_TRC_BUF_RESTORE1_GL2: - case REG_PROD_TRC_STRM_FILL0_EL1: - case REG_PROD_TRC_STRM_FILL1_EL1: - case REG_ARRAY_INDEX: - case REG_PROD_TRC_CTL_EL2: - case REG_PROD_TRC_EN_GL2: - case REG_PROD_TRC_STRM_FIQ_EL2: - case REG_PROD_TRC_CPMU_DUMP_TRIG_EL1: - case REG_PROD_LOSS_COUNT_EL1: - case REG_SW_TRACE_DATA_EL0: - case REG_IL1_DATA0: - case REG_IL1_DATA1: - case REG_DL1_DATA0: - case REG_DL1_DATA1: - case REG_MMUDATA0: - case REG_MMUDATA1: - case REG_DL1_DATA2: - case REG_IL1_DATA2: - case REG_LLC_DATA0: - case REG_LLC_DATA1: - case REG_SCTLR_EL3: - case REG_ACTLR_EL3: - case REG_SCR_EL3: - case REG_SDER32_EL3: - case REG_CPTR_EL3: - case REG_MDCR_EL3: - case REG_TTBR0_EL3: - case REG_TCR_EL3: - case REG_SPSR_EL3: - case REG_ELR_EL3: - case REG_SP_EL2: - case REG_AFSR0_EL3: - case REG_AFSR1_EL3: - case REG_ESR_EL3: - case REG_TFSR_EL3: - case REG_FAR_EL3: - case REG_MAIR_EL3: - case REG_AMAIR_EL3: - case REG_MPAM3_EL3: - case REG_VBAR_EL3: - case REG_RVBAR_EL3: - case REG_RMR_EL3: - case REG_ICC_CTLR_EL3: - case REG_ICC_SRE_EL3: - case REG_ICC_IGRPEN1_EL3: - case REG_TPIDR_EL3: - case REG_SCXTNUM_EL3: - case REG_MMU_ERR_STS: - case REG_AFSR1_GL21: - case REG_AFSR1_GL2: - case REG_AFSR1_GL12: - case REG_BP_OBJC_ADR_EL1: - case REG_BP_OBJC_CTL_EL1: - case REG_SP_GL11_GL21: - case REG_MMU_SESR_EL2: - case REG_SPRR_CONFIG_EL21: - case REG_HPFAR_GL2: - case REG_GXF_CONFIG_EL21: - case REG_SPRR_AMRANGE_EL1: - case REG_GXF_CONFIG_EL2: - case REG_SPRR_UPERM_EL02: - case REG_SPRR_PPERM_EL21: - case REG_SPRR_PPERM_EL2: - case REG_APGAKEYLO_EL12: - case REG_APGAKEYHI_EL12: - case REG_KERNKEYLO_EL12: - case REG_KERNKEYHI_EL12: - case REG_AFPCR_EL0: - case REG_SP_GL22: - case REG_AMXIDR_EL1: - case REG_SPRR_UMPRR_EL1: - case REG_SPRR_PMPRR_EL21: - case REG_SPRR_PMPRR_EL2: - case REG_SPRR_UPERM_SH01_EL1: - case REG_SPRR_UPERM_SH02_EL1: - case REG_SPRR_UPERM_SH03_EL1: - case REG_SPRR_UPERM_SH04_EL1: - case REG_SPRR_UPERM_SH05_EL1: - case REG_SPRR_UPERM_SH06_EL1: - case REG_SPRR_UPERM_SH07_EL1: - case REG_SPRR_PPERM_SH01_EL21: - case REG_SPRR_PPERM_SH02_EL21: - case REG_SPRR_PPERM_SH03_EL21: - case REG_SPRR_PPERM_SH04_EL21: - case REG_SPRR_PPERM_SH05_EL21: - case REG_SPRR_PPERM_SH06_EL21: - case REG_SPRR_PPERM_SH07_EL21: - case REG_SPRR_PPERM_SH01_EL2: - case REG_SPRR_PPERM_SH02_EL2: - case REG_SPRR_PPERM_SH03_EL2: - case REG_SPRR_PPERM_SH04_EL2: - case REG_SPRR_PPERM_SH05_EL2: - case REG_SPRR_PPERM_SH06_EL2: - case REG_SPRR_PPERM_SH07_EL2: - case REG_SPRR_PMPRR_EL12: - case REG_SPRR_PPERM_SH01_EL12: - case REG_SPRR_PPERM_SH02_EL12: - case REG_SPRR_PPERM_SH03_EL12: - case REG_SPRR_PPERM_SH04_EL12: - case REG_SPRR_PPERM_SH05_EL12: - case REG_SPRR_PPERM_SH06_EL12: - case REG_SPRR_PPERM_SH07_EL12: - case REG_APIAKEYLO_EL12: - case REG_APIAKEYHI_EL12: - case REG_APIBKEYLO_EL12: - case REG_APIBKEYHI_EL12: - case REG_APDAKEYLO_EL12: - case REG_APDAKEYHI_EL12: - case REG_APDBKEYLO_EL12: - case REG_APDBKEYHI_EL12: - case REG_CURRENTG: - case REG_GXF_ENTRY_EL21: - case REG_GXF_PABENTRY_EL21: - case REG_ASPSR_EL21: - case REG_ADSPSR_EL0: - case REG_PMCR1_GL2: - case REG_ASPSR_NV_EL21: - case REG_PMCR1_GL21: - case REG_VBAR_GL12: - case REG_SPSR_GL12: - case REG_ASPSR_GL12: - case REG_ESR_GL12: - case REG_ELR_GL12: - case REG_FAR_GL12: - case REG_SP_GL1: - case REG_TPIDR_GL1: - case REG_VBAR_GL21: - case REG_SPSR_GL21: - case REG_ASPSR_GL21: - case REG_ESR_GL21: - case REG_ELR_GL21: - case REG_FAR_GL21: - case REG_SP_GL2: - case REG_TPIDR_GL2: - case REG_VBAR_GL2: - case REG_SPSR_GL2: - case REG_ASPSR_GL2: - case REG_ESR_GL2: - case REG_ELR_GL2: - case REG_FAR_GL2: - case REG_GXF_ENTRY_EL2: - case REG_GXF_PABENTRY_EL2: - case REG_APCTL_EL2: - case REG_APSTS_EL2: - case REG_APSTS_NV1_EL1: - case REG_KERNKEYLO_NV_EL21: - case REG_KERNKEYHI_NV_EL21: - case REG_ASPSR_EL12: - case REG_APIAKEYLO_NV_EL21: - case REG_APIAKEYHI_NV_EL21: - case REG_APIBKEYLO_NV_EL21: - case REG_APIBKEYHI_NV_EL21: - case REG_APDAKEYLO_NV_EL21: - case REG_APDAKEYHI_NV_EL21: - case REG_APDBKEYLO_NV_EL21: - case REG_APDBKEYHI_NV_EL21: - case REG_APGAKEYLO_NV_EL21: - case REG_APGAKEYHI_NV_EL21: - case REG_SPRR_CONFIG_EL2: - case REG_SPRR_AMRANGE_EL2: - case REG_VMKEYLO_EL2: - case REG_VMKEYHI_EL2: - case REG_MMU_SFAR_EL2: - case REG_APSTS_EL12: - case REG_APCTL_EL12: - case REG_GXF_CONFIG_EL12: - case REG_GXF_ENTRY_EL12: - case REG_GXF_PABENTRY_EL12: - case REG_SPRR_CONFIG_EL12: - case REG_SPRR_AMRANGE_EL12: - case REG_MMU_SESR_CTL_EL2: - case REG_SPRR_PPERM_EL12: - case REG_CNTPS_TVAL_EL1: - case REG_CNTPS_CTL_EL1: - case REG_CNTPS_CVAL_EL1: - case REG_PSTATE_SPSEL: - case REG_PWRDNSAVE0: - case REG_NRG_ACC_CTL: - case REG_AON_CNT0: - case REG_CPU_CNT0: - case REG_UPMCR0_EL1: - case REG_UPMC8: - case REG_AON_CNT8: - case REG_PWRDNSAVE1: - case REG_CORE_NRG_ACC_DAT: - case REG_AON_CNT_CTL0: - case REG_CPU_CNT_CTL0: - case REG_UPMESR0_EL1: - case REG_UPMC9: - case REG_AON_CNT_CTL8: - case REG_ACC_PWR_DN_SAVE: - case REG_CPM_NRG_ACC_DAT: - case REG_AON_CNT1: - case REG_CPU_CNT1: - case REG_UPMSWCTRL_EL1: - case REG_UPMC10: - case REG_AON_CNT9: - case REG_CORE_SRM_NRG_ACC_DAT: - case REG_AON_CNT_CTL1: - case REG_CPU_CNT_CTL1: - case REG_UPMECM0_EL1: - case REG_UPMC11: - case REG_AON_CNT_CTL9: - case REG_AON_CNT_CTL: - case REG_CPM_SRM_NRG_ACC_DAT: - case REG_AON_CNT2: - case REG_CPU_CNT2: - case REG_UPMECM1_EL1: - case REG_UPMC12: - case REG_AON_CNT10: - case REG_CPU_CNT_CTL: - case REG_AON_CNT_CTL2: - case REG_CPU_CNT_CTL2: - case REG_UPMPCM_EL1: - case REG_UPMC13: - case REG_AON_CNT_CTL10: - case REG_AON_CNT3: - case REG_CPU_CNT3: - case REG_UPMSR_EL1: - case REG_UPMC14: - case REG_AON_CNT11: - case REG_AON_CNT_CTL3: - case REG_CPU_CNT_CTL3: - case REG_UPMC0: - case REG_UPMC15: - case REG_AON_CNT_CTL11: - case REG_AON_CNT4: - case REG_CPU_CNT4: - case REG_UPMC1: - case REG_UPMECM2_EL1: - case REG_AON_CNT_CTL4: - case REG_CPU_CNT_CTL4: - case REG_UPMC2: - case REG_UPMECM3_EL1: - case REG_AON_CNT5: - case REG_CPU_CNT5: - case REG_UPMC3: - case REG_UPMCR1_EL1: - case REG_AON_CNT_CTL5: - case REG_CPU_CNT_CTL5: - case REG_UPMC4: - case REG_UPMESR1_EL1: - case REG_AON_CNT6: - case REG_CPU_CNT6: - case REG_UPMC5: - case REG_AON_CNT_CTL6: - case REG_CPU_CNT_CTL6: - case REG_UPMC6: - case REG_AON_CNT7: - case REG_CPU_CNT7: - case REG_UPMC7: - case REG_AON_CNT_CTL7: - case REG_CPU_CNT_CTL7: + switch(sr) + { + case REG_EDSCR: + case REG_EDPRCR: + case REG_UAOIMM: + case REG_PANIMM: + case REG_SPSELIMM: + case REG_DITIMM: + case REG_SVCRIMM: + case REG_ICIALLUIS: + case REG_ICIALLU: + case REG_DCIVAC: + case REG_DCISW: + case REG_ATS1E1R: + case REG_ATS1E1W: + case REG_ATS1E0R: + case REG_ATS1E0W: + case REG_DCCSW: + case REG_DCCISW: + case REG_TLBIVMALLE1IS: + case REG_TLBIVAE1IS: + case REG_TLBIASIDE1IS: + case REG_TLBIVAAE1IS: + case REG_TLBIVALE1IS: + case REG_TLBIVAALE1IS: + case REG_TLBIVMALLE1: + case REG_TLBIVAE1: + case REG_TLBIASIDE1: + case REG_TLBIVAAE1: + case REG_TLBIVALE1: + case REG_TLBIVAALE1: + case REG_DCZVA: + case REG_ICIVAU: + case REG_DCCVAC: + case REG_DCCVAU: + case REG_DCCIVAC: + case REG_ATS1E2R: + case REG_ATS1E2W: + case REG_ATS12E1R: + case REG_ATS12E1W: + case REG_ATS12E0R: + case REG_ATS12E0W: + case REG_TLBIIPAS2E1IS: + case REG_TLBIIPAS2LE1IS: + case REG_TLBIALLE2IS: + case REG_TLBIVAE2IS: + case REG_TLBIALLE1IS: + case REG_TLBIVALE2IS: + case REG_TLBIVMALLS12E1IS: + case REG_TLBIIPAS2E1: + case REG_TLBIIPAS2LE1: + case REG_TLBIALLE2: + case REG_TLBIVAE2: + case REG_TLBIALLE1: + case REG_TLBIVALE2: + case REG_TLBIVMALLS12E1: + case REG_ATS1E3R: + case REG_ATS1E3W: + case REG_TLBIALLE3IS: + case REG_TLBIVAE3IS: + case REG_TLBIVALE3IS: + case REG_TLBIALLE3: + case REG_TLBIVAE3: + case REG_TLBIVALE3: + case REG_OSDTRRX_EL1: + case REG_DBGBVR0_EL1: + case REG_DBGBCR0_EL1: + case REG_DBGWVR0_EL1: + case REG_DBGWCR0_EL1: + case REG_DBGBVR1_EL1: + case REG_DBGBCR1_EL1: + case REG_DBGWVR1_EL1: + case REG_DBGWCR1_EL1: + case REG_MDCCINT_EL1: + case REG_MDSCR_EL1: + case REG_DBGBVR2_EL1: + case REG_DBGBCR2_EL1: + case REG_DBGWVR2_EL1: + case REG_DBGWCR2_EL1: + case REG_OSDTRTX_EL1: + case REG_DBGBVR3_EL1: + case REG_DBGBCR3_EL1: + case REG_DBGWVR3_EL1: + case REG_DBGWCR3_EL1: + case REG_DBGBVR4_EL1: + case REG_DBGBCR4_EL1: + case REG_DBGWVR4_EL1: + case REG_DBGWCR4_EL1: + case REG_DBGBVR5_EL1: + case REG_DBGBCR5_EL1: + case REG_DBGWVR5_EL1: + case REG_DBGWCR5_EL1: + case REG_DBGWFAR: + case REG_OSECCR_EL1: + case REG_DBGBVR6_EL1: + case REG_DBGBCR6_EL1: + case REG_DBGWVR6_EL1: + case REG_DBGWCR6_EL1: + case REG_DBGBVR7_EL1: + case REG_DBGBCR7_EL1: + case REG_DBGWVR7_EL1: + case REG_DBGWCR7_EL1: + case REG_DBGBVR8_EL1: + case REG_DBGBCR8_EL1: + case REG_DBGWVR8_EL1: + case REG_DBGWCR8_EL1: + case REG_DBGBVR9_EL1: + case REG_DBGBCR9_EL1: + case REG_DBGWVR9_EL1: + case REG_DBGWCR9_EL1: + case REG_DBGBVR10_EL1: + case REG_DBGBCR10_EL1: + case REG_DBGWVR10_EL1: + case REG_DBGWCR10_EL1: + case REG_DBGBVR11_EL1: + case REG_DBGBCR11_EL1: + case REG_DBGWVR11_EL1: + case REG_DBGWCR11_EL1: + case REG_DBGBVR12_EL1: + case REG_DBGBCR12_EL1: + case REG_DBGWVR12_EL1: + case REG_DBGWCR12_EL1: + case REG_DBGBVR13_EL1: + case REG_DBGBCR13_EL1: + case REG_DBGWVR13_EL1: + case REG_DBGWCR13_EL1: + case REG_DBGBVR14_EL1: + case REG_DBGBCR14_EL1: + case REG_DBGWVR14_EL1: + case REG_DBGWCR14_EL1: + case REG_DBGBVR15_EL1: + case REG_DBGBCR15_EL1: + case REG_DBGWVR15_EL1: + case REG_DBGWCR15_EL1: + case REG_MDRAR_EL1: + case REG_OSLAR_EL1: + case REG_OSLSR_EL1: + case REG_OSDLR_EL1: + case REG_DBGPRCR_EL1: + case REG_DBGCLAIMSET_EL1: + case REG_DBGCLAIMCLR_EL1: + case REG_DBGAUTHSTAT_EL1: + case REG_TRCTRACEIDR: + case REG_TRCVICTLR: + case REG_TRCSEQEVR0: + case REG_TRCCNTRLDVR0: + case REG_TRCIMSPEC0: + case REG_TRCPRGCTLR: + case REG_TRCQCTLR: + case REG_TRCVIIECTLR: + case REG_TRCSEQEVR1: + case REG_TRCCNTRLDVR1: + case REG_TRCIMSPEC1: + case REG_TRCPROCSELR: + case REG_TRCVISSCTLR: + case REG_TRCSEQEVR2: + case REG_TRCCNTRLDVR2: + case REG_TRCIMSPEC2: + case REG_TRCVIPCSSCTLR: + case REG_TRCCNTRLDVR3: + case REG_TRCIMSPEC3: + case REG_TRCCONFIGR: + case REG_TRCCNTCTLR0: + case REG_TRCIMSPEC4: + case REG_TRCCNTCTLR1: + case REG_TRCIMSPEC5: + case REG_TRCAUXCTLR: + case REG_TRCSEQRSTEVR: + case REG_TRCCNTCTLR2: + case REG_TRCIMSPEC6: + case REG_TRCSEQSTR: + case REG_TRCCNTCTLR3: + case REG_TRCIMSPEC7: + case REG_TRCEVENTCTL0R: + case REG_TRCVDCTLR: + case REG_TRCEXTINSELR: + case REG_TRCCNTVR0: + case REG_TRCEVENTCTL1R: + case REG_TRCVDSACCTLR: + case REG_TRCEXTINSELR1: + case REG_TRCCNTVR1: + case REG_TRCRSR: + case REG_TRCVDARCCTLR: + case REG_TRCEXTINSELR2: + case REG_TRCCNTVR2: + case REG_TRCSTALLCTLR: + case REG_TRCEXTINSELR3: + case REG_TRCCNTVR3: + case REG_TRCTSCTLR: + case REG_TRCSYNCPR: + case REG_TRCCCCTLR: + case REG_TRCBBCTLR: + case REG_TRCRSCTLR16: + case REG_TRCSSCCR0: + case REG_TRCSSPCICR0: + case REG_TRCOSLAR: + case REG_TRCRSCTLR17: + case REG_TRCSSCCR1: + case REG_TRCSSPCICR1: + case REG_TRCRSCTLR2: + case REG_TRCRSCTLR18: + case REG_TRCSSCCR2: + case REG_TRCSSPCICR2: + case REG_TRCRSCTLR3: + case REG_TRCRSCTLR19: + case REG_TRCSSCCR3: + case REG_TRCSSPCICR3: + case REG_TRCRSCTLR4: + case REG_TRCRSCTLR20: + case REG_TRCSSCCR4: + case REG_TRCSSPCICR4: + case REG_TRCPDCR: + case REG_TRCRSCTLR5: + case REG_TRCRSCTLR21: + case REG_TRCSSCCR5: + case REG_TRCSSPCICR5: + case REG_TRCRSCTLR6: + case REG_TRCRSCTLR22: + case REG_TRCSSCCR6: + case REG_TRCSSPCICR6: + case REG_TRCRSCTLR7: + case REG_TRCRSCTLR23: + case REG_TRCSSCCR7: + case REG_TRCSSPCICR7: + case REG_TRCRSCTLR8: + case REG_TRCRSCTLR24: + case REG_TRCSSCSR0: + case REG_TRCRSCTLR9: + case REG_TRCRSCTLR25: + case REG_TRCSSCSR1: + case REG_TRCRSCTLR10: + case REG_TRCRSCTLR26: + case REG_TRCSSCSR2: + case REG_TRCRSCTLR11: + case REG_TRCRSCTLR27: + case REG_TRCSSCSR3: + case REG_TRCRSCTLR12: + case REG_TRCRSCTLR28: + case REG_TRCSSCSR4: + case REG_TRCRSCTLR13: + case REG_TRCRSCTLR29: + case REG_TRCSSCSR5: + case REG_TRCRSCTLR14: + case REG_TRCRSCTLR30: + case REG_TRCSSCSR6: + case REG_TRCRSCTLR15: + case REG_TRCRSCTLR31: + case REG_TRCSSCSR7: + case REG_TRCACVR0: + case REG_TRCACVR8: + case REG_TRCACATR0: + case REG_TRCACATR8: + case REG_TRCDVCVR0: + case REG_TRCDVCVR4: + case REG_TRCDVCMR0: + case REG_TRCDVCMR4: + case REG_TRCACVR1: + case REG_TRCACVR9: + case REG_TRCACATR1: + case REG_TRCACATR9: + case REG_TRCACVR2: + case REG_TRCACVR10: + case REG_TRCACATR2: + case REG_TRCACATR10: + case REG_TRCDVCVR1: + case REG_TRCDVCVR5: + case REG_TRCDVCMR1: + case REG_TRCDVCMR5: + case REG_TRCACVR3: + case REG_TRCACVR11: + case REG_TRCACATR3: + case REG_TRCACATR11: + case REG_TRCACVR4: + case REG_TRCACVR12: + case REG_TRCACATR4: + case REG_TRCACATR12: + case REG_TRCDVCVR2: + case REG_TRCDVCVR6: + case REG_TRCDVCMR2: + case REG_TRCDVCMR6: + case REG_TRCACVR5: + case REG_TRCACVR13: + case REG_TRCACATR5: + case REG_TRCACATR13: + case REG_TRCACVR6: + case REG_TRCACVR14: + case REG_TRCACATR6: + case REG_TRCACATR14: + case REG_TRCDVCVR3: + case REG_TRCDVCVR7: + case REG_TRCDVCMR3: + case REG_TRCDVCMR7: + case REG_TRCACVR7: + case REG_TRCACVR15: + case REG_TRCACATR7: + case REG_TRCACATR15: + case REG_TRCCIDCVR0: + case REG_TRCVMIDCVR0: + case REG_TRCCIDCCTLR0: + case REG_TRCCIDCCTLR1: + case REG_TRCCIDCVR1: + case REG_TRCVMIDCVR1: + case REG_TRCVMIDCCTLR0: + case REG_TRCVMIDCCTLR1: + case REG_TRCCIDCVR2: + case REG_TRCVMIDCVR2: + case REG_TRCCIDCVR3: + case REG_TRCVMIDCVR3: + case REG_TRCCIDCVR4: + case REG_TRCVMIDCVR4: + case REG_TRCCIDCVR5: + case REG_TRCVMIDCVR5: + case REG_TRCCIDCVR6: + case REG_TRCVMIDCVR6: + case REG_TRCCIDCVR7: + case REG_TRCVMIDCVR7: + case REG_TRCITCTRL: + case REG_TRCCLAIMSET: + case REG_TRCCLAIMCLR: + case REG_TRCLAR: + case REG_TEECR32_EL1: + case REG_TEEHBR32_EL1: + case REG_MDCCSR_EL0: + case REG_DBGDTR_EL0: + case REG_DBGDTRRX_EL0: + case REG_DBGVCR32_EL2: + case REG_MIDR_EL1: + case REG_MPIDR_EL1: + case REG_REVIDR_EL1: + case REG_ID_PFR0_EL1: + case REG_ID_PFR1_EL1: + case REG_ID_DFR0_EL1: + case REG_ID_AFR0_EL1: + case REG_ID_MMFR0_EL1: + case REG_ID_MMFR1_EL1: + case REG_ID_MMFR2_EL1: + case REG_ID_MMFR3_EL1: + case REG_ID_ISAR0_EL1: + case REG_ID_ISAR1_EL1: + case REG_ID_ISAR2_EL1: + case REG_ID_ISAR3_EL1: + case REG_ID_ISAR4_EL1: + case REG_ID_ISAR5_EL1: + case REG_ID_MMFR4_EL1: + case REG_ID_ISAR6_EL1: + case REG_MVFR0_EL1: + case REG_MVFR1_EL1: + case REG_MVFR2_EL1: + case REG_ID_AA32RES3_EL1: + case REG_ID_PFR2_EL1: + case REG_ID_AA32RES5_EL1: + case REG_ID_AA32RES6_EL1: + case REG_ID_AA32RES7_EL1: + case REG_ID_AA64PFR0_EL1: + case REG_ID_AA64PFR1_EL1: + case REG_ID_AA64PFR2_EL1: + case REG_ID_AA64PFR3_EL1: + case REG_ID_AA64ZFR0_EL1: + case REG_ID_AA64SMFR0_EL1: + case REG_ID_AA64ZFR2_EL1: + case REG_ID_AA64ZFR3_EL1: + case REG_ID_AA64DFR0_EL1: + case REG_ID_AA64DFR1_EL1: + case REG_ID_AA64DFR2_EL1: + case REG_ID_AA64DFR3_EL1: + case REG_ID_AA64AFR0_EL1: + case REG_ID_AA64AFR1_EL1: + case REG_ID_AA64AFR2_EL1: + case REG_ID_AA64AFR3_EL1: + case REG_ID_AA64ISAR0_EL1: + case REG_ID_AA64ISAR1_EL1: + case REG_ID_AA64ISAR2_EL1: + case REG_ID_AA64ISAR3_EL1: + case REG_ID_AA64ISAR4_EL1: + case REG_ID_AA64ISAR5_EL1: + case REG_ID_AA64ISAR6_EL1: + case REG_ID_AA64ISAR7_EL1: + case REG_ID_AA64MMFR0_EL1: + case REG_ID_AA64MMFR1_EL1: + case REG_ID_AA64MMFR2_EL1: + case REG_ID_AA64MMFR3_EL1: + case REG_ID_AA64MMFR4_EL1: + case REG_ID_AA64MMFR5_EL1: + case REG_ID_AA64MMFR6_EL1: + case REG_ID_AA64MMFR7_EL1: + case REG_SCTLR_EL1: + case REG_ACTLR_EL1: + case REG_CPACR_EL1: + case REG_RGSR_EL1: + case REG_GCR_EL1: + case REG_TRFCR_EL1: + case REG_SMPRI_EL1: + case REG_SMCR_EL1: + case REG_TTBR0_EL1: + case REG_TTBR1_EL1: + case REG_TCR_EL1: + case REG_APIAKEYLO_EL1: + case REG_APIAKEYHI_EL1: + case REG_APIBKEYLO_EL1: + case REG_APIBKEYHI_EL1: + case REG_APDAKEYLO_EL1: + case REG_APDAKEYHI_EL1: + case REG_APDBKEYLO_EL1: + case REG_APDBKEYHI_EL1: + case REG_APGAKEYLO_EL1: + case REG_APGAKEYHI_EL1: + case REG_SPSR_EL1: + case REG_ELR_EL1: + case REG_SP_EL0: + case REG_SPSEL: + case REG_CURRENTEL: + case REG_PAN: + case REG_UAO: + case REG_ICV_PMR_EL1: + case REG_AFSR0_EL1: + case REG_AFSR1_EL1: + case REG_ESR_EL1: + case REG_ERRIDR_EL1: + case REG_ERRSELR_EL1: + case REG_ERXCTLR_EL1: + case REG_ERXSTATUS_EL1: + case REG_ERXADDR_EL1: + case REG_ERXPFGCTL_EL1: + case REG_ERXPFGCDN_EL1: + case REG_ERXMISC0_EL1: + case REG_ERXMISC1_EL1: + case REG_ERXMISC2_EL1: + case REG_ERXMISC3_EL1: + case REG_ERXTS_EL1: + case REG_TFSR_EL1: + case REG_TFSRE0_EL1: + case REG_FAR_EL1: + case REG_PAR_EL1: + case REG_PMSCR_EL1: + case REG_PMSICR_EL1: + case REG_PMSIRR_EL1: + case REG_PMSFCR_EL1: + case REG_PMSEVFR_EL1: + case REG_PMSLATFR_EL1: + case REG_PMSIDR_EL1: + case REG_PMBLIMITR_EL1: + case REG_PMBPTR_EL1: + case REG_PMBSR_EL1: + case REG_PMBIDR_EL1: + case REG_TRBLIMITR_EL1: + case REG_TRBPTR_EL1: + case REG_TRBBASER_EL1: + case REG_TRBSR_EL1: + case REG_TRBMAR_EL1: + case REG_TRBTRG_EL1: + case REG_PMINTENSET_EL1: + case REG_PMINTENCLR_EL1: + case REG_PMMIR_EL1: + case REG_MAIR_EL1: + case REG_AMAIR_EL1: + case REG_LORSA_EL1: + case REG_LOREA_EL1: + case REG_LORN_EL1: + case REG_LORC_EL1: + case REG_LORID_EL1: + case REG_MPAM1_EL1: + case REG_MPAM0_EL1: + case REG_CTRR_C_LWR_EL1: + case REG_CTRR_C_UPR_EL1: + case REG_CTRR_D_LWR_EL1: + case REG_CTRR_D_UPR_EL1: + case REG_CTRR_C_LWR_EL12: + case REG_CTRR_C_UPR_EL12: + case REG_CTRR_D_LWR_EL12: + case REG_CTRR_D_UPR_EL12: + case REG_CTRR_C_LWR_EL2: + case REG_CTRR_C_UPR_EL2: + case REG_CTRR_D_LWR_EL2: + case REG_CTRR_D_UPR_EL2: + case REG_CTRR_C_CTL_EL1: + case REG_CTRR_D_CTL_EL1: + case REG_CTRR_C_CTL_EL12: + case REG_CTRR_D_CTL_EL12: + case REG_CTRR_C_CTL_EL2: + case REG_CTRR_D_CTL_EL2: + case REG_CTXR_A_LWR_EL1: + case REG_CTXR_A_UPR_EL1: + case REG_CTXR_B_LWR_EL1: + case REG_CTXR_B_UPR_EL1: + case REG_CTXR_C_LWR_EL1: + case REG_CTXR_C_UPR_EL1: + case REG_CTXR_D_LWR_EL1: + case REG_CTXR_D_UPR_EL1: + case REG_CTXR_A_LWR_EL12: + case REG_CTXR_A_UPR_EL12: + case REG_CTXR_B_LWR_EL12: + case REG_CTXR_B_UPR_EL12: + case REG_CTXR_C_LWR_EL12: + case REG_CTXR_C_UPR_EL12: + case REG_CTXR_D_LWR_EL12: + case REG_CTXR_D_UPR_EL12: + case REG_CTXR_A_LWR_EL2: + case REG_CTXR_A_UPR_EL2: + case REG_CTXR_B_LWR_EL2: + case REG_CTXR_B_UPR_EL2: + case REG_CTXR_C_LWR_EL2: + case REG_CTXR_C_UPR_EL2: + case REG_CTXR_D_LWR_EL2: + case REG_CTXR_D_UPR_EL2: + case REG_CTXR_A_CTL_EL1: + case REG_CTXR_B_CTL_EL1: + case REG_CTXR_C_CTL_EL1: + case REG_CTXR_D_CTL_EL1: + case REG_CTXR_A_CTL_EL12: + case REG_CTXR_B_CTL_EL12: + case REG_CTXR_C_CTL_EL12: + case REG_CTXR_D_CTL_EL12: + case REG_CTXR_A_CTL_EL2: + case REG_CTXR_B_CTL_EL2: + case REG_CTXR_C_CTL_EL2: + case REG_CTXR_D_CTL_EL2: + case REG_ACC_CTRR_C_LWR_EL2: + case REG_ACC_CTRR_C_UPR_EL2: + case REG_ACC_CTRR_D_LWR_EL2: + case REG_ACC_CTRR_D_UPR_EL2: + case REG_ACC_CTXR_A_LWR_EL2: + case REG_ACC_CTXR_A_UPR_EL2: + case REG_ACC_CTXR_B_LWR_EL2: + case REG_ACC_CTXR_B_UPR_EL2: + case REG_ACC_CTXR_C_LWR_EL2: + case REG_ACC_CTXR_C_UPR_EL2: + case REG_ACC_CTXR_D_LWR_EL2: + case REG_ACC_CTXR_D_UPR_EL2: + case REG_ACC_CTRR_C_CTL_EL2: + case REG_ACC_CTRR_D_CTL_EL2: + case REG_ACC_CTXR_A_CTL_EL2: + case REG_ACC_CTXR_B_CTL_EL2: + case REG_ACC_CTXR_C_CTL_EL2: + case REG_ACC_CTXR_D_CTL_EL2: + case REG_VBAR_EL1: + case REG_RVBAR_EL1: + case REG_RMR_EL1: + case REG_ISR_EL1: + case REG_DISR_EL1: + case REG_ICV_IAR0_EL1: + case REG_ICV_EOIR0_EL1: + case REG_ICV_HPPIR0_EL1: + case REG_ICV_BPR0_EL1: + case REG_ICC_AP0R0_EL1: + case REG_ICC_AP0R1_EL1: + case REG_ICC_AP0R2_EL1: + case REG_ICC_AP0R3_EL1: + case REG_ICC_AP1R0_EL1: + case REG_ICC_AP1R1_EL1: + case REG_ICC_AP1R2_EL1: + case REG_ICC_AP1R3_EL1: + case REG_ICV_DIR_EL1: + case REG_ICV_RPR_EL1: + case REG_ICC_SGI1R_EL1: + case REG_ICC_ASGI1R_EL1: + case REG_ICC_SGI0R_EL1: + case REG_ICV_IAR1_EL1: + case REG_ICV_EOIR1_EL1: + case REG_ICV_HPPIR1_EL1: + case REG_ICV_BPR1CBPR_EL1: + case REG_ICV_CTLR_EL1: + case REG_ICC_SRE_EL1: + case REG_ICV_IGRPEN0_EL1: + case REG_ICV_IGRPEN1_EL1: + case REG_ICC_SEIEN_EL1: + case REG_CONTEXTIDR_EL1: + case REG_TPIDR_EL1: + case REG_SCXTNUM_EL1: + case REG_CNTHCTL_EL21: + case REG_HID0: + case REG_HID25: + case REG_HID26: + case REG_HID27: + case REG_HID28: + case REG_HID29: + case REG_HID34: + case REG_HID1: + case REG_HID21: + case REG_BIUVCSCUPCMDCRD: + case REG_BIUVCSCUPDATCRD: + case REG_HID2: + case REG_HID30: + case REG_HID31: + case REG_HID32: + case REG_HID33: + case REG_HID3: + case REG_BIUVCSCUPCMDCRDC2: + case REG_BIUVCSCUPDATCRDC2: + case REG_HID4: + case REG_HID5: + case REG_HID6: + case REG_HID7: + case REG_HID8: + case REG_HID9: + case REG_HID10: + case REG_BLOCK_CMAINT_CFG: + case REG_HID11: + case REG_HID18: + case REG_HID36: + case REG_HID37: + case REG_HID12: + case REG_HID15: + case REG_HID19: + case REG_BIU_TLIMIT: + case REG_HID13: + case REG_HID_RCTX_G0CTL: + case REG_HID_RCTX_G1CTL: + case REG_HID14: + case REG_HID16: + case REG_LLC_WRR2: + case REG_BIU_AFI_CFG: + case REG_HID17: + case REG_HID24: + case REG_HID35: + case REG_CCSIDR_EL1: + case REG_CLIDR_EL1: + case REG_SMIDR_EL1: + case REG_AIDR_EL1: + case REG_PMCR0_EL1: + case REG_APPL_CONTEXTPTR: + case REG_LD_LATPROF_CTL_EL1: + case REG_AON_CPU_MSTALL_CTL01_EL1: + case REG_PM_MEMFLT_CTL23_EL1: + case REG_AGTCNTHV_CTL_EL21: + case REG_AGTCNTVCTSS_NOREDIR_EL0: + case REG_PMCR1_EL1: + case REG_LD_LATPROF_CTR_EL1: + case REG_AON_CPU_MSTALL_CTL23_EL1: + case REG_PM_MEMFLT_CTL45_EL1: + case REG_AGTCNTRDIR_EL1: + case REG_AGTCNTHCTL_NOREDIR_EL21: + case REG_PMCR2_EL1: + case REG_LD_LATPROF_STS_EL1: + case REG_AON_CPU_MSTALL_CTL45_EL1: + case REG_AGTCNTHP_CVAL_EL2: + case REG_CNTVCT_NOREDIR_EL0: + case REG_AGTCNTHP_CVAL_NOREDIR_EL21: + case REG_PMCR3_EL1: + case REG_LD_LATPROF_INF_EL1: + case REG_AON_CPU_MSTALL_CTL67_EL1: + case REG_AGTCNTHP_TVAL_EL2: + case REG_CNTPCTSS_NOREDIR_EL0: + case REG_AGTCNTHP_TVAL_NOREDIR_EL21: + case REG_PMCR4_EL1: + case REG_LD_LATPROF_CTL_EL2: + case REG_AON_CPU_MEMFLT_CTL01_EL1: + case REG_AGTCNTHP_CTL_EL2: + case REG_CNTVCTSS_NOREDIR_EL0: + case REG_AGTCNTHP_CTL_NOREDIR_EL21: + case REG_PMESR0_EL1: + case REG_LD_LATPROF_CMD_EL1: + case REG_AON_CPU_MEMFLT_CTL23_EL1: + case REG_AGTCNTHV_CVAL_EL2: + case REG_AGTCNTHV_CVAL_NOREDIR_EL21: + case REG_PMESR1_EL1: + case REG_PMCR1_EL2: + case REG_AON_CPU_MEMFLT_CTL45_EL1: + case REG_AGTCNTHV_TVAL_EL2: + case REG_CNTHCTL_NOREDIR_EL21: + case REG_AGTCNTHV_TVAL_NOREDIR_EL21: + case REG_OPMAT0_EL1: + case REG_PMCR1_EL12: + case REG_AON_CPU_MEMFLT_CTL67_EL1: + case REG_AGTCNTHV_CTL_EL2: + case REG_CNTHP_CVAL_NOREDIR_EL21: + case REG_AGTCNTHV_CTL_NOREDIR_EL21: + case REG_OPMAT1_EL1: + case REG_PMCR1_GL12: + case REG_AON_CPU_MSTALL_CTR0_EL1: + case REG_AGTCNTFRQ_EL0: + case REG_CNTHP_TVAL_NOREDIR_EL21: + case REG_CNTPCT_NOREDIR_EL0: + case REG_OPMSK0_EL1: + case REG_LD_LATPROF_CTL_EL12: + case REG_AON_CPU_MSTALL_CTR1_EL1: + case REG_AGTCNTVOFF_EL2: + case REG_CNTHP_CTL_NOREDIR_EL21: + case REG_CNTHV_CTL_NOREDIR_EL21: + case REG_OPMSK1_EL1: + case REG_LD_LATPROF_INF_EL2: + case REG_AON_CPU_MSTALL_CTR2_EL1: + case REG_AGTCNTHP_CVAL_EL21: + case REG_CNTHV_CVAL_NOREDIR_EL21: + case REG_AGTCNTPCT_NOREDIR_EL0: + case REG_AON_CPU_MSTALL_CTR3_EL1: + case REG_AGTCNTHP_TVAL_EL21: + case REG_CNTHV_TVAL_NOREDIR_EL21: + case REG_VMSA_HV_LOCK_EL2: + case REG_PMSWCTRL_EL1: + case REG_PMCR5_EL0: + case REG_AON_CPU_MSTALL_CTR4_EL1: + case REG_PMCOMPARE0_EL1: + case REG_PMCOMPARE1_EL1: + case REG_VMSA_NV_LOCK_EL2: + case REG_PMSR_EL1: + case REG_AON_CPU_MSTALL_CTR5_EL1: + case REG_AGTCNTHP_CTL_EL21: + case REG_PMCOMPARE5_EL1: + case REG_PMCOMPARE6_EL1: + case REG_PMCOMPARE7_EL1: + case REG_PMCR_BVRNG4_EL1: + case REG_PM_PMI_PC: + case REG_AON_CPU_MSTALL_CTR6_EL1: + case REG_AGTCNTHV_CVAL_EL21: + case REG_AGTCNTVCT_NOREDIR_EL0: + case REG_PMCR_BVRNG5_EL1: + case REG_AON_CPU_MSTALL_CTR7_EL1: + case REG_AGTCNTHV_TVAL_EL21: + case REG_AGTCNTPCTSS_NOREDIR_EL0: + case REG_CSSELR_EL1: + case REG_PMC0: + case REG_UPMCFILTER0: + case REG_UPMCFILTER1: + case REG_UPMCFILTER2: + case REG_UPMCFILTER3: + case REG_UPMCFILTER4: + case REG_UPMCFILTER5: + case REG_UPMCFILTER6: + case REG_PMC1: + case REG_UPMCFILTER7: + case REG_PMC2: + case REG_PMC3: + case REG_PMC4: + case REG_PMC5: + case REG_PMC6: + case REG_PMC7: + case REG_PMC8: + case REG_PMC9: + case REG_PMTRHLD6_EL1: + case REG_PMTRHLD4_EL1: + case REG_PMTRHLD2_EL1: + case REG_PMMMAP_EL1: + case REG_CTR_EL0: + case REG_DCZID_EL0: + case REG_NZCV: + case REG_DAIF: + case REG_SVCR: + case REG_DIT: + case REG_SSBS: + case REG_TCO: + case REG_FPCR: + case REG_FPSR: + case REG_DSPSR: + case REG_DLR: + case REG_PMCR_EL0: + case REG_PMCNTENSET_EL0: + case REG_PMCNTENCLR_EL0: + case REG_PMOVSCLR_EL0: + case REG_PMSWINC_EL0: + case REG_PMSELR_EL0: + case REG_PMCCNTR_EL0: + case REG_PMXEVTYPER_EL0: + case REG_PMXEVCNTR_EL0: + case REG_DAIFCLR: + case REG_PMUSERENR_EL0: + case REG_PMOVSSET_EL0: + case REG_TPIDR_EL0: + case REG_TPIDRRO_EL0: + case REG_TPIDR2_EL0: + case REG_SCXTNUM_EL0: + case REG_AMCR_EL0: + case REG_AMUSERENR_EL0: + case REG_AMCNTENCLR0_EL0: + case REG_AMCNTENSET0_EL0: + case REG_AMCNTENCLR1_EL0: + case REG_AMCNTENSET1_EL0: + case REG_AMEVCNTR00_EL0: + case REG_AMEVCNTR01_EL0: + case REG_AMEVCNTR02_EL0: + case REG_AMEVCNTR03_EL0: + case REG_AMEVCNTR10_EL0: + case REG_AMEVCNTR11_EL0: + case REG_AMEVCNTR12_EL0: + case REG_AMEVCNTR13_EL0: + case REG_AMEVCNTR14_EL0: + case REG_AMEVCNTR15_EL0: + case REG_AMEVCNTR16_EL0: + case REG_AMEVCNTR17_EL0: + case REG_AMEVCNTR18_EL0: + case REG_AMEVCNTR19_EL0: + case REG_AMEVCNTR110_EL0: + case REG_AMEVCNTR111_EL0: + case REG_AMEVCNTR112_EL0: + case REG_AMEVCNTR113_EL0: + case REG_AMEVCNTR114_EL0: + case REG_AMEVCNTR115_EL0: + case REG_AMEVTYPER10_EL0: + case REG_AMEVTYPER11_EL0: + case REG_AMEVTYPER12_EL0: + case REG_AMEVTYPER13_EL0: + case REG_AMEVTYPER14_EL0: + case REG_AMEVTYPER15_EL0: + case REG_AMEVTYPER16_EL0: + case REG_AMEVTYPER17_EL0: + case REG_AMEVTYPER18_EL0: + case REG_AMEVTYPER19_EL0: + case REG_AMEVTYPER110_EL0: + case REG_AMEVTYPER111_EL0: + case REG_AMEVTYPER112_EL0: + case REG_AMEVTYPER113_EL0: + case REG_AMEVTYPER114_EL0: + case REG_AMEVTYPER115_EL0: + case REG_CNTFRQ_EL0: + case REG_CNTPCT_EL0: + case REG_CNTVCT_EL0: + case REG_CNTPCTSS_EL0: + case REG_CNTVCTSS_EL0: + case REG_CNTHP_TVAL_EL21: + case REG_CNTHP_CTL_EL21: + case REG_CNTHP_CVAL_EL21: + case REG_CNTHV_TVAL_EL21: + case REG_CNTHV_CTL_EL21: + case REG_CNTHV_CVAL_EL21: + case REG_PMEVCNTR0_EL0: + case REG_PMEVCNTR1_EL0: + case REG_PMEVCNTR2_EL0: + case REG_PMEVCNTR3_EL0: + case REG_PMEVCNTR4_EL0: + case REG_PMEVCNTR5_EL0: + case REG_PMEVCNTR6_EL0: + case REG_PMEVCNTR7_EL0: + case REG_PMEVCNTR8_EL0: + case REG_PMEVCNTR9_EL0: + case REG_PMEVCNTR10_EL0: + case REG_PMEVCNTR11_EL0: + case REG_PMEVCNTR12_EL0: + case REG_PMEVCNTR13_EL0: + case REG_PMEVCNTR14_EL0: + case REG_PMEVCNTR15_EL0: + case REG_PMEVCNTR16_EL0: + case REG_PMEVCNTR17_EL0: + case REG_PMEVCNTR18_EL0: + case REG_PMEVCNTR19_EL0: + case REG_PMEVCNTR20_EL0: + case REG_PMEVCNTR21_EL0: + case REG_PMEVCNTR22_EL0: + case REG_PMEVCNTR23_EL0: + case REG_PMEVCNTR24_EL0: + case REG_PMEVCNTR25_EL0: + case REG_PMEVCNTR26_EL0: + case REG_PMEVCNTR27_EL0: + case REG_PMEVCNTR28_EL0: + case REG_PMEVCNTR29_EL0: + case REG_PMEVCNTR30_EL0: + case REG_PMEVTYPER0_EL0: + case REG_PMEVTYPER1_EL0: + case REG_PMEVTYPER2_EL0: + case REG_PMEVTYPER3_EL0: + case REG_PMEVTYPER4_EL0: + case REG_PMEVTYPER5_EL0: + case REG_PMEVTYPER6_EL0: + case REG_PMEVTYPER7_EL0: + case REG_PMEVTYPER8_EL0: + case REG_PMEVTYPER9_EL0: + case REG_PMEVTYPER10_EL0: + case REG_PMEVTYPER11_EL0: + case REG_PMEVTYPER12_EL0: + case REG_PMEVTYPER13_EL0: + case REG_PMEVTYPER14_EL0: + case REG_PMEVTYPER15_EL0: + case REG_PMEVTYPER16_EL0: + case REG_PMEVTYPER17_EL0: + case REG_PMEVTYPER18_EL0: + case REG_PMEVTYPER19_EL0: + case REG_PMEVTYPER20_EL0: + case REG_PMEVTYPER21_EL0: + case REG_PMEVTYPER22_EL0: + case REG_PMEVTYPER23_EL0: + case REG_PMEVTYPER24_EL0: + case REG_PMEVTYPER25_EL0: + case REG_PMEVTYPER26_EL0: + case REG_PMEVTYPER27_EL0: + case REG_PMEVTYPER28_EL0: + case REG_PMEVTYPER29_EL0: + case REG_PMEVTYPER30_EL0: + case REG_PMCCFILTR_EL0: + case REG_LSU_ERR_STS: + case REG_AFLATCTL1_EL1: + case REG_AFLATVALBIN0_EL1: + case REG_AFLATINFLO_EL1: + case REG_LSU_ERR_CTL: + case REG_AFLATCTL2_EL1: + case REG_AFLATVALBIN1_EL1: + case REG_AFLATINFHI_EL1: + case REG_AFLATCTL3_EL1: + case REG_AFLATVALBIN2_EL1: + case REG_AFLATCTL4_EL1: + case REG_AFLATVALBIN3_EL1: + case REG_LLC_FILL_CTL: + case REG_AFLATCTL5_LO_EL1: + case REG_AFLATVALBIN4_EL1: + case REG_AFLATCTL5_HI_EL1: + case REG_LLC_FILL_DAT: + case REG_AFLATVALBIN5_EL1: + case REG_AFLATVALBIN6_EL1: + case REG_LLC_RAM_CONFIG: + case REG_AFLATVALBIN7_EL1: + case REG_LLC_ERR_STS: + case REG_CMAINT_BCAST_LIST_0: + case REG_CMAINT_BCAST_LIST_1: + case REG_CMAINT_BCAST_CTL: + case REG_LLC_ERR_ADR: + case REG_LLC_ERR_CTL: + case REG_LLC_ERR_INJ: + case REG_LLC_ERR_INF: + case REG_USERTAGSEL_EL1: + case REG_UUSERTAG_EL0: + case REG_KUSERTAG_EL1: + case REG_HUSERTAG_EL2: + case REG_LLC_TRACE_CTL0: + case REG_LLC_TRACE_CTL1: + case REG_LLC_UP_REQ_VC: + case REG_LLC_UP_REQ_VC_THRESH: + case REG_LLC_UP_REQ_VC_2: + case REG_LLC_UP_REQ_VC_THRESH_2: + case REG_LLC_DRAM_HASH0: + case REG_LLC_DRAM_HASH1: + case REG_LLC_DRAM_HASH2: + case REG_LLC_DRAM_HASH3: + case REG_LLC_TRACE_CTL2: + case REG_LLC_DRAM_HASH4: + case REG_LLC_UP_REQ_VC_3: + case REG_LLC_UP_REQ_VC_THRESH_3: + case REG_LLC_UP_REQ_VC_4: + case REG_LLC_UP_REQ_VC_THRESH_4: + case REG_LLC_HASH0: + case REG_LLC_HASH1: + case REG_LLC_HASH2: + case REG_LLC_HASH3: + case REG_LLC_WRR: + case REG_LLC_DRAM_HASH5: + case REG_LLC_DRAM_HASH6: + case REG_VPIDR_EL2: + case REG_VMPIDR_EL2: + case REG_SCTLR_EL2: + case REG_ACTLR_EL2: + case REG_HCR_EL2: + case REG_MDCR_EL2: + case REG_CPTR_EL2: + case REG_HSTR_EL2: + case REG_HFGRTR_EL2: + case REG_HFGWTR_EL2: + case REG_HFGITR_EL2: + case REG_HACR_EL2: + case REG_TRFCR_EL2: + case REG_HCRX_EL2: + case REG_SMPRIMAP_EL2: + case REG_SMCR_EL2: + case REG_SDER32_EL2: + case REG_TTBR0_EL2: + case REG_TTBR1_EL2: + case REG_TCR_EL2: + case REG_VTTBR_EL2: + case REG_VTCR_EL2: + case REG_VNCR_EL2: + case REG_VSTTBR_EL2: + case REG_VSTCR_EL2: + case REG_DACR32_EL2: + case REG_HDFGRTR_EL2: + case REG_HDFGWTR_EL2: + case REG_SPSR_EL2: + case REG_ELR_EL2: + case REG_SP_EL1: + case REG_SPSR_IRQ: + case REG_SPSR_ABT: + case REG_SPSR_UND: + case REG_SPSR_FIQ: + case REG_IFSR32_EL2: + case REG_AFSR0_EL2: + case REG_AFSR1_EL2: + case REG_ESR_EL2: + case REG_VSESR_EL2: + case REG_FPEXC32_EL2: + case REG_TFSR_EL2: + case REG_FAR_EL2: + case REG_HPFAR_EL2: + case REG_PMSCR_EL2: + case REG_MAIR_EL2: + case REG_AMAIR_EL2: + case REG_MPAMHCR_EL2: + case REG_MPAMVPMV_EL2: + case REG_MPAM2_EL2: + case REG_MPAMVPM0_EL2: + case REG_MPAMVPM1_EL2: + case REG_MPAMVPM2_EL2: + case REG_MPAMVPM3_EL2: + case REG_MPAMVPM4_EL2: + case REG_MPAMVPM5_EL2: + case REG_MPAMVPM6_EL2: + case REG_MPAMVPM7_EL2: + case REG_VBAR_EL2: + case REG_RVBAR_EL2: + case REG_RMR_EL2: + case REG_VDISR_EL2: + case REG_ICH_AP0R0_EL2: + case REG_ICH_AP0R1_EL2: + case REG_ICH_AP0R2_EL2: + case REG_ICH_AP0R3_EL2: + case REG_ICH_AP1R0_EL2: + case REG_ICH_AP1R1_EL2: + case REG_ICH_AP1R2_EL2: + case REG_ICH_AP1R3_EL2: + case REG_ICH_VSEIR_EL2: + case REG_ICC_SRE_EL2: + case REG_ICH_HCR_EL2: + case REG_ICH_VTR_EL2: + case REG_ICH_MISR_EL2: + case REG_ICH_EISR_EL2: + case REG_ICH_ELRSR_EL2: + case REG_ICH_VMCR_EL2: + case REG_ICH_LR0_EL2: + case REG_ICH_LR1_EL2: + case REG_ICH_LR2_EL2: + case REG_ICH_LR3_EL2: + case REG_ICH_LR4_EL2: + case REG_ICH_LR5_EL2: + case REG_ICH_LR6_EL2: + case REG_ICH_LR7_EL2: + case REG_ICH_LR8_EL2: + case REG_ICH_LR9_EL2: + case REG_ICH_LR10_EL2: + case REG_ICH_LR11_EL2: + case REG_ICH_LR12_EL2: + case REG_ICH_LR13_EL2: + case REG_ICH_LR14_EL2: + case REG_ICH_LR15_EL2: + case REG_CONTEXTIDR_EL2: + case REG_TPIDR_EL2: + case REG_SCXTNUM_EL2: + case REG_CNTVOFF_EL2: + case REG_CNTHCTL_EL2: + case REG_CNTHP_TVAL_EL2: + case REG_CNTHP_CTL_EL2: + case REG_CNTHP_CVAL_EL2: + case REG_CNTHV_TVAL_EL2: + case REG_CNTHV_CTL_EL2: + case REG_CNTHV_CVAL_EL2: + case REG_CNTHVS_TVAL_EL2: + case REG_CNTHVS_CTL_EL2: + case REG_CNTHVS_CVAL_EL2: + case REG_CNTHPS_TVAL_EL2: + case REG_CNTHPS_CTL_EL2: + case REG_CNTHPS_CVAL_EL2: + case REG_FED_ERR_STS: + case REG_FED_ERR_CTL: + case REG_APCTL_EL1: + case REG_KERNKEYLO_EL1: + case REG_KERNKEYHI_EL1: + case REG_VMSALOCK_EL21: + case REG_AMX_STATE_T_EL1: + case REG_AMX_CONFIG_EL1: + case REG_VMSA_LOCK_EL2: + case REG_CTRR_B_UPR_EL1: + case REG_CTRR_B_LWR_EL1: + case REG_SP_SETUP_GL1: + case REG_SP_SETUP_GL2: + case REG_CTRR_B_CTL_EL1: + case REG_CTRR_A_LWR_EL1: + case REG_CTRR_A_UPR_EL1: + case REG_CTRR_A_CTL_EL1: + case REG_VMSA_LOCK_EL12: + case REG_AGTCNTV_CTL_EL02: + case REG_AMX_STATE_EL1: + case REG_AMX_STATUS_EL1: + case REG_AGTCNTP_CVAL_EL02: + case REG_REDIR_ACNTP_TVAL_EL02: + case REG_AGTCNTP_CTL_EL02: + case REG_AGTCNTV_CVAL_EL02: + case REG_AGTCNTV_TVAL_EL02: + case REG_AMX_CONFIG_EL12: + case REG_AMX_CONFIG_EL2: + case REG_SPRR_HUPERM_EL0: + case REG_SPRR_VUPERM_EL0: + case REG_CTRR_A_CTL_EL2: + case REG_CTRR_B_CTL_EL2: + case REG_CTRR_A_LWR_EL2: + case REG_CTRR_A_UPR_EL2: + case REG_CTRR_B_LWR_EL2: + case REG_CTRR_B_UPR_EL2: + case REG_SPRR_HUMPRR_EL2: + case REG_SPRR_HUPERM_SH01_EL2: + case REG_SPRR_HUPERM_SH02_EL2: + case REG_SPRR_HUPERM_SH03_EL2: + case REG_SPRR_HUPERM_SH04_EL2: + case REG_SPRR_HUPERM_SH05_EL2: + case REG_SPRR_HUPERM_SH06_EL2: + case REG_SPRR_HUPERM_SH07_EL2: + case REG_SPRR_VUMPRR_EL1: + case REG_SPRR_VUPERM_SH01_EL1: + case REG_SPRR_VUPERM_SH02_EL1: + case REG_SPRR_VUPERM_SH03_EL1: + case REG_SPRR_VUPERM_SH04_EL1: + case REG_SPRR_VUPERM_SH05_EL1: + case REG_SPRR_VUPERM_SH06_EL1: + case REG_SPRR_VUPERM_SH07_EL1: + case REG_CTRR_A_LWR_EL12: + case REG_CTRR_A_UPR_EL12: + case REG_CTRR_B_LWR_EL12: + case REG_CTRR_B_UPR_EL12: + case REG_CTRR_A_CTL_EL12: + case REG_CTRR_B_CTL_EL12: + case REG_AGTCNTHCTL_EL21: + case REG_AGTCNTKCTL_EL12: + case REG_PREDAKEYLO_EL1: + case REG_PREDAKEYHI_EL1: + case REG_PREDBKEYLO_EL1: + case REG_PREDBKEYHI_EL1: + case REG_SIQ_CFG_EL1: + case REG_AGTCNTPCTSS_EL0: + case REG_AGTCNTVCTSS_EL0: + case REG_AVNCR_EL2: + case REG_ACC_CTRR_A_LWR_EL2: + case REG_ACC_CTRR_A_UPR_EL2: + case REG_ACC_CTRR_B_LWR_EL2: + case REG_ACC_CTRR_B_UPR_EL2: + case REG_ACC_CTRR_A_CTL_EL2: + case REG_ACC_CTRR_B_CTL_EL2: + case REG_AGTCNTPCT_EL0: + case REG_AGTCNTVCT_EL0: + case REG_ACFG_EL1: + case REG_AHCR_EL2: + case REG_APL_INTSTATUS_EL1: + case REG_APL_INTSTATUS_EL2: + case REG_AGTCNTHCTL_EL2: + case REG_JAPIAKEYLO_EL2: + case REG_JAPIAKEYHI_EL2: + case REG_JAPIBKEYLO_EL2: + case REG_JAPIBKEYHI_EL2: + case REG_JAPIAKEYLO_EL1: + case REG_JAPIAKEYHI_EL1: + case REG_JAPIBKEYLO_EL1: + case REG_JAPIBKEYHI_EL1: + case REG_JAPIAKEYLO_EL12: + case REG_JAPIAKEYHI_EL12: + case REG_JAPIBKEYLO_EL12: + case REG_JAPIBKEYHI_EL12: + case REG_AGTCNTRDIR_EL2: + case REG_AGTCNTRDIR_EL12: + case REG_JRANGE_EL2: + case REG_JRANGE_EL1: + case REG_JRANGE_EL12: + case REG_JCTL_EL2: + case REG_JCTL_EL1: + case REG_JCTL_EL12: + case REG_JCTL_EL0: + case REG_AMDSCR_EL1: + case REG_SCTLR_EL12: + case REG_ACTLR_EL12: + case REG_CPACR_EL12: + case REG_TRFCR_EL12: + case REG_SMCR_EL12: + case REG_TTBR0_EL12: + case REG_TTBR1_EL12: + case REG_TCR_EL12: + case REG_SPSR_EL12: + case REG_ELR_EL12: + case REG_AFSR0_EL12: + case REG_AFSR1_EL12: + case REG_ESR_EL12: + case REG_TFSR_EL12: + case REG_FAR_EL12: + case REG_PMSCR_EL12: + case REG_MAIR_EL12: + case REG_AMAIR_EL12: + case REG_MPAM1_EL12: + case REG_VBAR_EL12: + case REG_CONTEXTIDR_EL12: + case REG_SCXTNUM_EL12: + case REG_CNTKCTL_EL12: + case REG_CNTP_TVAL_EL02: + case REG_CNTP_CTL_EL02: + case REG_CNTP_CVAL_EL02: + case REG_CNTV_TVAL_EL02: + case REG_CNTV_CTL_EL02: + case REG_CNTV_CVAL_EL02: + case REG_IPI_RR_LOCAL_EL1: + case REG_IPI_RR_GLOBAL_EL1: + case REG_AF_ERR_CFG0: + case REG_AP_ERR_CFG0: + case REG_AF_ERR_SRC_IDS: + case REG_DPC_ERR_STS: + case REG_DPC_ERR_CTL: + case REG_PROD_TRC_CORE_CFG_EL1: + case REG_TRACE_CORE_CFG: + case REG_IPI_SR: + case REG_APL_LRTMR_EL2: + case REG_APL_INTENABLE_EL2: + case REG_KTRACE_MESSAGE: + case REG_TRACE_CORE_CFG_EXT: + case REG_PROD_TRC_CORE_CFG_EL2: + case REG_HID_PROD_TRC_CORE_CFG_EL1: + case REG_DBG_WRAP_GLB: + case REG_TRACE_STREAM_BASE: + case REG_TRACE_STREAM_FILL: + case REG_TRACE_STREAM_BASE1: + case REG_TRACE_STREAM_FILL1: + case REG_TRACE_STREAM_IRQ: + case REG_WATCHDOGDIAG0: + case REG_WATCHDOGDIAG1: + case REG_TRACE_AUX_CTL: + case REG_IPI_CR: + case REG_UTRIG_EVENT: + case REG_HID_PROD_TRC_MASK_EL1: + case REG_TRACE_CTL: + case REG_TRACE_DAT: + case REG_PROD_TRC_STRM_BASE0_GL2: + case REG_PROD_TRC_STRM_BASE1_GL2: + case REG_CPU_CFG: + case REG_PBLK_STS: + case REG_PROD_TRC_CTL_EL1: + case REG_PROD_TRC_STRM_BASE0_GL1: + case REG_PROD_TRC_STRM_BASE1_GL1: + case REG_PROD_TRC_STRM_FIQ_EL1: + case REG_CPU_OVRD: + case REG_PBLK_EXE_ST: + case REG_PROD_TRC_CORE_GL_CTL_GL1: + case REG_PROD_TRC_CORE_GL_CTL_GL2: + case REG_ACC_OVRD: + case REG_ACC_OVRD1: + case REG_CPM_PWRDN_CTL: + case REG_PROD_TRC_BUF_RESTORE0_GL1: + case REG_PROD_TRC_BUF_RESTORE1_GL1: + case REG_PROD_TRC_EN_GL1: + case REG_PRE_LLCFLUSH_TMR: + case REG_BIUINTFCTL_CFG: + case REG_BIUINTFWRR_CFG: + case REG_PRE_TD_TMR: + case REG_ACC_SLP_WAKE_UP_TMR: + case REG_PBLK_PSW_DLY: + case REG_CPU_STS: + case REG_HIST_TRIG: + case REG_PROD_TRC_BUF_RESTORE0_GL2: + case REG_PROD_TRC_BUF_RESTORE1_GL2: + case REG_PROD_TRC_STRM_FILL0_EL1: + case REG_PROD_TRC_STRM_FILL1_EL1: + case REG_ARRAY_INDEX: + case REG_PROD_TRC_CTL_EL2: + case REG_PROD_TRC_EN_GL2: + case REG_PROD_TRC_STRM_FIQ_EL2: + case REG_PROD_TRC_CPMU_DUMP_TRIG_EL1: + case REG_PROD_LOSS_COUNT_EL1: + case REG_SW_TRACE_DATA_EL0: + case REG_IL1_DATA0: + case REG_IL1_DATA1: + case REG_DL1_DATA0: + case REG_DL1_DATA1: + case REG_MMUDATA0: + case REG_MMUDATA1: + case REG_DL1_DATA2: + case REG_IL1_DATA2: + case REG_LLC_DATA0: + case REG_LLC_DATA1: + case REG_SCTLR_EL3: + case REG_ACTLR_EL3: + case REG_SCR_EL3: + case REG_SDER32_EL3: + case REG_CPTR_EL3: + case REG_MDCR_EL3: + case REG_TTBR0_EL3: + case REG_TCR_EL3: + case REG_SPSR_EL3: + case REG_ELR_EL3: + case REG_SP_EL2: + case REG_AFSR0_EL3: + case REG_AFSR1_EL3: + case REG_ESR_EL3: + case REG_TFSR_EL3: + case REG_FAR_EL3: + case REG_MAIR_EL3: + case REG_AMAIR_EL3: + case REG_MPAM3_EL3: + case REG_VBAR_EL3: + case REG_RVBAR_EL3: + case REG_RMR_EL3: + case REG_ICC_CTLR_EL3: + case REG_ICC_SRE_EL3: + case REG_ICC_IGRPEN1_EL3: + case REG_TPIDR_EL3: + case REG_SCXTNUM_EL3: + case REG_MMU_ERR_STS: + case REG_AFSR1_GL1: + case REG_AFSR1_GL2: + case REG_AFSR1_GL12: + case REG_BP_OBJC_ADR_EL1: + case REG_BP_OBJC_CTL_EL1: + case REG_SP_GL11: + case REG_MMU_SESR_EL2: + case REG_SPRR_CONFIG_EL1: + case REG_HPFAR_GL2: + case REG_GXF_CONFIG_EL1: + case REG_AMRANGE_EL21: + case REG_GXF_CONFIG_EL2: + case REG_SPRR_UPERM_EL0: + case REG_SPRR_PPERM_EL1: + case REG_SPRR_PPERM_EL2: + case REG_APGAKEYLO_EL12: + case REG_APGAKEYHI_EL12: + case REG_KERNKEYLO_EL12: + case REG_KERNKEYHI_EL12: + case REG_AFPCR_EL0: + case REG_SP_GL22: + case REG_AMXIDR_EL1: + case REG_SPRR_HUMPRR_EL21: + case REG_SPRR_PMPRR_EL1: + case REG_SPRR_PMPRR_EL2: + case REG_SPRR_HUPERM_SH01_EL21: + case REG_SPRR_HUPERM_SH02_EL21: + case REG_SPRR_HUPERM_SH03_EL21: + case REG_SPRR_HUPERM_SH04_EL21: + case REG_SPRR_HUPERM_SH05_EL21: + case REG_SPRR_HUPERM_SH06_EL21: + case REG_SPRR_HUPERM_SH07_EL21: + case REG_SPRR_PPERM_SH01_EL1: + case REG_SPRR_PPERM_SH02_EL1: + case REG_SPRR_PPERM_SH03_EL1: + case REG_SPRR_PPERM_SH04_EL1: + case REG_SPRR_PPERM_SH05_EL1: + case REG_SPRR_PPERM_SH06_EL1: + case REG_SPRR_PPERM_SH07_EL1: + case REG_SPRR_PPERM_SH01_EL2: + case REG_SPRR_PPERM_SH02_EL2: + case REG_SPRR_PPERM_SH03_EL2: + case REG_SPRR_PPERM_SH04_EL2: + case REG_SPRR_PPERM_SH05_EL2: + case REG_SPRR_PPERM_SH06_EL2: + case REG_SPRR_PPERM_SH07_EL2: + case REG_SPRR_PMPRR_EL12: + case REG_SPRR_PPERM_SH01_EL12: + case REG_SPRR_PPERM_SH02_EL12: + case REG_SPRR_PPERM_SH03_EL12: + case REG_SPRR_PPERM_SH04_EL12: + case REG_SPRR_PPERM_SH05_EL12: + case REG_SPRR_PPERM_SH06_EL12: + case REG_SPRR_PPERM_SH07_EL12: + case REG_APIAKEYLO_EL12: + case REG_APIAKEYHI_EL12: + case REG_APIBKEYLO_EL12: + case REG_APIBKEYHI_EL12: + case REG_APDAKEYLO_EL12: + case REG_APDAKEYHI_EL12: + case REG_APDBKEYLO_EL12: + case REG_APDBKEYHI_EL12: + case REG_CURRENTG: + case REG_GXF_ENTRY_EL1: + case REG_GXF_PABENTRY_EL1: + case REG_ASPSR_EL1: + case REG_ADSPSR_EL0: + case REG_PMCR1_GL2: + case REG_ASPSR_EL2: + case REG_PMCR1_GL1: + case REG_VBAR_GL12: + case REG_SPSR_GL12: + case REG_ASPSR_GL12: + case REG_ESR_GL12: + case REG_ELR_GL12: + case REG_FAR_GL12: + case REG_SP_GL1: + case REG_TPIDR_GL1: + case REG_VBAR_GL1: + case REG_SPSR_GL1: + case REG_ASPSR_GL1: + case REG_ESR_GL1: + case REG_ELR_GL1: + case REG_FAR_GL1: + case REG_SP_GL2: + case REG_TPIDR_GL2: + case REG_VBAR_GL2: + case REG_SPSR_GL2: + case REG_ASPSR_GL2: + case REG_ESR_GL2: + case REG_ELR_GL2: + case REG_FAR_GL2: + case REG_GXF_ENTRY_EL2: + case REG_GXF_PABENTRY_EL2: + case REG_APCTL_EL2: + case REG_APSTS_EL2: + case REG_APSTS_EL1: + case REG_KERNKEYLO_EL2: + case REG_KERNKEYHI_EL2: + case REG_ASPSR_EL12: + case REG_APIAKEYLO_EL2: + case REG_APIAKEYHI_EL2: + case REG_APIBKEYLO_EL2: + case REG_APIBKEYHI_EL2: + case REG_APDAKEYLO_EL2: + case REG_APDAKEYHI_EL2: + case REG_APDBKEYLO_EL2: + case REG_APDBKEYHI_EL2: + case REG_APGAKEYLO_EL2: + case REG_APGAKEYHI_EL2: + case REG_SPRR_CONFIG_EL2: + case REG_SPRR_AMRANGE_EL2: + case REG_VMKEYLO_EL2: + case REG_VMKEYHI_EL2: + case REG_MMU_SFAR_EL2: + case REG_APSTS_EL12: + case REG_APCTL_EL12: + case REG_GXF_CONFIG_EL12: + case REG_GXF_ENTRY_EL12: + case REG_GXF_PABENTRY_EL12: + case REG_SPRR_CONFIG_EL12: + case REG_SPRR_AMRANGE_EL12: + case REG_MMU_SESR_CTL_EL2: + case REG_SPRR_PPERM_EL12: + case REG_CNTPS_TVAL_EL1: + case REG_CNTPS_CTL_EL1: + case REG_CNTPS_CVAL_EL1: + case REG_PSTATE_SPSEL: + case REG_PWRDNSAVE0: + case REG_NRG_ACC_CTL: + case REG_AON_CNT0: + case REG_CPU_CNT0: + case REG_UPMCR0_EL1: + case REG_UPMC8: + case REG_AON_CNT8: + case REG_PWRDNSAVE1: + case REG_CORE_NRG_ACC_DAT: + case REG_AON_CNT_CTL0: + case REG_CPU_CNT_CTL0: + case REG_UPMESR0_EL1: + case REG_UPMC9: + case REG_AON_CNT_CTL8: + case REG_ACC_PWR_DN_SAVE: + case REG_CPM_NRG_ACC_DAT: + case REG_AON_CNT1: + case REG_CPU_CNT1: + case REG_UPMSWCTRL_EL1: + case REG_UPMC10: + case REG_AON_CNT9: + case REG_CORE_SRM_NRG_ACC_DAT: + case REG_AON_CNT_CTL1: + case REG_CPU_CNT_CTL1: + case REG_UPMECM0_EL1: + case REG_UPMC11: + case REG_AON_CNT_CTL9: + case REG_AON_CNT_CTL: + case REG_CPM_SRM_NRG_ACC_DAT: + case REG_AON_CNT2: + case REG_CPU_CNT2: + case REG_UPMECM1_EL1: + case REG_UPMC12: + case REG_AON_CNT10: + case REG_CPU_CNT_CTL: + case REG_AON_CNT_CTL2: + case REG_CPU_CNT_CTL2: + case REG_UPMPCM_EL1: + case REG_UPMC13: + case REG_AON_CNT_CTL10: + case REG_AON_CNT3: + case REG_CPU_CNT3: + case REG_UPMSR_EL1: + case REG_UPMC14: + case REG_AON_CNT11: + case REG_AON_CNT_CTL3: + case REG_CPU_CNT_CTL3: + case REG_UPMC0: + case REG_UPMC15: + case REG_AON_CNT_CTL11: + case REG_AON_CNT4: + case REG_CPU_CNT4: + case REG_UPMC1: + case REG_UPMECM2_EL1: + case REG_AON_CNT_CTL4: + case REG_CPU_CNT_CTL4: + case REG_UPMC2: + case REG_UPMECM3_EL1: + case REG_AON_CNT5: + case REG_CPU_CNT5: + case REG_UPMC3: + case REG_UPMCR1_EL1: + case REG_AON_CNT_CTL5: + case REG_CPU_CNT_CTL5: + case REG_UPMC4: + case REG_UPMESR1_EL1: + case REG_AON_CNT6: + case REG_CPU_CNT6: + case REG_UPMC5: + case REG_AON_CNT_CTL6: + case REG_CPU_CNT_CTL6: + case REG_UPMC6: + case REG_AON_CNT7: + case REG_CPU_CNT7: + case REG_UPMC7: + case REG_AON_CNT_CTL7: + case REG_CPU_CNT_CTL7: return true; - default: return false; + default: + return false; } } - - diff --git a/arch/arm64/disassembler/sysregs_gen.h b/arch/arm64/disassembler/sysregs_gen.h index b7a16cd5..54978f45 100644 --- a/arch/arm64/disassembler/sysregs_gen.h +++ b/arch/arm64/disassembler/sysregs_gen.h @@ -1,11 +1,13 @@ +/* GENERATED FILE - DO NOT MODIFY - SUBMIT GITHUB ISSUE IF PROBLEM FOUND */ #pragma once #include <stdbool.h> -enum SystemReg { +enum SystemReg +{ SYSREG_NONE=0, REG_EDSCR =4 /* 4 */, // S0_0_c0_c0_4 at min EL0: EDSCR - REG_EDPRSR =24 /* 24 */, // S0_0_c0_c3_0 at min EL0: EDPRSR + REG_EDPRCR =24 /* 24 */, // S0_0_c0_c3_0 at min EL0: EDPRCR REG_UAOIMM =515 /* 515 */, // S0_0_c4_c0_3 at min EL1: UAOIMM REG_PANIMM =516 /* 516 */, // S0_0_c4_c0_4 at min EL1: PANIMM REG_SPSELIMM =517 /* 517 */, // S0_0_c4_c0_5 at min EL1: SPSELIMM @@ -141,11 +143,9 @@ enum SystemReg { REG_OSLSR_EL1 =32908 /* 32908 */, // S2_0_c1_c1_4 at min EL1: OSLSR_EL1 REG_OSDLR_EL1 =32924 /* 32924 */, // S2_0_c1_c3_4 at min EL1: OSDLR_EL1 REG_DBGPRCR_EL1 =32932 /* 32932 */, // S2_0_c1_c4_4 at min EL1: DBGPRCR_EL1 - REG_CLAIMSET_EL1 =33734 /* 33734 */, // S2_0_c7_c8_6 at min EL1: CLAIMSET_EL1 - REG_DBGCLAIMSET_EL1 =33734 /* 33734 */, - REG_CLAIMCLR_EL1 =33742 /* 33742 */, // S2_0_c7_c9_6 at min EL1: CLAIMCLR_EL1 - REG_DBGCLAIMCLR_EL1 =33742 /* 33742 */, - REG_AUTHSTAT_EL1 =33782 /* 33782 */, // S2_0_c7_c14_6 at min EL1: AUTHSTAT_EL1 + REG_DBGCLAIMSET_EL1 =33734 /* 33734 */, // S2_0_c7_c8_6 at min EL1: DBGCLAIMSET_EL1 + REG_DBGCLAIMCLR_EL1 =33742 /* 33742 */, // S2_0_c7_c9_6 at min EL1: DBGCLAIMCLR_EL1 + REG_DBGAUTHSTAT_EL1 =33782 /* 33782 */, // S2_0_c7_c14_6 at min EL1: DBGAUTHSTAT_EL1 REG_TRCTRACEIDR =34817 /* 34817 */, REG_TRCVICTLR =34818 /* 34818 */, REG_TRCSEQEVR0 =34820 /* 34820 */, @@ -327,9 +327,8 @@ enum SystemReg { REG_TEECR32_EL1 =36864 /* 36864 */, // S2_2_c0_c0_0 at min EL1: TEECR32_EL1 REG_TEEHBR32_EL1 =36992 /* 36992 */, // S2_2_c1_c0_0 at min EL1: TEEHBR32_EL1 REG_MDCCSR_EL0 =38920 /* 38920 */, // S2_3_c0_c1_0 at min EL1: MDCCSR_EL0 - REG_MDDTR_EL0 =38944 /* 38944 */, // S2_3_c0_c4_0 at min EL1: MDDTR_EL0 - REG_DBGDTR_EL0 =38944 /* 38944 */, - REG_MDDTRTX_EL0 =38952 /* 38952 */, // S2_3_c0_c5_0 at min EL1: MDDTRTX_EL0 + REG_DBGDTR_EL0 =38944 /* 38944 */, // S2_3_c0_c4_0 at min EL0: DBGDTR_EL0 + REG_DBGDTRRX_EL0 =38952 /* 38952 */, // S2_3_c0_c5_0 at min EL0: DBGDTRRX_EL0 REG_DBGDTRTX_EL0 =38952 /* 38952 */, REG_DBGVCR32_EL2 =41016 /* 41016 */, // S2_4_c0_c7_0 at min EL2: DBGVCR32_EL2 REG_MIDR_EL1 =49152 /* 49152 */, // S3_0_c0_c0_0 at min EL1: MIDR_EL1 @@ -391,61 +390,39 @@ enum SystemReg { REG_ID_AA64MMFR5_EL1 =49213 /* 49213 */, // S3_0_c0_c7_5 at min EL1: ID_AA64MMFR5_EL1 REG_ID_AA64MMFR6_EL1 =49214 /* 49214 */, // S3_0_c0_c7_6 at min EL1: ID_AA64MMFR6_EL1 REG_ID_AA64MMFR7_EL1 =49215 /* 49215 */, // S3_0_c0_c7_7 at min EL1: ID_AA64MMFR7_EL1 - REG_SCTLR_EL21 =49280 /* 49280 */, // S3_0_c1_c0_0 at min EL1: SCTLR_EL21 - REG_SCTLR_EL1 =49280 /* 49280 */, - REG_ACTLR_EL21 =49281 /* 49281 */, // S3_0_c1_c0_1 at min EL1: ACTLR_EL21 - REG_ACTLR_EL1 =49281 /* 49281 */, - REG_CPTR_EL21 =49282 /* 49282 */, // S3_0_c1_c0_2 at min EL1: CPTR_EL21 - REG_CPACR_EL1 =49282 /* 49282 */, + REG_SCTLR_EL1 =49280 /* 49280 */, // S3_0_c1_c0_0 at min EL1: SCTLR_EL1 + REG_ACTLR_EL1 =49281 /* 49281 */, // S3_0_c1_c0_1 at min EL1: ACTLR_EL1 + REG_CPACR_EL1 =49282 /* 49282 */, // S3_0_c1_c0_2 at min EL1: CPACR_EL1 REG_RGSR_EL1 =49285 /* 49285 */, REG_GCR_EL1 =49286 /* 49286 */, REG_TRFCR_EL1 =49297 /* 49297 */, REG_SMPRI_EL1 =49300 /* 49300 */, // S3_0_c1_c2_4 at min EL1: SMPRI_EL1 - REG_SMCR_EL21 =49302 /* 49302 */, // S3_0_c1_c2_6 at min EL1: SMCR_EL21 - REG_TTBR0_EL21 =49408 /* 49408 */, // S3_0_c2_c0_0 at min EL1: TTBR0_EL21 - REG_TTBR0_EL1 =49408 /* 49408 */, - REG_TTBR1_EL21 =49409 /* 49409 */, // S3_0_c2_c0_1 at min EL1: TTBR1_EL21 - REG_TTBR1_EL1 =49409 /* 49409 */, - REG_TCR_EL21 =49410 /* 49410 */, // S3_0_c2_c0_2 at min EL1: TCR_EL21 - REG_TCR_EL1 =49410 /* 49410 */, - REG_APIAKEYLO_EL21 =49416 /* 49416 */, // S3_0_c2_c1_0 at min EL1: APIAKeyLo_EL21 - REG_APIAKEYLO_EL1 =49416 /* 49416 */, - REG_APIAKEYHI_EL21 =49417 /* 49417 */, // S3_0_c2_c1_1 at min EL1: APIAKeyHi_EL21 - REG_APIAKEYHI_EL1 =49417 /* 49417 */, - REG_APIBKEYLO_EL21 =49418 /* 49418 */, // S3_0_c2_c1_2 at min EL1: APIBKeyLo_EL21 - REG_APIBKEYLO_EL1 =49418 /* 49418 */, - REG_APIBKEYHI_EL21 =49419 /* 49419 */, // S3_0_c2_c1_3 at min EL1: APIBKeyHi_EL21 - REG_APIBKEYHI_EL1 =49419 /* 49419 */, - REG_APDAKEYLO_EL21 =49424 /* 49424 */, // S3_0_c2_c2_0 at min EL1: APDAKeyLo_EL21 - REG_APDAKEYLO_EL1 =49424 /* 49424 */, - REG_APDAKEYHI_EL21 =49425 /* 49425 */, // S3_0_c2_c2_1 at min EL1: APDAKeyHi_EL21 - REG_APDAKEYHI_EL1 =49425 /* 49425 */, - REG_APDBKEYLO_EL21 =49426 /* 49426 */, // S3_0_c2_c2_2 at min EL1: APDBKeyLo_EL21 - REG_APDBKEYLO_EL1 =49426 /* 49426 */, - REG_APDBKEYHI_EL21 =49427 /* 49427 */, // S3_0_c2_c2_3 at min EL1: APDBKeyHi_EL21 - REG_APDBKEYHI_EL1 =49427 /* 49427 */, - REG_APGAKEYLO_EL21 =49432 /* 49432 */, // S3_0_c2_c3_0 at min EL1: APGAKeyLo_EL21 - REG_APGAKEYLO_EL1 =49432 /* 49432 */, - REG_APGAKEYHI_EL21 =49433 /* 49433 */, // S3_0_c2_c3_1 at min EL1: APGAKeyHi_EL21 - REG_APGAKEYHI_EL1 =49433 /* 49433 */, - REG_SPSR_EL21 =49664 /* 49664 */, // S3_0_c4_c0_0 at min EL1: SPSR_EL21 - REG_SPSR_EL1 =49664 /* 49664 */, - REG_ELR_EL21 =49665 /* 49665 */, // S3_0_c4_c0_1 at min EL1: ELR_EL21 - REG_ELR_EL1 =49665 /* 49665 */, + REG_SMCR_EL1 =49302 /* 49302 */, // S3_0_c1_c2_6 at min EL1: SMCR_EL1 + REG_TTBR0_EL1 =49408 /* 49408 */, // S3_0_c2_c0_0 at min EL1: TTBR0_EL1 + REG_TTBR1_EL1 =49409 /* 49409 */, // S3_0_c2_c0_1 at min EL1: TTBR1_EL1 + REG_TCR_EL1 =49410 /* 49410 */, // S3_0_c2_c0_2 at min EL1: TCR_EL1 + REG_APIAKEYLO_EL1 =49416 /* 49416 */, // S3_0_c2_c1_0 at min EL1: APIAKeyLo_EL1 + REG_APIAKEYHI_EL1 =49417 /* 49417 */, // S3_0_c2_c1_1 at min EL1: APIAKeyHi_EL1 + REG_APIBKEYLO_EL1 =49418 /* 49418 */, // S3_0_c2_c1_2 at min EL1: APIBKeyLo_EL1 + REG_APIBKEYHI_EL1 =49419 /* 49419 */, // S3_0_c2_c1_3 at min EL1: APIBKeyHi_EL1 + REG_APDAKEYLO_EL1 =49424 /* 49424 */, // S3_0_c2_c2_0 at min EL1: APDAKeyLo_EL1 + REG_APDAKEYHI_EL1 =49425 /* 49425 */, // S3_0_c2_c2_1 at min EL1: APDAKeyHi_EL1 + REG_APDBKEYLO_EL1 =49426 /* 49426 */, // S3_0_c2_c2_2 at min EL1: APDBKeyLo_EL1 + REG_APDBKEYHI_EL1 =49427 /* 49427 */, // S3_0_c2_c2_3 at min EL1: APDBKeyHi_EL1 + REG_APGAKEYLO_EL1 =49432 /* 49432 */, // S3_0_c2_c3_0 at min EL1: APGAKeyLo_EL1 + REG_APGAKEYHI_EL1 =49433 /* 49433 */, // S3_0_c2_c3_1 at min EL1: APGAKeyHi_EL1 + REG_SPSR_EL1 =49664 /* 49664 */, // S3_0_c4_c0_0 at min EL1: SPSR_EL1 + REG_ELR_EL1 =49665 /* 49665 */, // S3_0_c4_c0_1 at min EL1: ELR_EL1 REG_SP_EL0 =49672 /* 49672 */, // S3_0_c4_c1_0 at min EL1: SP_EL0 REG_SPSEL =49680 /* 49680 */, // S3_0_c4_c2_0 at min EL1: SPSEL - REG_NESTEDCURRENTEL =49682 /* 49682 */, // S3_0_c4_c2_2 at min EL1: NestedCurrentEL - REG_CURRENTEL =49682 /* 49682 */, + REG_CURRENTEL =49682 /* 49682 */, // S3_0_c4_c2_2 at min EL1: CurrentEL REG_PAN =49683 /* 49683 */, // S3_0_c4_c2_3 at min EL1: PAN REG_UAO =49684 /* 49684 */, // S3_0_c4_c2_4 at min EL1: UAO REG_ICV_PMR_EL1 =49712 /* 49712 */, // S3_0_c4_c6_0 at min EL1: ICV_PMR_EL1 REG_ICC_PMR_EL1 =49712 /* 49712 */, - REG_AFSR0_EL21 =49800 /* 49800 */, // S3_0_c5_c1_0 at min EL1: AFSR0_EL21 - REG_AFSR0_EL1 =49800 /* 49800 */, - REG_AFSR1_EL21 =49801 /* 49801 */, // S3_0_c5_c1_1 at min EL1: AFSR1_EL21 - REG_AFSR1_EL1 =49801 /* 49801 */, - REG_ESR_EL21 =49808 /* 49808 */, // S3_0_c5_c2_0 at min EL1: ESR_EL21 - REG_ESR_EL1 =49808 /* 49808 */, + REG_AFSR0_EL1 =49800 /* 49800 */, // S3_0_c5_c1_0 at min EL1: AFSR0_EL1 + REG_AFSR1_EL1 =49801 /* 49801 */, // S3_0_c5_c1_1 at min EL1: AFSR1_EL1 + REG_ESR_EL1 =49808 /* 49808 */, // S3_0_c5_c2_0 at min EL1: ESR_EL1 REG_ERRIDR_EL1 =49816 /* 49816 */, // S3_0_c5_c3_0 at min EL1: ERRIDR_EL1 REG_ERRSELR_EL1 =49817 /* 49817 */, REG_ERXCTLR_EL1 =49825 /* 49825 */, @@ -460,8 +437,7 @@ enum SystemReg { REG_ERXTS_EL1 =49839 /* 49839 */, REG_TFSR_EL1 =49840 /* 49840 */, REG_TFSRE0_EL1 =49841 /* 49841 */, - REG_FAR_EL21 =49920 /* 49920 */, // S3_0_c6_c0_0 at min EL1: FAR_EL21 - REG_FAR_EL1 =49920 /* 49920 */, + REG_FAR_EL1 =49920 /* 49920 */, // S3_0_c6_c0_0 at min EL1: FAR_EL1 REG_PAR_EL1 =50080 /* 50080 */, // S3_0_c7_c4_0 at min EL1: PAR_EL1 REG_PMSCR_EL1 =50376 /* 50376 */, REG_PMSICR_EL1 =50378 /* 50378 */, @@ -483,10 +459,8 @@ enum SystemReg { REG_PMINTENSET_EL1 =50417 /* 50417 */, REG_PMINTENCLR_EL1 =50418 /* 50418 */, REG_PMMIR_EL1 =50422 /* 50422 */, - REG_MAIR_EL21 =50448 /* 50448 */, // S3_0_c10_c2_0 at min EL1: MAIR_EL21 - REG_MAIR_EL1 =50448 /* 50448 */, - REG_AMAIR_EL21 =50456 /* 50456 */, // S3_0_c10_c3_0 at min EL1: AMAIR_EL21 - REG_AMAIR_EL1 =50456 /* 50456 */, + REG_MAIR_EL1 =50448 /* 50448 */, // S3_0_c10_c2_0 at min EL1: MAIR_EL1 + REG_AMAIR_EL1 =50456 /* 50456 */, // S3_0_c10_c3_0 at min EL1: AMAIR_EL1 REG_LORSA_EL1 =50464 /* 50464 */, // S3_0_c10_c4_0 at min EL1: LORSA_EL1 REG_LOREA_EL1 =50465 /* 50465 */, // S3_0_c10_c4_1 at min EL1: LOREA_EL1 REG_LORN_EL1 =50466 /* 50466 */, // S3_0_c10_c4_2 at min EL1: LORN_EL1 @@ -494,10 +468,10 @@ enum SystemReg { REG_LORID_EL1 =50471 /* 50471 */, // S3_0_c10_c4_7 at min EL1: LORID_EL1 REG_MPAM1_EL1 =50472 /* 50472 */, REG_MPAM0_EL1 =50473 /* 50473 */, - REG_CTRR_C_LWR_EL21 =50560 /* 50560 */, // S3_0_c11_c0_0 at min EL1: CTRR_C_LWR_EL21 - REG_CTRR_C_UPR_EL21 =50561 /* 50561 */, // S3_0_c11_c0_1 at min EL1: CTRR_C_UPR_EL21 - REG_CTRR_D_LWR_EL21 =50562 /* 50562 */, // S3_0_c11_c0_2 at min EL1: CTRR_D_LWR_EL21 - REG_CTRR_D_UPR_EL21 =50563 /* 50563 */, // S3_0_c11_c0_3 at min EL1: CTRR_D_UPR_EL21 + REG_CTRR_C_LWR_EL1 =50560 /* 50560 */, // S3_0_c11_c0_0 at min EL1: CTRR_C_LWR_EL1 + REG_CTRR_C_UPR_EL1 =50561 /* 50561 */, // S3_0_c11_c0_1 at min EL1: CTRR_C_UPR_EL1 + REG_CTRR_D_LWR_EL1 =50562 /* 50562 */, // S3_0_c11_c0_2 at min EL1: CTRR_D_LWR_EL1 + REG_CTRR_D_UPR_EL1 =50563 /* 50563 */, // S3_0_c11_c0_3 at min EL1: CTRR_D_UPR_EL1 REG_CTRR_C_LWR_EL12 =50564 /* 50564 */, // S3_0_c11_c0_4 at min EL2: CTRR_C_LWR_EL12 REG_CTRR_C_UPR_EL12 =50565 /* 50565 */, // S3_0_c11_c0_5 at min EL2: CTRR_C_UPR_EL12 REG_CTRR_D_LWR_EL12 =50566 /* 50566 */, // S3_0_c11_c0_6 at min EL2: CTRR_D_LWR_EL12 @@ -506,20 +480,20 @@ enum SystemReg { REG_CTRR_C_UPR_EL2 =50569 /* 50569 */, // S3_0_c11_c1_1 at min EL2: CTRR_C_UPR_EL2 REG_CTRR_D_LWR_EL2 =50570 /* 50570 */, // S3_0_c11_c1_2 at min EL2: CTRR_D_LWR_EL2 REG_CTRR_D_UPR_EL2 =50571 /* 50571 */, // S3_0_c11_c1_3 at min EL2: CTRR_D_UPR_EL2 - REG_CTRR_C_CTL_EL21 =50572 /* 50572 */, // S3_0_c11_c1_4 at min EL1: CTRR_C_CTL_EL21 - REG_CTRR_D_CTL_EL21 =50573 /* 50573 */, // S3_0_c11_c1_5 at min EL1: CTRR_D_CTL_EL21 + REG_CTRR_C_CTL_EL1 =50572 /* 50572 */, // S3_0_c11_c1_4 at min EL1: CTRR_C_CTL_EL1 + REG_CTRR_D_CTL_EL1 =50573 /* 50573 */, // S3_0_c11_c1_5 at min EL1: CTRR_D_CTL_EL1 REG_CTRR_C_CTL_EL12 =50574 /* 50574 */, // S3_0_c11_c1_6 at min EL2: CTRR_C_CTL_EL12 REG_CTRR_D_CTL_EL12 =50575 /* 50575 */, // S3_0_c11_c1_7 at min EL2: CTRR_D_CTL_EL12 REG_CTRR_C_CTL_EL2 =50576 /* 50576 */, // S3_0_c11_c2_0 at min EL2: CTRR_C_CTL_EL2 REG_CTRR_D_CTL_EL2 =50577 /* 50577 */, // S3_0_c11_c2_1 at min EL2: CTRR_D_CTL_EL2 - REG_CTXR_A_LWR_EL21 =50578 /* 50578 */, // S3_0_c11_c2_2 at min EL1: CTXR_A_LWR_EL21 - REG_CTXR_A_UPR_EL21 =50579 /* 50579 */, // S3_0_c11_c2_3 at min EL1: CTXR_A_UPR_EL21 - REG_CTXR_B_LWR_EL21 =50580 /* 50580 */, // S3_0_c11_c2_4 at min EL1: CTXR_B_LWR_EL21 - REG_CTXR_B_UPR_EL21 =50581 /* 50581 */, // S3_0_c11_c2_5 at min EL1: CTXR_B_UPR_EL21 - REG_CTXR_C_LWR_EL21 =50582 /* 50582 */, // S3_0_c11_c2_6 at min EL1: CTXR_C_LWR_EL21 - REG_CTXR_C_UPR_EL21 =50583 /* 50583 */, // S3_0_c11_c2_7 at min EL1: CTXR_C_UPR_EL21 - REG_CTXR_D_LWR_EL21 =50584 /* 50584 */, // S3_0_c11_c3_0 at min EL1: CTXR_D_LWR_EL21 - REG_CTXR_D_UPR_EL21 =50585 /* 50585 */, // S3_0_c11_c3_1 at min EL1: CTXR_D_UPR_EL21 + REG_CTXR_A_LWR_EL1 =50578 /* 50578 */, // S3_0_c11_c2_2 at min EL1: CTXR_A_LWR_EL1 + REG_CTXR_A_UPR_EL1 =50579 /* 50579 */, // S3_0_c11_c2_3 at min EL1: CTXR_A_UPR_EL1 + REG_CTXR_B_LWR_EL1 =50580 /* 50580 */, // S3_0_c11_c2_4 at min EL1: CTXR_B_LWR_EL1 + REG_CTXR_B_UPR_EL1 =50581 /* 50581 */, // S3_0_c11_c2_5 at min EL1: CTXR_B_UPR_EL1 + REG_CTXR_C_LWR_EL1 =50582 /* 50582 */, // S3_0_c11_c2_6 at min EL1: CTXR_C_LWR_EL1 + REG_CTXR_C_UPR_EL1 =50583 /* 50583 */, // S3_0_c11_c2_7 at min EL1: CTXR_C_UPR_EL1 + REG_CTXR_D_LWR_EL1 =50584 /* 50584 */, // S3_0_c11_c3_0 at min EL1: CTXR_D_LWR_EL1 + REG_CTXR_D_UPR_EL1 =50585 /* 50585 */, // S3_0_c11_c3_1 at min EL1: CTXR_D_UPR_EL1 REG_CTXR_A_LWR_EL12 =50586 /* 50586 */, // S3_0_c11_c3_2 at min EL2: CTXR_A_LWR_EL12 REG_CTXR_A_UPR_EL12 =50587 /* 50587 */, // S3_0_c11_c3_3 at min EL2: CTXR_A_UPR_EL12 REG_CTXR_B_LWR_EL12 =50588 /* 50588 */, // S3_0_c11_c3_4 at min EL2: CTXR_B_LWR_EL12 @@ -536,10 +510,10 @@ enum SystemReg { REG_CTXR_C_UPR_EL2 =50599 /* 50599 */, // S3_0_c11_c4_7 at min EL2: CTXR_C_UPR_EL2 REG_CTXR_D_LWR_EL2 =50600 /* 50600 */, // S3_0_c11_c5_0 at min EL2: CTXR_D_LWR_EL2 REG_CTXR_D_UPR_EL2 =50601 /* 50601 */, // S3_0_c11_c5_1 at min EL2: CTXR_D_UPR_EL2 - REG_CTXR_A_CTL_EL21 =50602 /* 50602 */, // S3_0_c11_c5_2 at min EL1: CTXR_A_CTL_EL21 - REG_CTXR_B_CTL_EL21 =50603 /* 50603 */, // S3_0_c11_c5_3 at min EL1: CTXR_B_CTL_EL21 - REG_CTXR_C_CTL_EL21 =50604 /* 50604 */, // S3_0_c11_c5_4 at min EL1: CTXR_C_CTL_EL21 - REG_CTXR_D_CTL_EL21 =50605 /* 50605 */, // S3_0_c11_c5_5 at min EL1: CTXR_D_CTL_EL21 + REG_CTXR_A_CTL_EL1 =50602 /* 50602 */, // S3_0_c11_c5_2 at min EL1: CTXR_A_CTL_EL1 + REG_CTXR_B_CTL_EL1 =50603 /* 50603 */, // S3_0_c11_c5_3 at min EL1: CTXR_B_CTL_EL1 + REG_CTXR_C_CTL_EL1 =50604 /* 50604 */, // S3_0_c11_c5_4 at min EL1: CTXR_C_CTL_EL1 + REG_CTXR_D_CTL_EL1 =50605 /* 50605 */, // S3_0_c11_c5_5 at min EL1: CTXR_D_CTL_EL1 REG_CTXR_A_CTL_EL12 =50606 /* 50606 */, // S3_0_c11_c5_6 at min EL2: CTXR_A_CTL_EL12 REG_CTXR_B_CTL_EL12 =50607 /* 50607 */, // S3_0_c11_c5_7 at min EL2: CTXR_B_CTL_EL12 REG_CTXR_C_CTL_EL12 =50608 /* 50608 */, // S3_0_c11_c6_0 at min EL2: CTXR_C_CTL_EL12 @@ -566,8 +540,7 @@ enum SystemReg { REG_ACC_CTXR_B_CTL_EL2 =50629 /* 50629 */, // S3_0_c11_c8_5 at min EL2: ACC_CTXR_B_CTL_EL2 REG_ACC_CTXR_C_CTL_EL2 =50630 /* 50630 */, // S3_0_c11_c8_6 at min EL2: ACC_CTXR_C_CTL_EL2 REG_ACC_CTXR_D_CTL_EL2 =50631 /* 50631 */, // S3_0_c11_c8_7 at min EL2: ACC_CTXR_D_CTL_EL2 - REG_VBAR_EL21 =50688 /* 50688 */, // S3_0_c12_c0_0 at min EL1: VBAR_EL21 - REG_VBAR_EL1 =50688 /* 50688 */, + REG_VBAR_EL1 =50688 /* 50688 */, // S3_0_c12_c0_0 at min EL1: VBAR_EL1 REG_RVBAR_EL1 =50689 /* 50689 */, // S3_0_c12_c0_1 at min EL1: RVBAR_EL1 REG_RMR_EL1 =50690 /* 50690 */, // S3_0_c12_c0_2 at min EL1: RMR_EL1 REG_ISR_EL1 =50696 /* 50696 */, // S3_0_c12_c1_0 at min EL1: ISR_EL1 @@ -596,7 +569,7 @@ enum SystemReg { REG_ICV_EOIR1_EL1 =50785 /* 50785 */, // S3_0_c12_c12_1 at min EL1: ICV_EOIR1_EL1 REG_ICC_EOIR1_EL1 =50785 /* 50785 */, REG_ICV_HPPIR1_EL1 =50786 /* 50786 */, // S3_0_c12_c12_2 at min EL1: ICV_HPPIR1_EL1 - REG_ICV_BPR1_EL1 =50787 /* 50787 */, // S3_0_c12_c12_3 at min EL1: ICV_BPR1_EL1 + REG_ICV_BPR1CBPR_EL1 =50787 /* 50787 */, // S3_0_c12_c12_3 at min EL1: ICV_BPR1CBPR_EL1 REG_ICC_BPR1_EL1 =50787 /* 50787 */, REG_ICV_CTLR_EL1 =50788 /* 50788 */, // S3_0_c12_c12_4 at min EL1: ICV_CTLR_EL1 REG_ICC_CTLR_EL1 =50788 /* 50788 */, @@ -606,12 +579,10 @@ enum SystemReg { REG_ICV_IGRPEN1_EL1 =50791 /* 50791 */, // S3_0_c12_c12_7 at min EL1: ICV_IGRPEN1_EL1 REG_ICC_IGRPEN1_EL1 =50791 /* 50791 */, REG_ICC_SEIEN_EL1 =50792 /* 50792 */, - REG_CONTEXTIDR_EL21 =50817 /* 50817 */, // S3_0_c13_c0_1 at min EL1: CONTEXTIDR_EL21 - REG_CONTEXTIDR_EL1 =50817 /* 50817 */, + REG_CONTEXTIDR_EL1 =50817 /* 50817 */, // S3_0_c13_c0_1 at min EL1: CONTEXTIDR_EL1 REG_TPIDR_EL1 =50820 /* 50820 */, // S3_0_c13_c0_4 at min EL1: TPIDR_EL1 - REG_SCXTNUM_EL21 =50823 /* 50823 */, // S3_0_c13_c0_7 at min EL1: SCXTNUM_EL21 - REG_SCXTNUM_EL1 =50823 /* 50823 */, - REG_REDIR_CNTKCTL_EL1 =50952 /* 50952 */, // S3_0_c14_c1_0 at min EL1: REDIR_CNTKCTL_EL1 + REG_SCXTNUM_EL1 =50823 /* 50823 */, // S3_0_c13_c0_7 at min EL1: SCXTNUM_EL1 + REG_CNTHCTL_EL21 =50952 /* 50952 */, // S3_0_c14_c1_0 at min EL1: CNTHCTL_EL21 REG_CNTKCTL_EL1 =50952 /* 50952 */, REG_HID0 =51072 /* 51072 */, // S3_0_c15_c0_0 at min EL1: HID0 REG_HID25 =51074 /* 51074 */, // S3_0_c15_c0_2 at min EL1: HID25 @@ -658,79 +629,79 @@ enum SystemReg { REG_HID17 =51197 /* 51197 */, // S3_0_c15_c15_5 at min EL1: HID17 REG_HID24 =51198 /* 51198 */, // S3_0_c15_c15_6 at min EL1: HID24 REG_HID35 =51199 /* 51199 */, // S3_0_c15_c15_7 at min EL1: HID35 - REG_CCSIDRPL1_I_EL1 =51200 /* 51200 */, // S3_1_c0_c0_0 at min EL1: CCSIDRPL1_I_EL1 + REG_CCSIDR_EL1 =51200 /* 51200 */, // S3_1_c0_c0_0 at min EL1: CCSIDR_EL1 REG_CLIDR_EL1 =51201 /* 51201 */, // S3_1_c0_c0_1 at min EL1: CLIDR_EL1 REG_SMIDR_EL1 =51206 /* 51206 */, // S3_1_c0_c0_6 at min EL1: SMIDR_EL1 REG_AIDR_EL1 =51207 /* 51207 */, // S3_1_c0_c0_7 at min EL1: AIDR_EL1 REG_PMCR0_EL1 =53120 /* 53120 */, // S3_1_c15_c0_0 at min EL1: PMCR0_EL1 REG_APPL_CONTEXTPTR =53121 /* 53121 */, // S3_1_c15_c0_1 at min EL1: APPL_CONTEXTPTR - REG_LD_LATPROF_CTL_EL21 =53122 /* 53122 */, // S3_1_c15_c0_2 at min EL1: LD_LATPROF_CTL_EL21 + REG_LD_LATPROF_CTL_EL1 =53122 /* 53122 */, // S3_1_c15_c0_2 at min EL1: LD_LATPROF_CTL_EL1 REG_AON_CPU_MSTALL_CTL01_EL1 =53123 /* 53123 */, // S3_1_c15_c0_3 at min EL1: AON_CPU_MSTALL_CTL01_EL1 REG_PM_MEMFLT_CTL23_EL1 =53124 /* 53124 */, // S3_1_c15_c0_4 at min EL1: PM_MEMFLT_CTL23_EL1 - REG_REDIR_ACNTV_CTL_EL0 =53125 /* 53125 */, // S3_1_c15_c0_5 at min EL1: REDIR_ACNTV_CTL_EL0 - REG_LCL_ACNTVCTSS_NOREDIR_EL0 =53126 /* 53126 */, // S3_1_c15_c0_6 at min EL1: LCL_ACNTVCTSS_NOREDIR_EL0 - REG_PMCR1_EL21 =53128 /* 53128 */, // S3_1_c15_c1_0 at min EL1: PMCR1_EL21 + REG_AGTCNTHV_CTL_EL21 =53125 /* 53125 */, // S3_1_c15_c0_5 at min EL1: AGTCNTHV_CTL_EL21 + REG_AGTCNTVCTSS_NOREDIR_EL0 =53126 /* 53126 */, // S3_1_c15_c0_6 at min EL1: AGTCNTVCTSS_NOREDIR_EL0 + REG_PMCR1_EL1 =53128 /* 53128 */, // S3_1_c15_c1_0 at min EL1: PMCR1_EL1 REG_LD_LATPROF_CTR_EL1 =53130 /* 53130 */, // S3_1_c15_c1_2 at min EL1: LD_LATPROF_CTR_EL1 REG_AON_CPU_MSTALL_CTL23_EL1 =53131 /* 53131 */, // S3_1_c15_c1_3 at min EL1: AON_CPU_MSTALL_CTL23_EL1 REG_PM_MEMFLT_CTL45_EL1 =53132 /* 53132 */, // S3_1_c15_c1_4 at min EL1: PM_MEMFLT_CTL45_EL1 - REG_AGTCNTRDIR_EL21 =53133 /* 53133 */, // S3_1_c15_c1_5 at min EL1: AGTCNTRDIR_EL21 - REG_AGTCNTKCTL_NOREDIR_EL1 =53134 /* 53134 */, // S3_1_c15_c1_6 at min EL1: AGTCNTKCTL_NOREDIR_EL1 + REG_AGTCNTRDIR_EL1 =53133 /* 53133 */, // S3_1_c15_c1_5 at min EL1: AGTCNTRDIR_EL1 + REG_AGTCNTHCTL_NOREDIR_EL21 =53134 /* 53134 */, // S3_1_c15_c1_6 at min EL1: AGTCNTHCTL_NOREDIR_EL21 REG_PMCR2_EL1 =53136 /* 53136 */, // S3_1_c15_c2_0 at min EL1: PMCR2_EL1 REG_LD_LATPROF_STS_EL1 =53138 /* 53138 */, // S3_1_c15_c2_2 at min EL1: LD_LATPROF_STS_EL1 REG_AON_CPU_MSTALL_CTL45_EL1 =53139 /* 53139 */, // S3_1_c15_c2_3 at min EL1: AON_CPU_MSTALL_CTL45_EL1 - REG_REDIR_ACNTHP_CVAL_EL2 =53140 /* 53140 */, // S3_1_c15_c2_4 at min EL2: REDIR_ACNTHP_CVAL_EL2 - REG_LCL_CNTVCT_NOREDIR_EL0 =53141 /* 53141 */, // S3_1_c15_c2_5 at min EL1: LCL_CNTVCT_NOREDIR_EL0 - REG_AGTCNTP_CVAL_NOREDIR_EL0 =53142 /* 53142 */, // S3_1_c15_c2_6 at min EL1: AGTCNTP_CVAL_NOREDIR_EL0 + REG_AGTCNTHP_CVAL_EL2 =53140 /* 53140 */, // S3_1_c15_c2_4 at min EL2: AGTCNTHP_CVAL_EL2 + REG_CNTVCT_NOREDIR_EL0 =53141 /* 53141 */, // S3_1_c15_c2_5 at min EL1: CNTVCT_NOREDIR_EL0 + REG_AGTCNTHP_CVAL_NOREDIR_EL21 =53142 /* 53142 */, // S3_1_c15_c2_6 at min EL1: AGTCNTHP_CVAL_NOREDIR_EL21 REG_PMCR3_EL1 =53144 /* 53144 */, // S3_1_c15_c3_0 at min EL1: PMCR3_EL1 REG_LD_LATPROF_INF_EL1 =53146 /* 53146 */, // S3_1_c15_c3_2 at min EL1: LD_LATPROF_INF_EL1 REG_AON_CPU_MSTALL_CTL67_EL1 =53147 /* 53147 */, // S3_1_c15_c3_3 at min EL1: AON_CPU_MSTALL_CTL67_EL1 - REG_REDIR_ACNTHP_TVAL_EL2 =53148 /* 53148 */, // S3_1_c15_c3_4 at min EL2: REDIR_ACNTHP_TVAL_EL2 - REG_LCL_CNTPCTSS_NOREDIR_EL0 =53149 /* 53149 */, // S3_1_c15_c3_5 at min EL1: LCL_CNTPCTSS_NOREDIR_EL0 - REG_AGTCNTP_TVAL_NOREDIR_EL0 =53150 /* 53150 */, // S3_1_c15_c3_6 at min EL1: AGTCNTP_TVAL_NOREDIR_EL0 + REG_AGTCNTHP_TVAL_EL2 =53148 /* 53148 */, // S3_1_c15_c3_4 at min EL2: AGTCNTHP_TVAL_EL2 + REG_CNTPCTSS_NOREDIR_EL0 =53149 /* 53149 */, // S3_1_c15_c3_5 at min EL1: CNTPCTSS_NOREDIR_EL0 + REG_AGTCNTHP_TVAL_NOREDIR_EL21 =53150 /* 53150 */, // S3_1_c15_c3_6 at min EL1: AGTCNTHP_TVAL_NOREDIR_EL21 REG_PMCR4_EL1 =53152 /* 53152 */, // S3_1_c15_c4_0 at min EL1: PMCR4_EL1 REG_LD_LATPROF_CTL_EL2 =53154 /* 53154 */, // S3_1_c15_c4_2 at min EL2: LD_LATPROF_CTL_EL2 REG_AON_CPU_MEMFLT_CTL01_EL1 =53155 /* 53155 */, // S3_1_c15_c4_3 at min EL1: AON_CPU_MEMFLT_CTL01_EL1 - REG_REDIR_ACNTHP_CTL_EL2 =53156 /* 53156 */, // S3_1_c15_c4_4 at min EL2: REDIR_ACNTHP_CTL_EL2 - REG_LCL_CNTVCTSS_NOREDIR_EL0 =53157 /* 53157 */, // S3_1_c15_c4_5 at min EL1: LCL_CNTVCTSS_NOREDIR_EL0 - REG_AGTCNTP_CTL_NOREDIR_EL0 =53158 /* 53158 */, // S3_1_c15_c4_6 at min EL1: AGTCNTP_CTL_NOREDIR_EL0 + REG_AGTCNTHP_CTL_EL2 =53156 /* 53156 */, // S3_1_c15_c4_4 at min EL2: AGTCNTHP_CTL_EL2 + REG_CNTVCTSS_NOREDIR_EL0 =53157 /* 53157 */, // S3_1_c15_c4_5 at min EL1: CNTVCTSS_NOREDIR_EL0 + REG_AGTCNTHP_CTL_NOREDIR_EL21 =53158 /* 53158 */, // S3_1_c15_c4_6 at min EL1: AGTCNTHP_CTL_NOREDIR_EL21 REG_PMESR0_EL1 =53160 /* 53160 */, // S3_1_c15_c5_0 at min EL1: PMESR0_EL1 REG_LD_LATPROF_CMD_EL1 =53162 /* 53162 */, // S3_1_c15_c5_2 at min EL1: LD_LATPROF_CMD_EL1 REG_AON_CPU_MEMFLT_CTL23_EL1 =53163 /* 53163 */, // S3_1_c15_c5_3 at min EL1: AON_CPU_MEMFLT_CTL23_EL1 - REG_REDIR_ACNTHV_CVAL_EL2 =53164 /* 53164 */, // S3_1_c15_c5_4 at min EL2: REDIR_ACNTHV_CVAL_EL2 - REG_AGTCNTV_CVAL_NOREDIR_EL0 =53166 /* 53166 */, // S3_1_c15_c5_6 at min EL1: AGTCNTV_CVAL_NOREDIR_EL0 + REG_AGTCNTHV_CVAL_EL2 =53164 /* 53164 */, // S3_1_c15_c5_4 at min EL2: AGTCNTHV_CVAL_EL2 + REG_AGTCNTHV_CVAL_NOREDIR_EL21 =53166 /* 53166 */, // S3_1_c15_c5_6 at min EL1: AGTCNTHV_CVAL_NOREDIR_EL21 REG_PMESR1_EL1 =53168 /* 53168 */, // S3_1_c15_c6_0 at min EL1: PMESR1_EL1 REG_PMCR1_EL2 =53170 /* 53170 */, // S3_1_c15_c6_2 at min EL2: PMCR1_EL2 REG_AON_CPU_MEMFLT_CTL45_EL1 =53171 /* 53171 */, // S3_1_c15_c6_3 at min EL1: AON_CPU_MEMFLT_CTL45_EL1 - REG_REDIR_ACNTHV_TVAL_EL2 =53172 /* 53172 */, // S3_1_c15_c6_4 at min EL2: REDIR_ACNTHV_TVAL_EL2 - REG_CNTKCTL_NOREDIR_EL1 =53173 /* 53173 */, // S3_1_c15_c6_5 at min EL1: CNTKCTL_NOREDIR_EL1 - REG_AGTCNTV_TVAL_NOREDIR_EL0 =53174 /* 53174 */, // S3_1_c15_c6_6 at min EL1: AGTCNTV_TVAL_NOREDIR_EL0 + REG_AGTCNTHV_TVAL_EL2 =53172 /* 53172 */, // S3_1_c15_c6_4 at min EL2: AGTCNTHV_TVAL_EL2 + REG_CNTHCTL_NOREDIR_EL21 =53173 /* 53173 */, // S3_1_c15_c6_5 at min EL1: CNTHCTL_NOREDIR_EL21 + REG_AGTCNTHV_TVAL_NOREDIR_EL21 =53174 /* 53174 */, // S3_1_c15_c6_6 at min EL1: AGTCNTHV_TVAL_NOREDIR_EL21 REG_OPMAT0_EL1 =53176 /* 53176 */, // S3_1_c15_c7_0 at min EL1: OPMAT0_EL1 REG_PMCR1_EL12 =53178 /* 53178 */, // S3_1_c15_c7_2 at min EL2: PMCR1_EL12 REG_AON_CPU_MEMFLT_CTL67_EL1 =53179 /* 53179 */, // S3_1_c15_c7_3 at min EL1: AON_CPU_MEMFLT_CTL67_EL1 - REG_REDIR_ACNTHV_CTL_EL2 =53180 /* 53180 */, // S3_1_c15_c7_4 at min EL2: REDIR_ACNTHV_CTL_EL2 - REG_CNTP_CVAL_NOREDIR_EL0 =53181 /* 53181 */, // S3_1_c15_c7_5 at min EL1: CNTP_CVAL_NOREDIR_EL0 - REG_AGTCNTV_CTL_NOREDIR_EL0 =53182 /* 53182 */, // S3_1_c15_c7_6 at min EL1: AGTCNTV_CTL_NOREDIR_EL0 + REG_AGTCNTHV_CTL_EL2 =53180 /* 53180 */, // S3_1_c15_c7_4 at min EL2: AGTCNTHV_CTL_EL2 + REG_CNTHP_CVAL_NOREDIR_EL21 =53181 /* 53181 */, // S3_1_c15_c7_5 at min EL1: CNTHP_CVAL_NOREDIR_EL21 + REG_AGTCNTHV_CTL_NOREDIR_EL21 =53182 /* 53182 */, // S3_1_c15_c7_6 at min EL1: AGTCNTHV_CTL_NOREDIR_EL21 REG_OPMAT1_EL1 =53184 /* 53184 */, // S3_1_c15_c8_0 at min EL1: OPMAT1_EL1 REG_PMCR1_GL12 =53186 /* 53186 */, // S3_1_c15_c8_2 at min EL2: PMCR1_GL12 REG_AON_CPU_MSTALL_CTR0_EL1 =53187 /* 53187 */, // S3_1_c15_c8_3 at min EL1: AON_CPU_MSTALL_CTR0_EL1 - REG_REDIR_ACNTFRQ_EL0 =53188 /* 53188 */, // S3_1_c15_c8_4 at min EL1: REDIR_ACNTFRQ_EL0 - REG_CNTP_TVAL_NOREDIR_EL0 =53189 /* 53189 */, // S3_1_c15_c8_5 at min EL1: CNTP_TVAL_NOREDIR_EL0 - REG_LCL_CNTPCT_NOREDIR_EL0 =53190 /* 53190 */, // S3_1_c15_c8_6 at min EL1: LCL_CNTPCT_NOREDIR_EL0 + REG_AGTCNTFRQ_EL0 =53188 /* 53188 */, // S3_1_c15_c8_4 at min EL1: AGTCNTFRQ_EL0 + REG_CNTHP_TVAL_NOREDIR_EL21 =53189 /* 53189 */, // S3_1_c15_c8_5 at min EL1: CNTHP_TVAL_NOREDIR_EL21 + REG_CNTPCT_NOREDIR_EL0 =53190 /* 53190 */, // S3_1_c15_c8_6 at min EL1: CNTPCT_NOREDIR_EL0 REG_OPMSK0_EL1 =53192 /* 53192 */, // S3_1_c15_c9_0 at min EL1: OPMSK0_EL1 REG_LD_LATPROF_CTL_EL12 =53194 /* 53194 */, // S3_1_c15_c9_2 at min EL2: LD_LATPROF_CTL_EL12 REG_AON_CPU_MSTALL_CTR1_EL1 =53195 /* 53195 */, // S3_1_c15_c9_3 at min EL1: AON_CPU_MSTALL_CTR1_EL1 REG_AGTCNTVOFF_EL2 =53196 /* 53196 */, // S3_1_c15_c9_4 at min EL2: AGTCNTVOFF_EL2 - REG_CNTP_CTL_NOREDIR_EL0 =53197 /* 53197 */, // S3_1_c15_c9_5 at min EL1: CNTP_CTL_NOREDIR_EL0 - REG_CNTV_CTL_NOREDIR_EL0 =53198 /* 53198 */, // S3_1_c15_c9_6 at min EL1: CNTV_CTL_NOREDIR_EL0 + REG_CNTHP_CTL_NOREDIR_EL21 =53197 /* 53197 */, // S3_1_c15_c9_5 at min EL1: CNTHP_CTL_NOREDIR_EL21 + REG_CNTHV_CTL_NOREDIR_EL21 =53198 /* 53198 */, // S3_1_c15_c9_6 at min EL1: CNTHV_CTL_NOREDIR_EL21 REG_OPMSK1_EL1 =53200 /* 53200 */, // S3_1_c15_c10_0 at min EL1: OPMSK1_EL1 REG_LD_LATPROF_INF_EL2 =53202 /* 53202 */, // S3_1_c15_c10_2 at min EL2: LD_LATPROF_INF_EL2 REG_AON_CPU_MSTALL_CTR2_EL1 =53203 /* 53203 */, // S3_1_c15_c10_3 at min EL1: AON_CPU_MSTALL_CTR2_EL1 - REG_REDIR_ACNTP_CVAL_EL0 =53204 /* 53204 */, // S3_1_c15_c10_4 at min EL1: REDIR_ACNTP_CVAL_EL0 - REG_CNTV_CVAL_NOREDIR_EL0 =53205 /* 53205 */, // S3_1_c15_c10_5 at min EL1: CNTV_CVAL_NOREDIR_EL0 - REG_LCL_ACNTPCT_NOREDIR_EL0 =53206 /* 53206 */, // S3_1_c15_c10_6 at min EL1: LCL_ACNTPCT_NOREDIR_EL0 + REG_AGTCNTHP_CVAL_EL21 =53204 /* 53204 */, // S3_1_c15_c10_4 at min EL1: AGTCNTHP_CVAL_EL21 + REG_CNTHV_CVAL_NOREDIR_EL21 =53205 /* 53205 */, // S3_1_c15_c10_5 at min EL1: CNTHV_CVAL_NOREDIR_EL21 + REG_AGTCNTPCT_NOREDIR_EL0 =53206 /* 53206 */, // S3_1_c15_c10_6 at min EL1: AGTCNTPCT_NOREDIR_EL0 REG_AON_CPU_MSTALL_CTR3_EL1 =53211 /* 53211 */, // S3_1_c15_c11_3 at min EL1: AON_CPU_MSTALL_CTR3_EL1 - REG_REDIR_ACNTP_TVAL_EL0 =53212 /* 53212 */, // S3_1_c15_c11_4 at min EL1: REDIR_ACNTP_TVAL_EL0 - REG_CNTV_TVAL_NOREDIR_EL0 =53213 /* 53213 */, // S3_1_c15_c11_5 at min EL1: CNTV_TVAL_NOREDIR_EL0 + REG_AGTCNTHP_TVAL_EL21 =53212 /* 53212 */, // S3_1_c15_c11_4 at min EL1: AGTCNTHP_TVAL_EL21 + REG_CNTHV_TVAL_NOREDIR_EL21 =53213 /* 53213 */, // S3_1_c15_c11_5 at min EL1: CNTHV_TVAL_NOREDIR_EL21 REG_VMSA_HV_LOCK_EL2 =53214 /* 53214 */, // S3_1_c15_c11_6 at min EL2: VMSA_HV_LOCK_EL2 REG_PMSWCTRL_EL1 =53216 /* 53216 */, // S3_1_c15_c12_0 at min EL1: PMSWCTRL_EL1 REG_PMCR5_EL0 =53217 /* 53217 */, // S3_1_c15_c12_1 at min EL1: PMCR5_EL0 @@ -740,19 +711,19 @@ enum SystemReg { REG_VMSA_NV_LOCK_EL2 =53222 /* 53222 */, // S3_1_c15_c12_6 at min EL2: VMSA_NV_LOCK_EL2 REG_PMSR_EL1 =53224 /* 53224 */, // S3_1_c15_c13_0 at min EL1: PMSR_EL1 REG_AON_CPU_MSTALL_CTR5_EL1 =53227 /* 53227 */, // S3_1_c15_c13_3 at min EL1: AON_CPU_MSTALL_CTR5_EL1 - REG_REDIR_ACNTP_CTL_EL0 =53228 /* 53228 */, // S3_1_c15_c13_4 at min EL1: REDIR_ACNTP_CTL_EL0 + REG_AGTCNTHP_CTL_EL21 =53228 /* 53228 */, // S3_1_c15_c13_4 at min EL1: AGTCNTHP_CTL_EL21 REG_PMCOMPARE5_EL1 =53229 /* 53229 */, // S3_1_c15_c13_5 at min EL1: PMCompare5_EL1 REG_PMCOMPARE6_EL1 =53230 /* 53230 */, // S3_1_c15_c13_6 at min EL1: PMCompare6_EL1 REG_PMCOMPARE7_EL1 =53231 /* 53231 */, // S3_1_c15_c13_7 at min EL1: PMCompare7_EL1 REG_PMCR_BVRNG4_EL1 =53232 /* 53232 */, // S3_1_c15_c14_0 at min EL1: PMCR_BVRNG4_EL1 REG_PM_PMI_PC =53233 /* 53233 */, // S3_1_c15_c14_1 at min EL1: PM_PMI_PC REG_AON_CPU_MSTALL_CTR6_EL1 =53235 /* 53235 */, // S3_1_c15_c14_3 at min EL1: AON_CPU_MSTALL_CTR6_EL1 - REG_REDIR_ACNTV_CVAL_EL0 =53236 /* 53236 */, // S3_1_c15_c14_4 at min EL1: REDIR_ACNTV_CVAL_EL0 - REG_LCL_ACNTVCT_NOREDIR_EL0 =53237 /* 53237 */, // S3_1_c15_c14_5 at min EL1: LCL_ACNTVCT_NOREDIR_EL0 + REG_AGTCNTHV_CVAL_EL21 =53236 /* 53236 */, // S3_1_c15_c14_4 at min EL1: AGTCNTHV_CVAL_EL21 + REG_AGTCNTVCT_NOREDIR_EL0 =53237 /* 53237 */, // S3_1_c15_c14_5 at min EL1: AGTCNTVCT_NOREDIR_EL0 REG_PMCR_BVRNG5_EL1 =53240 /* 53240 */, // S3_1_c15_c15_0 at min EL1: PMCR_BVRNG5_EL1 REG_AON_CPU_MSTALL_CTR7_EL1 =53243 /* 53243 */, // S3_1_c15_c15_3 at min EL1: AON_CPU_MSTALL_CTR7_EL1 - REG_REDIR_ACNTV_TVAL_EL0 =53244 /* 53244 */, // S3_1_c15_c15_4 at min EL1: REDIR_ACNTV_TVAL_EL0 - REG_LCL_ACNTPCTSS_NOREDIR_EL0 =53245 /* 53245 */, // S3_1_c15_c15_5 at min EL1: LCL_ACNTPCTSS_NOREDIR_EL0 + REG_AGTCNTHV_TVAL_EL21 =53244 /* 53244 */, // S3_1_c15_c15_4 at min EL1: AGTCNTHV_TVAL_EL21 + REG_AGTCNTPCTSS_NOREDIR_EL0 =53245 /* 53245 */, // S3_1_c15_c15_5 at min EL1: AGTCNTPCTSS_NOREDIR_EL0 REG_CSSELR_EL1 =53248 /* 53248 */, // S3_2_c0_c0_0 at min EL1: CSSELR_EL1 REG_PMC0 =55168 /* 55168 */, // S3_2_c15_c0_0 at min EL1: PMC0 REG_UPMCFILTER0 =55169 /* 55169 */, // S3_2_c15_c0_1 at min EL1: UPMCFILTER0 @@ -787,8 +758,10 @@ enum SystemReg { REG_TCO =55831 /* 55831 */, REG_FPCR =55840 /* 55840 */, // S3_3_c4_c4_0 at min EL1: FPCR REG_FPSR =55841 /* 55841 */, // S3_3_c4_c4_1 at min EL1: FPSR - REG_DSPSR_EL0 =55848 /* 55848 */, // S3_3_c4_c5_0 at min EL1: DSPSR_EL0 - REG_DLR_EL0 =55849 /* 55849 */, // S3_3_c4_c5_1 at min EL1: DLR_EL0 + REG_DSPSR =55848 /* 55848 */, // S3_3_c4_c5_0 at min EL0: DSPSR + REG_DSPSR_EL0 =55848 /* 55848 */, + REG_DLR =55849 /* 55849 */, // S3_3_c4_c5_1 at min EL0: DLR + REG_DLR_EL0 =55849 /* 55849 */, REG_PMCR_EL0 =56544 /* 56544 */, REG_PMCNTENSET_EL0 =56545 /* 56545 */, REG_PMCNTENCLR_EL0 =56546 /* 56546 */, @@ -847,24 +820,22 @@ enum SystemReg { REG_AMEVTYPER113_EL0 =57085 /* 57085 */, REG_AMEVTYPER114_EL0 =57086 /* 57086 */, REG_AMEVTYPER115_EL0 =57087 /* 57087 */, - REG_REDIR_CNTFRQ_EL0 =57088 /* 57088 */, // S3_3_c14_c0_0 at min EL1: REDIR_CNTFRQ_EL0 - REG_CNTFRQ_EL0 =57088 /* 57088 */, - REG_REDIR_LCL_CNTPCT_EL0 =57089 /* 57089 */, // S3_3_c14_c0_1 at min EL1: REDIR_LCL_CNTPCT_EL0 - REG_CNTPCT_EL0 =57089 /* 57089 */, - REG_REDIR_LCL_CNTVCT_EL0 =57090 /* 57090 */, // S3_3_c14_c0_2 at min EL1: REDIR_LCL_CNTVCT_EL0 - REG_REDIR_LCL_CNTPCTSS_EL0 =57093 /* 57093 */, // S3_3_c14_c0_5 at min EL1: REDIR_LCL_CNTPCTSS_EL0 - REG_REDIR_LCL_CNTVCTSS_EL0 =57094 /* 57094 */, // S3_3_c14_c0_6 at min EL1: REDIR_LCL_CNTVCTSS_EL0 - REG_REDIR_CNTP_TVAL_EL0 =57104 /* 57104 */, // S3_3_c14_c2_0 at min EL1: REDIR_CNTP_TVAL_EL0 + REG_CNTFRQ_EL0 =57088 /* 57088 */, // S3_3_c14_c0_0 at min EL1: CNTFRQ_EL0 + REG_CNTPCT_EL0 =57089 /* 57089 */, // S3_3_c14_c0_1 at min EL1: CNTPCT_EL0 + REG_CNTVCT_EL0 =57090 /* 57090 */, // S3_3_c14_c0_2 at min EL1: CNTVCT_EL0 + REG_CNTPCTSS_EL0 =57093 /* 57093 */, // S3_3_c14_c0_5 at min EL1: CNTPCTSS_EL0 + REG_CNTVCTSS_EL0 =57094 /* 57094 */, // S3_3_c14_c0_6 at min EL1: CNTVCTSS_EL0 + REG_CNTHP_TVAL_EL21 =57104 /* 57104 */, // S3_3_c14_c2_0 at min EL1: CNTHP_TVAL_EL21 REG_CNTP_TVAL_EL0 =57104 /* 57104 */, - REG_REDIR_CNTP_CTL_EL0 =57105 /* 57105 */, // S3_3_c14_c2_1 at min EL1: REDIR_CNTP_CTL_EL0 + REG_CNTHP_CTL_EL21 =57105 /* 57105 */, // S3_3_c14_c2_1 at min EL1: CNTHP_CTL_EL21 REG_CNTP_CTL_EL0 =57105 /* 57105 */, - REG_REDIR_CNTP_CVAL_EL0 =57106 /* 57106 */, // S3_3_c14_c2_2 at min EL1: REDIR_CNTP_CVAL_EL0 + REG_CNTHP_CVAL_EL21 =57106 /* 57106 */, // S3_3_c14_c2_2 at min EL1: CNTHP_CVAL_EL21 REG_CNTP_CVAL_EL0 =57106 /* 57106 */, - REG_REDIR_CNTV_TVAL_EL0 =57112 /* 57112 */, // S3_3_c14_c3_0 at min EL1: REDIR_CNTV_TVAL_EL0 + REG_CNTHV_TVAL_EL21 =57112 /* 57112 */, // S3_3_c14_c3_0 at min EL1: CNTHV_TVAL_EL21 REG_CNTV_TVAL_EL0 =57112 /* 57112 */, - REG_REDIR_CNTV_CTL_EL0 =57113 /* 57113 */, // S3_3_c14_c3_1 at min EL1: REDIR_CNTV_CTL_EL0 + REG_CNTHV_CTL_EL21 =57113 /* 57113 */, // S3_3_c14_c3_1 at min EL1: CNTHV_CTL_EL21 REG_CNTV_CTL_EL0 =57113 /* 57113 */, - REG_REDIR_CNTV_CVAL_EL0 =57114 /* 57114 */, // S3_3_c14_c3_2 at min EL1: REDIR_CNTV_CVAL_EL0 + REG_CNTHV_CVAL_EL21 =57114 /* 57114 */, // S3_3_c14_c3_2 at min EL1: CNTHV_CVAL_EL21 REG_CNTV_CVAL_EL0 =57114 /* 57114 */, REG_PMEVCNTR0_EL0 =57152 /* 57152 */, REG_PMEVCNTR1_EL0 =57153 /* 57153 */, @@ -1013,10 +984,8 @@ enum SystemReg { REG_DACR32_EL2 =57728 /* 57728 */, // S3_4_c3_c0_0 at min EL2: DACR32_EL2 REG_HDFGRTR_EL2 =57740 /* 57740 */, // S3_4_c3_c1_4 at min EL2: HDFGRTR_EL2 REG_HDFGWTR_EL2 =57741 /* 57741 */, // S3_4_c3_c1_5 at min EL2: HDFGWTR_EL2 - REG_SPSR_NV_EL21 =57856 /* 57856 */, // S3_4_c4_c0_0 at min EL1: SPSR_NV_EL21 - REG_SPSR_EL2 =57856 /* 57856 */, - REG_ELR_NV_EL21 =57857 /* 57857 */, // S3_4_c4_c0_1 at min EL1: ELR_NV_EL21 - REG_ELR_EL2 =57857 /* 57857 */, + REG_SPSR_EL2 =57856 /* 57856 */, // S3_4_c4_c0_0 at min EL2: SPSR_EL2 + REG_ELR_EL2 =57857 /* 57857 */, // S3_4_c4_c0_1 at min EL2: ELR_EL2 REG_SP_EL1 =57864 /* 57864 */, // S3_4_c4_c1_0 at min EL1: SP_EL1 REG_SPSR_IRQ =57880 /* 57880 */, // S3_4_c4_c3_0 at min EL1: SPSR_irq REG_SPSR_ABT =57881 /* 57881 */, // S3_4_c4_c3_1 at min EL1: SPSR_abt @@ -1025,13 +994,11 @@ enum SystemReg { REG_IFSR32_EL2 =57985 /* 57985 */, // S3_4_c5_c0_1 at min EL2: IFSR32_EL2 REG_AFSR0_EL2 =57992 /* 57992 */, // S3_4_c5_c1_0 at min EL2: AFSR0_EL2 REG_AFSR1_EL2 =57993 /* 57993 */, // S3_4_c5_c1_1 at min EL2: AFSR1_EL2 - REG_ESR_NV_EL21 =58000 /* 58000 */, // S3_4_c5_c2_0 at min EL1: ESR_NV_EL21 - REG_ESR_EL2 =58000 /* 58000 */, + REG_ESR_EL2 =58000 /* 58000 */, // S3_4_c5_c2_0 at min EL2: ESR_EL2 REG_VSESR_EL2 =58003 /* 58003 */, // S3_4_c5_c2_3 at min EL2: VSESR_EL2 REG_FPEXC32_EL2 =58008 /* 58008 */, // S3_4_c5_c3_0 at min EL2: FPEXC32_EL2 REG_TFSR_EL2 =58032 /* 58032 */, - REG_FAR_NV_EL21 =58112 /* 58112 */, // S3_4_c6_c0_0 at min EL1: FAR_NV_EL21 - REG_FAR_EL2 =58112 /* 58112 */, + REG_FAR_EL2 =58112 /* 58112 */, // S3_4_c6_c0_0 at min EL2: FAR_EL2 REG_HPFAR_EL2 =58116 /* 58116 */, // S3_4_c6_c0_4 at min EL2: HPFAR_EL2 REG_PMSCR_EL2 =58568 /* 58568 */, REG_MAIR_EL2 =58640 /* 58640 */, // S3_4_c10_c2_0 at min EL2: MAIR_EL2 @@ -1087,20 +1054,13 @@ enum SystemReg { REG_TPIDR_EL2 =59010 /* 59010 */, // S3_4_c13_c0_2 at min EL2: TPIDR_EL2 REG_SCXTNUM_EL2 =59015 /* 59015 */, // S3_4_c13_c0_7 at min EL2: SCXTNUM_EL2 REG_CNTVOFF_EL2 =59139 /* 59139 */, // S3_4_c14_c0_3 at min EL2: CNTVOFF_EL2 - REG_REDIR_CNTHCTL_EL2 =59144 /* 59144 */, // S3_4_c14_c1_0 at min EL2: REDIR_CNTHCTL_EL2 - REG_CNTHCTL_EL2 =59144 /* 59144 */, - REG_REDIR_CNTHP_TVAL_EL2 =59152 /* 59152 */, // S3_4_c14_c2_0 at min EL2: REDIR_CNTHP_TVAL_EL2 - REG_CNTHP_TVAL_EL2 =59152 /* 59152 */, - REG_REDIR_CNTHP_CTL_EL2 =59153 /* 59153 */, // S3_4_c14_c2_1 at min EL2: REDIR_CNTHP_CTL_EL2 - REG_CNTHP_CTL_EL2 =59153 /* 59153 */, - REG_REDIR_CNTHP_CVAL_EL2 =59154 /* 59154 */, // S3_4_c14_c2_2 at min EL2: REDIR_CNTHP_CVAL_EL2 - REG_CNTHP_CVAL_EL2 =59154 /* 59154 */, - REG_REDIR_CNTHV_TVAL_EL2 =59160 /* 59160 */, // S3_4_c14_c3_0 at min EL2: REDIR_CNTHV_TVAL_EL2 - REG_CNTHV_TVAL_EL2 =59160 /* 59160 */, - REG_REDIR_CNTHV_CTL_EL2 =59161 /* 59161 */, // S3_4_c14_c3_1 at min EL2: REDIR_CNTHV_CTL_EL2 - REG_CNTHV_CTL_EL2 =59161 /* 59161 */, - REG_REDIR_CNTHV_CVAL_EL2 =59162 /* 59162 */, // S3_4_c14_c3_2 at min EL2: REDIR_CNTHV_CVAL_EL2 - REG_CNTHV_CVAL_EL2 =59162 /* 59162 */, + REG_CNTHCTL_EL2 =59144 /* 59144 */, // S3_4_c14_c1_0 at min EL2: CNTHCTL_EL2 + REG_CNTHP_TVAL_EL2 =59152 /* 59152 */, // S3_4_c14_c2_0 at min EL2: CNTHP_TVAL_EL2 + REG_CNTHP_CTL_EL2 =59153 /* 59153 */, // S3_4_c14_c2_1 at min EL2: CNTHP_CTL_EL2 + REG_CNTHP_CVAL_EL2 =59154 /* 59154 */, // S3_4_c14_c2_2 at min EL2: CNTHP_CVAL_EL2 + REG_CNTHV_TVAL_EL2 =59160 /* 59160 */, // S3_4_c14_c3_0 at min EL2: CNTHV_TVAL_EL2 + REG_CNTHV_CTL_EL2 =59161 /* 59161 */, // S3_4_c14_c3_1 at min EL2: CNTHV_CTL_EL2 + REG_CNTHV_CVAL_EL2 =59162 /* 59162 */, // S3_4_c14_c3_2 at min EL2: CNTHV_CVAL_EL2 REG_CNTHVS_TVAL_EL2 =59168 /* 59168 */, REG_CNTHVS_CTL_EL2 =59169 /* 59169 */, REG_CNTHVS_CVAL_EL2 =59170 /* 59170 */, @@ -1109,21 +1069,21 @@ enum SystemReg { REG_CNTHPS_CVAL_EL2 =59178 /* 59178 */, REG_FED_ERR_STS =59264 /* 59264 */, // S3_4_c15_c0_0 at min EL1: FED_ERR_STS REG_FED_ERR_CTL =59265 /* 59265 */, // S3_4_c15_c0_1 at min EL1: FED_ERR_CTL - REG_APCTL_EL21 =59268 /* 59268 */, // S3_4_c15_c0_4 at min EL1: APCTL_EL21 - REG_KERNKEYLO_EL21 =59272 /* 59272 */, // S3_4_c15_c1_0 at min EL1: KERNKEYLo_EL21 - REG_KERNKEYHI_EL21 =59273 /* 59273 */, // S3_4_c15_c1_1 at min EL1: KERNKEYHi_EL21 - REG_VMSA_LOCK_EL1 =59274 /* 59274 */, // S3_4_c15_c1_2 at min EL1: VMSA_LOCK_EL1 + REG_APCTL_EL1 =59268 /* 59268 */, // S3_4_c15_c0_4 at min EL1: APCTL_EL1 + REG_KERNKEYLO_EL1 =59272 /* 59272 */, // S3_4_c15_c1_0 at min EL1: KERNKEYLo_EL1 + REG_KERNKEYHI_EL1 =59273 /* 59273 */, // S3_4_c15_c1_1 at min EL1: KERNKEYHi_EL1 + REG_VMSALOCK_EL21 =59274 /* 59274 */, // S3_4_c15_c1_2 at min EL1: VMSALock_EL21 REG_AMX_STATE_T_EL1 =59275 /* 59275 */, // S3_4_c15_c1_3 at min EL1: AMX_STATE_T_EL1 - REG_AMX_CONFIG_EL21 =59276 /* 59276 */, // S3_4_c15_c1_4 at min EL1: AMX_CONFIG_EL21 + REG_AMX_CONFIG_EL1 =59276 /* 59276 */, // S3_4_c15_c1_4 at min EL1: AMX_CONFIG_EL1 REG_VMSA_LOCK_EL2 =59277 /* 59277 */, // S3_4_c15_c1_5 at min EL2: VMSA_LOCK_EL2 - REG_CTRR_B_UPR_EL21 =59278 /* 59278 */, // S3_4_c15_c1_6 at min EL1: CTRR_B_UPR_EL21 - REG_CTRR_B_LWR_EL21 =59279 /* 59279 */, // S3_4_c15_c1_7 at min EL1: CTRR_B_LWR_EL21 - REG_SP_SETUP_GL21 =59280 /* 59280 */, // S3_4_c15_c2_0 at min EL1: SP_SETUP_GL21 + REG_CTRR_B_UPR_EL1 =59278 /* 59278 */, // S3_4_c15_c1_6 at min EL1: CTRR_B_UPR_EL1 + REG_CTRR_B_LWR_EL1 =59279 /* 59279 */, // S3_4_c15_c1_7 at min EL1: CTRR_B_LWR_EL1 + REG_SP_SETUP_GL1 =59280 /* 59280 */, // S3_4_c15_c2_0 at min EL1: SP_SETUP_GL1 REG_SP_SETUP_GL2 =59281 /* 59281 */, // S3_4_c15_c2_1 at min EL2: SP_SETUP_GL2 - REG_CTRR_B_CTL_EL21 =59282 /* 59282 */, // S3_4_c15_c2_2 at min EL1: CTRR_B_CTL_EL21 - REG_CTRR_A_LWR_EL21 =59283 /* 59283 */, // S3_4_c15_c2_3 at min EL1: CTRR_A_LWR_EL21 - REG_CTRR_A_UPR_EL21 =59284 /* 59284 */, // S3_4_c15_c2_4 at min EL1: CTRR_A_UPR_EL21 - REG_CTRR_A_CTL_EL21 =59285 /* 59285 */, // S3_4_c15_c2_5 at min EL1: CTRR_A_CTL_EL21 + REG_CTRR_B_CTL_EL1 =59282 /* 59282 */, // S3_4_c15_c2_2 at min EL1: CTRR_B_CTL_EL1 + REG_CTRR_A_LWR_EL1 =59283 /* 59283 */, // S3_4_c15_c2_3 at min EL1: CTRR_A_LWR_EL1 + REG_CTRR_A_UPR_EL1 =59284 /* 59284 */, // S3_4_c15_c2_4 at min EL1: CTRR_A_UPR_EL1 + REG_CTRR_A_CTL_EL1 =59285 /* 59285 */, // S3_4_c15_c2_5 at min EL1: CTRR_A_CTL_EL1 REG_VMSA_LOCK_EL12 =59286 /* 59286 */, // S3_4_c15_c2_6 at min EL2: VMSA_LOCK_EL12 REG_AGTCNTV_CTL_EL02 =59287 /* 59287 */, // S3_4_c15_c2_7 at min EL1: AGTCNTV_CTL_EL02 REG_AMX_STATE_EL1 =59288 /* 59288 */, // S3_4_c15_c3_0 at min EL1: AMX_STATE_EL1 @@ -1165,15 +1125,15 @@ enum SystemReg { REG_CTRR_B_UPR_EL12 =59339 /* 59339 */, // S3_4_c15_c9_3 at min EL2: CTRR_B_UPR_EL12 REG_CTRR_A_CTL_EL12 =59340 /* 59340 */, // S3_4_c15_c9_4 at min EL2: CTRR_A_CTL_EL12 REG_CTRR_B_CTL_EL12 =59341 /* 59341 */, // S3_4_c15_c9_5 at min EL2: CTRR_B_CTL_EL12 - REG_REDIR_ACNTKCTL_EL1 =59342 /* 59342 */, // S3_4_c15_c9_6 at min EL1: REDIR_ACNTKCTL_EL1 + REG_AGTCNTHCTL_EL21 =59342 /* 59342 */, // S3_4_c15_c9_6 at min EL1: AGTCNTHCTL_EL21 REG_AGTCNTKCTL_EL12 =59343 /* 59343 */, // S3_4_c15_c9_7 at min EL2: AGTCNTKCTL_EL12 REG_PREDAKEYLO_EL1 =59344 /* 59344 */, // S3_4_c15_c10_0 at min EL1: PREDAKEYLo_EL1 REG_PREDAKEYHI_EL1 =59345 /* 59345 */, // S3_4_c15_c10_1 at min EL1: PREDAKEYHi_EL1 REG_PREDBKEYLO_EL1 =59346 /* 59346 */, // S3_4_c15_c10_2 at min EL1: PREDBKEYLo_EL1 REG_PREDBKEYHI_EL1 =59347 /* 59347 */, // S3_4_c15_c10_3 at min EL1: PREDBKEYHi_EL1 REG_SIQ_CFG_EL1 =59348 /* 59348 */, // S3_4_c15_c10_4 at min EL1: SIQ_CFG_EL1 - REG_REDIR_LCL_ACNTPCTSS_EL0 =59349 /* 59349 */, // S3_4_c15_c10_5 at min EL1: REDIR_LCL_ACNTPCTSS_EL0 - REG_REDIR_LCL_ACNTVCTSS_EL0 =59350 /* 59350 */, // S3_4_c15_c10_6 at min EL1: REDIR_LCL_ACNTVCTSS_EL0 + REG_AGTCNTPCTSS_EL0 =59349 /* 59349 */, // S3_4_c15_c10_5 at min EL1: AGTCNTPCTSS_EL0 + REG_AGTCNTVCTSS_EL0 =59350 /* 59350 */, // S3_4_c15_c10_6 at min EL1: AGTCNTVCTSS_EL0 REG_AVNCR_EL2 =59351 /* 59351 */, // S3_4_c15_c10_7 at min EL2: AVNCR_EL2 REG_ACC_CTRR_A_LWR_EL2 =59352 /* 59352 */, // S3_4_c15_c11_0 at min EL2: ACC_CTRR_A_LWR_EL2 REG_ACC_CTRR_A_UPR_EL2 =59353 /* 59353 */, // S3_4_c15_c11_1 at min EL2: ACC_CTRR_A_UPR_EL2 @@ -1181,21 +1141,21 @@ enum SystemReg { REG_ACC_CTRR_B_UPR_EL2 =59355 /* 59355 */, // S3_4_c15_c11_3 at min EL2: ACC_CTRR_B_UPR_EL2 REG_ACC_CTRR_A_CTL_EL2 =59356 /* 59356 */, // S3_4_c15_c11_4 at min EL2: ACC_CTRR_A_CTL_EL2 REG_ACC_CTRR_B_CTL_EL2 =59357 /* 59357 */, // S3_4_c15_c11_5 at min EL2: ACC_CTRR_B_CTL_EL2 - REG_REDIR_LCL_ACNTPCT_EL0 =59358 /* 59358 */, // S3_4_c15_c11_6 at min EL1: REDIR_LCL_ACNTPCT_EL0 - REG_REDIR_LCL_ACNTVCT_EL0 =59359 /* 59359 */, // S3_4_c15_c11_7 at min EL1: REDIR_LCL_ACNTVCT_EL0 + REG_AGTCNTPCT_EL0 =59358 /* 59358 */, // S3_4_c15_c11_6 at min EL1: AGTCNTPCT_EL0 + REG_AGTCNTVCT_EL0 =59359 /* 59359 */, // S3_4_c15_c11_7 at min EL1: AGTCNTVCT_EL0 REG_ACFG_EL1 =59360 /* 59360 */, // S3_4_c15_c12_0 at min EL1: ACFG_EL1 REG_AHCR_EL2 =59361 /* 59361 */, // S3_4_c15_c12_1 at min EL2: AHCR_EL2 - REG_APL_INTSTATUS_EL21 =59362 /* 59362 */, // S3_4_c15_c12_2 at min EL1: APL_INTSTATUS_EL21 + REG_APL_INTSTATUS_EL1 =59362 /* 59362 */, // S3_4_c15_c12_2 at min EL1: APL_INTSTATUS_EL1 REG_APL_INTSTATUS_EL2 =59363 /* 59363 */, // S3_4_c15_c12_3 at min EL2: APL_INTSTATUS_EL2 - REG_REDIR_ACNTHCTL_EL2 =59366 /* 59366 */, // S3_4_c15_c12_6 at min EL2: REDIR_ACNTHCTL_EL2 - REG_JAPIAKEYLO_NV_EL21 =59368 /* 59368 */, // S3_4_c15_c13_0 at min EL1: JAPIAKeyLo_NV_EL21 - REG_JAPIAKEYHI_NV_EL21 =59369 /* 59369 */, // S3_4_c15_c13_1 at min EL1: JAPIAKeyHi_NV_EL21 - REG_JAPIBKEYLO_NV_EL21 =59370 /* 59370 */, // S3_4_c15_c13_2 at min EL1: JAPIBKeyLo_NV_EL21 - REG_JAPIBKEYHI_NV_EL21 =59371 /* 59371 */, // S3_4_c15_c13_3 at min EL1: JAPIBKeyHi_NV_EL21 - REG_JAPIAKEYLO_EL21 =59372 /* 59372 */, // S3_4_c15_c13_4 at min EL1: JAPIAKeyLo_EL21 - REG_JAPIAKEYHI_EL21 =59373 /* 59373 */, // S3_4_c15_c13_5 at min EL1: JAPIAKeyHi_EL21 - REG_JAPIBKEYLO_EL21 =59374 /* 59374 */, // S3_4_c15_c13_6 at min EL1: JAPIBKeyLo_EL21 - REG_JAPIBKEYHI_EL21 =59375 /* 59375 */, // S3_4_c15_c13_7 at min EL1: JAPIBKeyHi_EL21 + REG_AGTCNTHCTL_EL2 =59366 /* 59366 */, // S3_4_c15_c12_6 at min EL2: AGTCNTHCTL_EL2 + REG_JAPIAKEYLO_EL2 =59368 /* 59368 */, // S3_4_c15_c13_0 at min EL2: JAPIAKeyLo_EL2 + REG_JAPIAKEYHI_EL2 =59369 /* 59369 */, // S3_4_c15_c13_1 at min EL2: JAPIAKeyHi_EL2 + REG_JAPIBKEYLO_EL2 =59370 /* 59370 */, // S3_4_c15_c13_2 at min EL2: JAPIBKeyLo_EL2 + REG_JAPIBKEYHI_EL2 =59371 /* 59371 */, // S3_4_c15_c13_3 at min EL2: JAPIBKeyHi_EL2 + REG_JAPIAKEYLO_EL1 =59372 /* 59372 */, // S3_4_c15_c13_4 at min EL1: JAPIAKeyLo_EL1 + REG_JAPIAKEYHI_EL1 =59373 /* 59373 */, // S3_4_c15_c13_5 at min EL1: JAPIAKeyHi_EL1 + REG_JAPIBKEYLO_EL1 =59374 /* 59374 */, // S3_4_c15_c13_6 at min EL1: JAPIBKeyLo_EL1 + REG_JAPIBKEYHI_EL1 =59375 /* 59375 */, // S3_4_c15_c13_7 at min EL1: JAPIBKeyHi_EL1 REG_JAPIAKEYLO_EL12 =59376 /* 59376 */, // S3_4_c15_c14_0 at min EL2: JAPIAKeyLo_EL12 REG_JAPIAKEYHI_EL12 =59377 /* 59377 */, // S3_4_c15_c14_1 at min EL2: JAPIAKeyHi_EL12 REG_JAPIBKEYLO_EL12 =59378 /* 59378 */, // S3_4_c15_c14_2 at min EL2: JAPIBKeyLo_EL12 @@ -1203,10 +1163,10 @@ enum SystemReg { REG_AGTCNTRDIR_EL2 =59381 /* 59381 */, // S3_4_c15_c14_5 at min EL2: AGTCNTRDIR_EL2 REG_AGTCNTRDIR_EL12 =59382 /* 59382 */, // S3_4_c15_c14_6 at min EL2: AGTCNTRDIR_EL12 REG_JRANGE_EL2 =59384 /* 59384 */, // S3_4_c15_c15_0 at min EL2: JRANGE_EL2 - REG_JRANGE_EL21 =59385 /* 59385 */, // S3_4_c15_c15_1 at min EL1: JRANGE_EL21 + REG_JRANGE_EL1 =59385 /* 59385 */, // S3_4_c15_c15_1 at min EL1: JRANGE_EL1 REG_JRANGE_EL12 =59386 /* 59386 */, // S3_4_c15_c15_2 at min EL2: JRANGE_EL12 REG_JCTL_EL2 =59387 /* 59387 */, // S3_4_c15_c15_3 at min EL2: JCTL_EL2 - REG_JCTL_EL21 =59388 /* 59388 */, // S3_4_c15_c15_4 at min EL1: JCTL_EL21 + REG_JCTL_EL1 =59388 /* 59388 */, // S3_4_c15_c15_4 at min EL1: JCTL_EL1 REG_JCTL_EL12 =59389 /* 59389 */, // S3_4_c15_c15_5 at min EL2: JCTL_EL12 REG_JCTL_EL0 =59390 /* 59390 */, // S3_4_c15_c15_6 at min EL1: JCTL_EL0 REG_AMDSCR_EL1 =59391 /* 59391 */, // S3_4_c15_c15_7 at min EL1: AMDSCR_EL1 @@ -1246,7 +1206,7 @@ enum SystemReg { REG_AF_ERR_SRC_IDS =61316 /* 61316 */, // S3_5_c15_c0_4 at min EL1: AF_ERR_SRC_IDS REG_DPC_ERR_STS =61317 /* 61317 */, // S3_5_c15_c0_5 at min EL1: DPC_ERR_STS REG_DPC_ERR_CTL =61318 /* 61318 */, // S3_5_c15_c0_6 at min EL1: DPC_ERR_CTL - REG_PROD_TRC_CORE_CFG_EL21 =61319 /* 61319 */, // S3_5_c15_c0_7 at min EL1: PROD_TRC_CORE_CFG_EL21 + REG_PROD_TRC_CORE_CFG_EL1 =61319 /* 61319 */, // S3_5_c15_c0_7 at min EL1: PROD_TRC_CORE_CFG_EL1 REG_TRACE_CORE_CFG =61320 /* 61320 */, // S3_5_c15_c1_0 at min EL1: TRACE_CORE_CFG REG_IPI_SR =61321 /* 61321 */, // S3_5_c15_c1_1 at min EL1: IPI_SR REG_APL_LRTMR_EL2 =61322 /* 61322 */, // S3_5_c15_c1_2 at min EL2: APL_LRTMR_EL2 @@ -1273,20 +1233,20 @@ enum SystemReg { REG_PROD_TRC_STRM_BASE1_GL2 =61343 /* 61343 */, // S3_5_c15_c3_7 at min EL2: PROD_TRC_STRM_BASE1_GL2 REG_CPU_CFG =61344 /* 61344 */, // S3_5_c15_c4_0 at min EL1: CPU_CFG REG_PBLK_STS =61345 /* 61345 */, // S3_5_c15_c4_1 at min EL1: PBLK_STS - REG_PROD_TRC_CTL_EL21 =61347 /* 61347 */, // S3_5_c15_c4_3 at min EL1: PROD_TRC_CTL_EL21 - REG_PROD_TRC_STRM_BASE0_GL21 =61348 /* 61348 */, // S3_5_c15_c4_4 at min EL1: PROD_TRC_STRM_BASE0_GL21 - REG_PROD_TRC_STRM_BASE1_GL21 =61349 /* 61349 */, // S3_5_c15_c4_5 at min EL1: PROD_TRC_STRM_BASE1_GL21 - REG_PROD_TRC_STRM_FIQ_EL21 =61350 /* 61350 */, // S3_5_c15_c4_6 at min EL1: PROD_TRC_STRM_FIQ_EL21 + REG_PROD_TRC_CTL_EL1 =61347 /* 61347 */, // S3_5_c15_c4_3 at min EL1: PROD_TRC_CTL_EL1 + REG_PROD_TRC_STRM_BASE0_GL1 =61348 /* 61348 */, // S3_5_c15_c4_4 at min EL1: PROD_TRC_STRM_BASE0_GL1 + REG_PROD_TRC_STRM_BASE1_GL1 =61349 /* 61349 */, // S3_5_c15_c4_5 at min EL1: PROD_TRC_STRM_BASE1_GL1 + REG_PROD_TRC_STRM_FIQ_EL1 =61350 /* 61350 */, // S3_5_c15_c4_6 at min EL1: PROD_TRC_STRM_FIQ_EL1 REG_CPU_OVRD =61352 /* 61352 */, // S3_5_c15_c5_0 at min EL1: CPU_OVRD REG_PBLK_EXE_ST =61354 /* 61354 */, // S3_5_c15_c5_2 at min EL1: PBLK_EXE_ST - REG_PROD_TRC_CORE_GL_CTL_GL21 =61357 /* 61357 */, // S3_5_c15_c5_5 at min EL1: PROD_TRC_CORE_GL_CTL_GL21 + REG_PROD_TRC_CORE_GL_CTL_GL1 =61357 /* 61357 */, // S3_5_c15_c5_5 at min EL1: PROD_TRC_CORE_GL_CTL_GL1 REG_PROD_TRC_CORE_GL_CTL_GL2 =61358 /* 61358 */, // S3_5_c15_c5_6 at min EL2: PROD_TRC_CORE_GL_CTL_GL2 REG_ACC_OVRD =61360 /* 61360 */, // S3_5_c15_c6_0 at min EL1: ACC_OVRD REG_ACC_OVRD1 =61361 /* 61361 */, // S3_5_c15_c6_1 at min EL1: ACC_OVRD1 REG_CPM_PWRDN_CTL =61362 /* 61362 */, // S3_5_c15_c6_2 at min EL1: CPM_PWRDN_CTL - REG_PROD_TRC_BUF_RESTORE0_GL21 =61364 /* 61364 */, // S3_5_c15_c6_4 at min EL1: PROD_TRC_BUF_RESTORE0_GL21 - REG_PROD_TRC_BUF_RESTORE1_GL21 =61365 /* 61365 */, // S3_5_c15_c6_5 at min EL1: PROD_TRC_BUF_RESTORE1_GL21 - REG_PROD_TRC_EN_GL21 =61366 /* 61366 */, // S3_5_c15_c6_6 at min EL1: PROD_TRC_EN_GL21 + REG_PROD_TRC_BUF_RESTORE0_GL1 =61364 /* 61364 */, // S3_5_c15_c6_4 at min EL1: PROD_TRC_BUF_RESTORE0_GL1 + REG_PROD_TRC_BUF_RESTORE1_GL1 =61365 /* 61365 */, // S3_5_c15_c6_5 at min EL1: PROD_TRC_BUF_RESTORE1_GL1 + REG_PROD_TRC_EN_GL1 =61366 /* 61366 */, // S3_5_c15_c6_6 at min EL1: PROD_TRC_EN_GL1 REG_PRE_LLCFLUSH_TMR =61368 /* 61368 */, // S3_5_c15_c7_0 at min EL1: PRE_LLCFLUSH_TMR REG_BIUINTFCTL_CFG =61372 /* 61372 */, // S3_5_c15_c7_4 at min EL1: BIUINTFCTL_CFG REG_BIUINTFWRR_CFG =61373 /* 61373 */, // S3_5_c15_c7_5 at min EL1: BIUINTFWRR_CFG @@ -1344,20 +1304,20 @@ enum SystemReg { REG_TPIDR_EL3 =63106 /* 63106 */, // S3_6_c13_c0_2 at min EL3: TPIDR_EL3 REG_SCXTNUM_EL3 =63111 /* 63111 */, REG_MMU_ERR_STS =63360 /* 63360 */, // S3_6_c15_c0_0 at min EL1: MMU_ERR_STS - REG_AFSR1_GL21 =63361 /* 63361 */, // S3_6_c15_c0_1 at min EL1: AFSR1_GL21 + REG_AFSR1_GL1 =63361 /* 63361 */, // S3_6_c15_c0_1 at min EL1: AFSR1_GL1 REG_AFSR1_GL2 =63362 /* 63362 */, // S3_6_c15_c0_2 at min EL2: AFSR1_GL2 REG_AFSR1_GL12 =63363 /* 63363 */, // S3_6_c15_c0_3 at min EL2: AFSR1_GL12 REG_BP_OBJC_ADR_EL1 =63364 /* 63364 */, // S3_6_c15_c0_4 at min EL1: BP_OBJC_ADR_EL1 REG_BP_OBJC_CTL_EL1 =63365 /* 63365 */, // S3_6_c15_c0_5 at min EL1: BP_OBJC_CTL_EL1 - REG_SP_GL11_GL21 =63366 /* 63366 */, // S3_6_c15_c0_6 at min EL1: SP_GL11_GL21 + REG_SP_GL11 =63366 /* 63366 */, // S3_6_c15_c0_6 at min EL1: SP_GL11 REG_MMU_SESR_EL2 =63367 /* 63367 */, // S3_6_c15_c0_7 at min EL2: MMU_SESR_EL2 - REG_SPRR_CONFIG_EL21 =63368 /* 63368 */, // S3_6_c15_c1_0 at min EL1: SPRR_CONFIG_EL21 + REG_SPRR_CONFIG_EL1 =63368 /* 63368 */, // S3_6_c15_c1_0 at min EL1: SPRR_CONFIG_EL1 REG_HPFAR_GL2 =63369 /* 63369 */, // S3_6_c15_c1_1 at min EL2: HPFAR_GL2 - REG_GXF_CONFIG_EL21 =63370 /* 63370 */, // S3_6_c15_c1_2 at min EL1: GXF_CONFIG_EL21 - REG_SPRR_AMRANGE_EL1 =63371 /* 63371 */, // S3_6_c15_c1_3 at min EL1: SPRR_AMRANGE_EL1 + REG_GXF_CONFIG_EL1 =63370 /* 63370 */, // S3_6_c15_c1_2 at min EL1: GXF_CONFIG_EL1 + REG_AMRANGE_EL21 =63371 /* 63371 */, // S3_6_c15_c1_3 at min EL1: AMRANGE_EL21 REG_GXF_CONFIG_EL2 =63372 /* 63372 */, // S3_6_c15_c1_4 at min EL2: GXF_CONFIG_EL2 - REG_SPRR_UPERM_EL02 =63373 /* 63373 */, // S3_6_c15_c1_5 at min EL1: SPRR_UPERM_EL02 - REG_SPRR_PPERM_EL21 =63374 /* 63374 */, // S3_6_c15_c1_6 at min EL1: SPRR_PPERM_EL21 + REG_SPRR_UPERM_EL0 =63373 /* 63373 */, // S3_6_c15_c1_5 at min EL1: SPRR_UPERM_EL0 + REG_SPRR_PPERM_EL1 =63374 /* 63374 */, // S3_6_c15_c1_6 at min EL1: SPRR_PPERM_EL1 REG_SPRR_PPERM_EL2 =63375 /* 63375 */, // S3_6_c15_c1_7 at min EL2: SPRR_PPERM_EL2 REG_APGAKEYLO_EL12 =63377 /* 63377 */, // S3_6_c15_c2_1 at min EL2: APGAKeyLo_EL12 REG_APGAKEYHI_EL12 =63378 /* 63378 */, // S3_6_c15_c2_2 at min EL2: APGAKeyHi_EL12 @@ -1366,23 +1326,23 @@ enum SystemReg { REG_AFPCR_EL0 =63381 /* 63381 */, // S3_6_c15_c2_5 at min EL1: AFPCR_EL0 REG_SP_GL22 =63382 /* 63382 */, // S3_6_c15_c2_6 at min EL2: SP_GL22 REG_AMXIDR_EL1 =63383 /* 63383 */, // S3_6_c15_c2_7 at min EL1: AMXIDR_EL1 - REG_SPRR_UMPRR_EL1 =63384 /* 63384 */, // S3_6_c15_c3_0 at min EL1: SPRR_UMPRR_EL1 - REG_SPRR_PMPRR_EL21 =63385 /* 63385 */, // S3_6_c15_c3_1 at min EL1: SPRR_PMPRR_EL21 + REG_SPRR_HUMPRR_EL21 =63384 /* 63384 */, // S3_6_c15_c3_0 at min EL1: SPRR_HUMPRR_EL21 + REG_SPRR_PMPRR_EL1 =63385 /* 63385 */, // S3_6_c15_c3_1 at min EL1: SPRR_PMPRR_EL1 REG_SPRR_PMPRR_EL2 =63386 /* 63386 */, // S3_6_c15_c3_2 at min EL2: SPRR_PMPRR_EL2 - REG_SPRR_UPERM_SH01_EL1 =63387 /* 63387 */, // S3_6_c15_c3_3 at min EL1: SPRR_UPERM_SH01_EL1 - REG_SPRR_UPERM_SH02_EL1 =63388 /* 63388 */, // S3_6_c15_c3_4 at min EL1: SPRR_UPERM_SH02_EL1 - REG_SPRR_UPERM_SH03_EL1 =63389 /* 63389 */, // S3_6_c15_c3_5 at min EL1: SPRR_UPERM_SH03_EL1 - REG_SPRR_UPERM_SH04_EL1 =63390 /* 63390 */, // S3_6_c15_c3_6 at min EL1: SPRR_UPERM_SH04_EL1 - REG_SPRR_UPERM_SH05_EL1 =63391 /* 63391 */, // S3_6_c15_c3_7 at min EL1: SPRR_UPERM_SH05_EL1 - REG_SPRR_UPERM_SH06_EL1 =63392 /* 63392 */, // S3_6_c15_c4_0 at min EL1: SPRR_UPERM_SH06_EL1 - REG_SPRR_UPERM_SH07_EL1 =63393 /* 63393 */, // S3_6_c15_c4_1 at min EL1: SPRR_UPERM_SH07_EL1 - REG_SPRR_PPERM_SH01_EL21 =63394 /* 63394 */, // S3_6_c15_c4_2 at min EL1: SPRR_PPERM_SH01_EL21 - REG_SPRR_PPERM_SH02_EL21 =63395 /* 63395 */, // S3_6_c15_c4_3 at min EL1: SPRR_PPERM_SH02_EL21 - REG_SPRR_PPERM_SH03_EL21 =63396 /* 63396 */, // S3_6_c15_c4_4 at min EL1: SPRR_PPERM_SH03_EL21 - REG_SPRR_PPERM_SH04_EL21 =63397 /* 63397 */, // S3_6_c15_c4_5 at min EL1: SPRR_PPERM_SH04_EL21 - REG_SPRR_PPERM_SH05_EL21 =63398 /* 63398 */, // S3_6_c15_c4_6 at min EL1: SPRR_PPERM_SH05_EL21 - REG_SPRR_PPERM_SH06_EL21 =63399 /* 63399 */, // S3_6_c15_c4_7 at min EL1: SPRR_PPERM_SH06_EL21 - REG_SPRR_PPERM_SH07_EL21 =63400 /* 63400 */, // S3_6_c15_c5_0 at min EL1: SPRR_PPERM_SH07_EL21 + REG_SPRR_HUPERM_SH01_EL21 =63387 /* 63387 */, // S3_6_c15_c3_3 at min EL1: SPRR_HUPERM_SH01_EL21 + REG_SPRR_HUPERM_SH02_EL21 =63388 /* 63388 */, // S3_6_c15_c3_4 at min EL1: SPRR_HUPERM_SH02_EL21 + REG_SPRR_HUPERM_SH03_EL21 =63389 /* 63389 */, // S3_6_c15_c3_5 at min EL1: SPRR_HUPERM_SH03_EL21 + REG_SPRR_HUPERM_SH04_EL21 =63390 /* 63390 */, // S3_6_c15_c3_6 at min EL1: SPRR_HUPERM_SH04_EL21 + REG_SPRR_HUPERM_SH05_EL21 =63391 /* 63391 */, // S3_6_c15_c3_7 at min EL1: SPRR_HUPERM_SH05_EL21 + REG_SPRR_HUPERM_SH06_EL21 =63392 /* 63392 */, // S3_6_c15_c4_0 at min EL1: SPRR_HUPERM_SH06_EL21 + REG_SPRR_HUPERM_SH07_EL21 =63393 /* 63393 */, // S3_6_c15_c4_1 at min EL1: SPRR_HUPERM_SH07_EL21 + REG_SPRR_PPERM_SH01_EL1 =63394 /* 63394 */, // S3_6_c15_c4_2 at min EL1: SPRR_PPERM_SH01_EL1 + REG_SPRR_PPERM_SH02_EL1 =63395 /* 63395 */, // S3_6_c15_c4_3 at min EL1: SPRR_PPERM_SH02_EL1 + REG_SPRR_PPERM_SH03_EL1 =63396 /* 63396 */, // S3_6_c15_c4_4 at min EL1: SPRR_PPERM_SH03_EL1 + REG_SPRR_PPERM_SH04_EL1 =63397 /* 63397 */, // S3_6_c15_c4_5 at min EL1: SPRR_PPERM_SH04_EL1 + REG_SPRR_PPERM_SH05_EL1 =63398 /* 63398 */, // S3_6_c15_c4_6 at min EL1: SPRR_PPERM_SH05_EL1 + REG_SPRR_PPERM_SH06_EL1 =63399 /* 63399 */, // S3_6_c15_c4_7 at min EL1: SPRR_PPERM_SH06_EL1 + REG_SPRR_PPERM_SH07_EL1 =63400 /* 63400 */, // S3_6_c15_c5_0 at min EL1: SPRR_PPERM_SH07_EL1 REG_SPRR_PPERM_SH01_EL2 =63401 /* 63401 */, // S3_6_c15_c5_1 at min EL2: SPRR_PPERM_SH01_EL2 REG_SPRR_PPERM_SH02_EL2 =63402 /* 63402 */, // S3_6_c15_c5_2 at min EL2: SPRR_PPERM_SH02_EL2 REG_SPRR_PPERM_SH03_EL2 =63403 /* 63403 */, // S3_6_c15_c5_3 at min EL2: SPRR_PPERM_SH03_EL2 @@ -1407,13 +1367,13 @@ enum SystemReg { REG_APDBKEYLO_EL12 =63422 /* 63422 */, // S3_6_c15_c7_6 at min EL2: APDBKeyLo_EL12 REG_APDBKEYHI_EL12 =63423 /* 63423 */, // S3_6_c15_c7_7 at min EL2: APDBKeyHi_EL12 REG_CURRENTG =63424 /* 63424 */, // S3_6_c15_c8_0 at min EL1: CurrentG - REG_GXF_ENTRY_EL21 =63425 /* 63425 */, // S3_6_c15_c8_1 at min EL1: GXF_ENTRY_EL21 - REG_GXF_PABENTRY_EL21 =63426 /* 63426 */, // S3_6_c15_c8_2 at min EL1: GXF_PABENTRY_EL21 - REG_ASPSR_EL21 =63427 /* 63427 */, // S3_6_c15_c8_3 at min EL1: ASPSR_EL21 + REG_GXF_ENTRY_EL1 =63425 /* 63425 */, // S3_6_c15_c8_1 at min EL1: GXF_ENTRY_EL1 + REG_GXF_PABENTRY_EL1 =63426 /* 63426 */, // S3_6_c15_c8_2 at min EL1: GXF_PABENTRY_EL1 + REG_ASPSR_EL1 =63427 /* 63427 */, // S3_6_c15_c8_3 at min EL1: ASPSR_EL1 REG_ADSPSR_EL0 =63428 /* 63428 */, // S3_6_c15_c8_4 at min EL1: ADSPSR_EL0 REG_PMCR1_GL2 =63429 /* 63429 */, // S3_6_c15_c8_5 at min EL2: PMCR1_GL2 - REG_ASPSR_NV_EL21 =63430 /* 63430 */, // S3_6_c15_c8_6 at min EL1: ASPSR_NV_EL21 - REG_PMCR1_GL21 =63431 /* 63431 */, // S3_6_c15_c8_7 at min EL1: PMCR1_GL21 + REG_ASPSR_EL2 =63430 /* 63430 */, // S3_6_c15_c8_6 at min EL2: ASPSR_EL2 + REG_PMCR1_GL1 =63431 /* 63431 */, // S3_6_c15_c8_7 at min EL1: PMCR1_GL1 REG_VBAR_GL12 =63434 /* 63434 */, // S3_6_c15_c9_2 at min EL2: VBAR_GL12 REG_SPSR_GL12 =63435 /* 63435 */, // S3_6_c15_c9_3 at min EL2: SPSR_GL12 REG_ASPSR_GL12 =63436 /* 63436 */, // S3_6_c15_c9_4 at min EL2: ASPSR_GL12 @@ -1422,12 +1382,12 @@ enum SystemReg { REG_FAR_GL12 =63439 /* 63439 */, // S3_6_c15_c9_7 at min EL2: FAR_GL12 REG_SP_GL1 =63440 /* 63440 */, // S3_6_c15_c10_0 at min EL1: SP_GL1 REG_TPIDR_GL1 =63441 /* 63441 */, // S3_6_c15_c10_1 at min EL1: TPIDR_GL1 - REG_VBAR_GL21 =63442 /* 63442 */, // S3_6_c15_c10_2 at min EL1: VBAR_GL21 - REG_SPSR_GL21 =63443 /* 63443 */, // S3_6_c15_c10_3 at min EL1: SPSR_GL21 - REG_ASPSR_GL21 =63444 /* 63444 */, // S3_6_c15_c10_4 at min EL1: ASPSR_GL21 - REG_ESR_GL21 =63445 /* 63445 */, // S3_6_c15_c10_5 at min EL1: ESR_GL21 - REG_ELR_GL21 =63446 /* 63446 */, // S3_6_c15_c10_6 at min EL1: ELR_GL21 - REG_FAR_GL21 =63447 /* 63447 */, // S3_6_c15_c10_7 at min EL1: FAR_GL21 + REG_VBAR_GL1 =63442 /* 63442 */, // S3_6_c15_c10_2 at min EL1: VBAR_GL1 + REG_SPSR_GL1 =63443 /* 63443 */, // S3_6_c15_c10_3 at min EL1: SPSR_GL1 + REG_ASPSR_GL1 =63444 /* 63444 */, // S3_6_c15_c10_4 at min EL1: ASPSR_GL1 + REG_ESR_GL1 =63445 /* 63445 */, // S3_6_c15_c10_5 at min EL1: ESR_GL1 + REG_ELR_GL1 =63446 /* 63446 */, // S3_6_c15_c10_6 at min EL1: ELR_GL1 + REG_FAR_GL1 =63447 /* 63447 */, // S3_6_c15_c10_7 at min EL1: FAR_GL1 REG_SP_GL2 =63448 /* 63448 */, // S3_6_c15_c11_0 at min EL2: SP_GL2 REG_TPIDR_GL2 =63449 /* 63449 */, // S3_6_c15_c11_1 at min EL2: TPIDR_GL2 REG_VBAR_GL2 =63450 /* 63450 */, // S3_6_c15_c11_2 at min EL2: VBAR_GL2 @@ -1440,20 +1400,20 @@ enum SystemReg { REG_GXF_PABENTRY_EL2 =63457 /* 63457 */, // S3_6_c15_c12_1 at min EL2: GXF_PABENTRY_EL2 REG_APCTL_EL2 =63458 /* 63458 */, // S3_6_c15_c12_2 at min EL2: APCTL_EL2 REG_APSTS_EL2 =63459 /* 63459 */, // S3_6_c15_c12_3 at min EL2: APSTS_EL2 - REG_APSTS_NV1_EL1 =63460 /* 63460 */, // S3_6_c15_c12_4 at min EL1: APSTS_NV1_EL1 - REG_KERNKEYLO_NV_EL21 =63461 /* 63461 */, // S3_6_c15_c12_5 at min EL1: KERNKEYLo_NV_EL21 - REG_KERNKEYHI_NV_EL21 =63462 /* 63462 */, // S3_6_c15_c12_6 at min EL1: KERNKEYHi_NV_EL21 + REG_APSTS_EL1 =63460 /* 63460 */, // S3_6_c15_c12_4 at min EL1: APSTS_EL1 + REG_KERNKEYLO_EL2 =63461 /* 63461 */, // S3_6_c15_c12_5 at min EL2: KERNKEYLo_EL2 + REG_KERNKEYHI_EL2 =63462 /* 63462 */, // S3_6_c15_c12_6 at min EL2: KERNKEYHi_EL2 REG_ASPSR_EL12 =63463 /* 63463 */, // S3_6_c15_c12_7 at min EL2: ASPSR_EL12 - REG_APIAKEYLO_NV_EL21 =63464 /* 63464 */, // S3_6_c15_c13_0 at min EL1: APIAKeyLo_NV_EL21 - REG_APIAKEYHI_NV_EL21 =63465 /* 63465 */, // S3_6_c15_c13_1 at min EL1: APIAKeyHi_NV_EL21 - REG_APIBKEYLO_NV_EL21 =63466 /* 63466 */, // S3_6_c15_c13_2 at min EL1: APIBKeyLo_NV_EL21 - REG_APIBKEYHI_NV_EL21 =63467 /* 63467 */, // S3_6_c15_c13_3 at min EL1: APIBKeyHi_NV_EL21 - REG_APDAKEYLO_NV_EL21 =63468 /* 63468 */, // S3_6_c15_c13_4 at min EL1: APDAKeyLo_NV_EL21 - REG_APDAKEYHI_NV_EL21 =63469 /* 63469 */, // S3_6_c15_c13_5 at min EL1: APDAKeyHi_NV_EL21 - REG_APDBKEYLO_NV_EL21 =63470 /* 63470 */, // S3_6_c15_c13_6 at min EL1: APDBKeyLo_NV_EL21 - REG_APDBKEYHI_NV_EL21 =63471 /* 63471 */, // S3_6_c15_c13_7 at min EL1: APDBKeyHi_NV_EL21 - REG_APGAKEYLO_NV_EL21 =63472 /* 63472 */, // S3_6_c15_c14_0 at min EL1: APGAKeyLo_NV_EL21 - REG_APGAKEYHI_NV_EL21 =63473 /* 63473 */, // S3_6_c15_c14_1 at min EL1: APGAKeyHi_NV_EL21 + REG_APIAKEYLO_EL2 =63464 /* 63464 */, // S3_6_c15_c13_0 at min EL2: APIAKeyLo_EL2 + REG_APIAKEYHI_EL2 =63465 /* 63465 */, // S3_6_c15_c13_1 at min EL2: APIAKeyHi_EL2 + REG_APIBKEYLO_EL2 =63466 /* 63466 */, // S3_6_c15_c13_2 at min EL2: APIBKeyLo_EL2 + REG_APIBKEYHI_EL2 =63467 /* 63467 */, // S3_6_c15_c13_3 at min EL2: APIBKeyHi_EL2 + REG_APDAKEYLO_EL2 =63468 /* 63468 */, // S3_6_c15_c13_4 at min EL2: APDAKeyLo_EL2 + REG_APDAKEYHI_EL2 =63469 /* 63469 */, // S3_6_c15_c13_5 at min EL2: APDAKeyHi_EL2 + REG_APDBKEYLO_EL2 =63470 /* 63470 */, // S3_6_c15_c13_6 at min EL2: APDBKeyLo_EL2 + REG_APDBKEYHI_EL2 =63471 /* 63471 */, // S3_6_c15_c13_7 at min EL2: APDBKeyHi_EL2 + REG_APGAKEYLO_EL2 =63472 /* 63472 */, // S3_6_c15_c14_0 at min EL2: APGAKeyLo_EL2 + REG_APGAKEYHI_EL2 =63473 /* 63473 */, // S3_6_c15_c14_1 at min EL2: APGAKeyHi_EL2 REG_SPRR_CONFIG_EL2 =63474 /* 63474 */, // S3_6_c15_c14_2 at min EL2: SPRR_CONFIG_EL2 REG_SPRR_AMRANGE_EL2 =63475 /* 63475 */, // S3_6_c15_c14_3 at min EL2: SPRR_AMRANGE_EL2 REG_VMKEYLO_EL2 =63476 /* 63476 */, // S3_6_c15_c14_4 at min EL2: VMKEYLo_EL2 @@ -1551,6 +1511,7 @@ enum SystemReg { REG_CPU_CNT_CTL7 =65531 /* 65531 */, // S3_7_c15_c15_3 at min EL1: CPU_CNT_CTL7 SYSREG_END=65532 }; + #ifdef __cplusplus extern "C" { #endif |