diff options
| author | Mark Rowe <mark@vector35.com> | 2026-06-03 21:25:55 -0700 |
|---|---|---|
| committer | Mark Rowe <mark@vector35.com> | 2026-06-04 14:31:09 -0700 |
| commit | 144cd0aa1f13baebac43d5c877dc7cec8e07b389 (patch) | |
| tree | 97272bd36d7c65f4f85467bc903a7f7a8bd7b6b8 /arch/arm64/il.h | |
| parent | d592ed6dafbb134553bf3a0b8ee70ff7f2049aba (diff) | |
[aarch64] Emit bswap, popcnt, clz, ctz, cls, and rbit instructions during lifting
Intrinsics are still used when lfiting vector instructions, and for
64-bit `rev16` instructions that are not easily composed from the new
instructions.
Diffstat (limited to 'arch/arm64/il.h')
| -rw-r--r-- | arch/arm64/il.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm64/il.h b/arch/arm64/il.h index d5531197..1e182318 100644 --- a/arch/arm64/il.h +++ b/arch/arm64/il.h @@ -72,12 +72,9 @@ enum Arm64Intrinsic : uint32_t ARM64_INTRIN_XPACI, ARM64_INTRIN_YIELD, ARM64_INTRIN_ERET, - ARM64_INTRIN_CLZ, ARM64_INTRIN_CNT, - ARM64_INTRIN_CTZ, ARM64_INTRIN_CLREX, - ARM64_INTRIN_REV, - ARM64_INTRIN_RBIT, + ARM64_INTRIN_REV16, ARM64_INTRIN_AESD, ARM64_INTRIN_AESE, ARM64_INTRIN_AESIMC, |