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authorRusty Wagner <rusty.wagner@gmail.com>2024-03-05 19:50:13 -0500
committerRusty Wagner <rusty.wagner@gmail.com>2024-03-05 20:34:34 -0500
commite093c21ed880ac3eb72119be15093ee04f8ce299 (patch)
tree9f720ebdc0ae415734b1199ed341668c69710a94 /arch/arm64/il_macros.h
parent0609276712622908254065546102381466033141 (diff)
Move architecture modules into the API repo
Diffstat (limited to 'arch/arm64/il_macros.h')
-rw-r--r--arch/arm64/il_macros.h44
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm64/il_macros.h b/arch/arm64/il_macros.h
new file mode 100644
index 00000000..c946e827
--- /dev/null
+++ b/arch/arm64/il_macros.h
@@ -0,0 +1,44 @@
+/*
+ generally:
+ macros that end in "_O" operate on operands
+ macros that start with "IL" construct BNIL expressions
+*/
+
+/* construct IL from a register id, immediate */
+#define ILREG(R) il.Register(get_register_size(R), (R))
+#define ILSETREG(R, VALUE) il.SetRegister(get_register_size(R), (R), (VALUE))
+#define ILCONST(SZ, VAL) il.Const((SZ), (VAL))
+
+/* helpers given a register id */
+#define REGSZ(R) get_register_size(R) /* units: BYTES */
+#define IS_W_REG(R) ((R) >= REG_W0 && (R) <= REG_W31)
+#define IS_X_REG(R) ((R) >= REG_X0 && (R) <= REG_X31)
+#define IS_V_REG(R) ((R) >= REG_V0 && (R) <= REG_V31)
+#define IS_Z_REG(R) ((R) >= REG_Z0 && (R) <= REG_Z31)
+#define IS_P_REG(R) ((R) >= REG_P0 && (R) <= REG_P15)
+#define IS_ZERO_REG(R) ((R) == REG_XZR || (R) == REG_WZR)
+#define IS_SVE_REG(R) (IS_Z_REG(R) || IS_P_REG(R))
+
+/* access stuff from operands */
+#define IMM_O(O) (O).immediate
+#define REG_O(O) (O).reg[0]
+#define REGSZ_O(O) get_register_size(REG_O(O)) /* units: BYTES */
+
+/* construct IL from an InstructionOperand */
+#define ILREG_O(O) ExtractRegister(il, O, 0, REGSZ_O(O), false, REGSZ_O(O))
+#define ILSETREG_O(O, VALUE) IS_ZERO_REG(REG_O(O)) ? (VALUE) : il.SetRegister(REGSZ_O(O), REG_O(O), (VALUE))
+#define ILADDREG_O(O, VALUE) il.Add(REGSZ_O(O), ILREG_O(O), (VALUE))
+#define ILCONST_O(SZ, O) ExtractImmediate(il, (O), SZ)
+
+/* determine stuff from operands */
+#define IS_ASIMD_O(O) ((O).operandClass == REG && IS_V_REG(REG_O(O)))
+#define IS_SVE_O(O) ((O).operandClass == REG && IS_SVE_REG(REG_O(O)))
+
+/* misc */
+#define SETFLAGS (GetFlagWriteTypeForEffect(instr.setflags))
+#define ONES(N) (-1ULL >> (64 - (N)))
+#define ABORT_LIFT \
+ { \
+ il.AddInstruction(il.Unimplemented()); \
+ break; \
+ }