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| author | Galen Williamson <galen@vector35.com> | 2025-03-25 21:27:51 -0400 |
|---|---|---|
| committer | Galen Williamson <galen@vector35.com> | 2025-03-31 18:31:33 -0400 |
| commit | b095215397ca8fe7e9808f312403ec4494de76f6 (patch) | |
| tree | 5eebe61a44d2f95aa5fadd78d9974234fca376be /arch/arm64/neon_intrinsics.h | |
| parent | 8093106217331012734564301118244748535715 (diff) | |
[aarch64] Updating Aarch64 system registers to 2024-12 spec, fix MSR/MRS lifting to use ReadMSR/WriteMSR intrinsics that take enums, removing the sysregs from the register list of the architecture
* sysregs are no longer registers, add enum for TLBI and AT operands
* add erroneously missing cases for unsupported encodings, add enum for DC operands
Diffstat (limited to 'arch/arm64/neon_intrinsics.h')
| -rw-r--r-- | arch/arm64/neon_intrinsics.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/neon_intrinsics.h b/arch/arm64/neon_intrinsics.h index 087b8664..9cade45f 100644 --- a/arch/arm64/neon_intrinsics.h +++ b/arch/arm64/neon_intrinsics.h @@ -3991,3 +3991,6 @@ vector<NameAndType> NeonGetIntrinsicInputs(uint32_t intrinsic); vector<Confidence<Ref<Type>>> NeonGetIntrinsicOutputs(uint32_t intrinsic); bool NeonGetLowLevelILForInstruction( Architecture* arch, uint64_t addr, LowLevelILFunction& il, Instruction& instr, size_t addrSize); +Ref<Enumeration> get_tlbi_op_enum(); +Ref<Enumeration> get_at_op_enum(); +Ref<Enumeration> get_dc_op_enum(); |