diff options
| author | Maxime Meignan <meignanmaxime@hotmail.fr> | 2025-01-24 14:56:37 +0100 |
|---|---|---|
| committer | galenbwill <galenbwill@users.noreply.github.com> | 2025-02-12 12:29:21 -0500 |
| commit | 714d7628097c5b02e23bcad1dba9880c7afc034b (patch) | |
| tree | 32576bf14d905bf3fae84f9eed49600d5306a137 /arch/arm64 | |
| parent | b194c8908f47146e8b5b2aa4b4068f6ef1455de6 (diff) | |
bugfix: ARM64: missing break in il.cpp's switch
A `break` was missing in the switch, making the LDXRH instruction generate 2 IL instructions
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/il.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/il.cpp b/arch/arm64/il.cpp index 8ab06a06..977b57d5 100644 --- a/arch/arm64/il.cpp +++ b/arch/arm64/il.cpp @@ -2015,6 +2015,7 @@ bool GetLowLevelILForInstruction( break; case ARM64_LDXRH: il.AddInstruction(il.Intrinsic({ RegisterOrFlag::Register(REG_O(operand1)) }, ARM64_INTRIN_LDXRH, { ILREG_O(operand2) })); + break; // We don't have a way to specify intrinsic register size, so we explicitly embed the size in the intrinsic name. case ARM64_LDAXR: il.AddInstruction(il.Intrinsic({ RegisterOrFlag::Register(REG_O(operand1)) }, ARM64_INTRIN_LDAXR, { ILREG_O(operand2) })); |