diff options
| author | Galen Williamson <galen@vector35.com> | 2025-02-04 17:02:30 -0500 |
|---|---|---|
| committer | Galen Williamson <galen@vector35.com> | 2025-06-09 12:40:14 -0400 |
| commit | 9373cab26ee2e7b2febab7674360d54d6fb8adc6 (patch) | |
| tree | 648349697b52b82b5c734368a0a333ac69a03b23 /arch/armv7/thumb2_disasm/arch_thumb2.cpp | |
| parent | c8de8363f3dd55ab09bfde7fcb01a11f7d0a0e94 (diff) | |
WIP improve thumb2 MSR lifting
Diffstat (limited to 'arch/armv7/thumb2_disasm/arch_thumb2.cpp')
| -rw-r--r-- | arch/armv7/thumb2_disasm/arch_thumb2.cpp | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/armv7/thumb2_disasm/arch_thumb2.cpp b/arch/armv7/thumb2_disasm/arch_thumb2.cpp index a6b8ee0a..a4a3c1cc 100644 --- a/arch/armv7/thumb2_disasm/arch_thumb2.cpp +++ b/arch/armv7/thumb2_disasm/arch_thumb2.cpp @@ -1219,9 +1219,23 @@ public: else { uint32_t tmp = (decomp.fields[FIELD_write_nzcvq] << 1) | decomp.fields[FIELD_write_g]; uint8_t sysm = decomp.fields[FIELD_SYSm]; + bool xPSR = ((sysm >> 2) & 1) == 1; switch (sysm >> 3) { case 0: /* xPSR access */ - switch(tmp) { + if (xPSR) + switch (sysm) { + case 5: // '101' == IPSR + result.emplace_back(RegisterToken, "ipsr"); + break; + case 6: // '110' == EPSR + result.emplace_back(RegisterToken, "epsr"); + break; + case 7: // '111' == IEPSR + result.emplace_back(RegisterToken, "iepsr"); + break; + } + else + switch(tmp) { case 0: // unpredictable break; case 1: // '01' == write_g |