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authorGalen Williamson <galen@vector35.com>2025-04-04 22:01:15 -0400
committerGalen Williamson <galen@vector35.com>2025-04-08 15:40:49 -0400
commite301d99a8df8ed185ffe71dabe915ab55d6fb885 (patch)
tree599a48c86f8425b02362e9910b70dd12b954b128 /arch/armv7
parentb0b223e9f2379c5d6622dcc082692aa94235cd96 (diff)
[aarch64] lift all LD[1-4]R? and ST[1-4] opcodes, lift ST/LDCLR, ST/LDEOR, ST/LDSET, and their variants
Also fixes all outstanding issues in arm64test.py, including intrinsics, dc, at, and tlbi
Diffstat (limited to 'arch/armv7')
-rw-r--r--arch/armv7/thumb2_disasm/il_thumb2.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/armv7/thumb2_disasm/il_thumb2.cpp b/arch/armv7/thumb2_disasm/il_thumb2.cpp
index e7b783a9..d62f1477 100644
--- a/arch/armv7/thumb2_disasm/il_thumb2.cpp
+++ b/arch/armv7/thumb2_disasm/il_thumb2.cpp
@@ -1414,10 +1414,10 @@ bool GetLowLevelILForThumbInstruction(Architecture* arch, LowLevelILFunction& il
break;
}
case armv7::ARMV7_UMULL:
- il.AddInstruction(WriteSplitOperands(il, instr, 1, 0, il.MultDoublePrecUnsigned(8, ReadILOperand(il, instr, 2), ReadILOperand(il, instr, 3))));
+ il.AddInstruction(WriteSplitOperands(il, instr, 1, 0, il.MultDoublePrecUnsigned(4, ReadILOperand(il, instr, 2), ReadILOperand(il, instr, 3))));
break;
case armv7::ARMV7_SMULL:
- il.AddInstruction(WriteSplitOperands(il, instr, 1, 0, il.MultDoublePrecSigned(8, ReadILOperand(il, instr, 2), ReadILOperand(il, instr, 3))));
+ il.AddInstruction(WriteSplitOperands(il, instr, 1, 0, il.MultDoublePrecSigned(4, ReadILOperand(il, instr, 2), ReadILOperand(il, instr, 3))));
break;
case armv7::ARMV7_SMULBB:
il.AddInstruction(WriteArithOperand(il, instr, il.Mult(4, il.LowPart(2, ReadILOperand(il, instr, 1)),