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authornoone <you@example.com>2024-07-31 19:53:51 -0500
committerAlexander Taylor <alex@vector35.com>2024-08-12 15:50:54 -0400
commit0bf72f94c49f34fc550c2d5c2fbab7a95ac72628 (patch)
treedd5dc1d0298b208bd4d03149e82edba05fc4d8b4 /arch/mips/arch_mips.cpp
parentc79af77b50dee80dcba9800e42e94eb6abb3e53a (diff)
Add intrinsics for some system instructions
Except for SYNCI, I didn't have any test cases for these, but they're fairly simple.
Diffstat (limited to 'arch/mips/arch_mips.cpp')
-rw-r--r--arch/mips/arch_mips.cpp17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/mips/arch_mips.cpp b/arch/mips/arch_mips.cpp
index 25ce265d..fd90daf0 100644
--- a/arch/mips/arch_mips.cpp
+++ b/arch/mips/arch_mips.cpp
@@ -923,6 +923,8 @@ public:
return "moveDwordToCoprocessorUnimplemented";
case MIPS_INTRIN_SYNC:
return "_sync";
+ case MIPS_INTRIN_SYNCI:
+ return "_SynchronizeCacheLines";
case MIPS_INTRIN_EI:
return "_enableInterrupts";
case MIPS_INTRIN_DI:
@@ -931,6 +933,8 @@ public:
return "_clearExecutionHazards";
case MIPS_INTRIN_WAIT:
return "_enterLowPowerMode";
+ case MIPS_INTRIN_PAUSE:
+ return "_waitForLLbitClear";
case MIPS_INTRIN_HWR0:
return "_cpuNum";
case MIPS_INTRIN_HWR1:
@@ -951,6 +955,8 @@ public:
return "_prefetch";
case MIPS_INTRIN_CACHE:
return "_cache";
+ case MIPS_INTRIN_SDBBP:
+ return "_softwareDebugBreakpoint";
case MIPS_INTRIN_GET_LEFT_PART32:
return "_getLeftPart32";
case MIPS_INTRIN_GET_RIGHT_PART32:
@@ -1004,10 +1010,12 @@ public:
MIPS_INTRIN_DMTC0,
MIPS_INTRIN_DMTC_UNIMPLEMENTED,
MIPS_INTRIN_SYNC,
+ MIPS_INTRIN_SYNCI,
MIPS_INTRIN_DI,
MIPS_INTRIN_EHB,
MIPS_INTRIN_EI,
MIPS_INTRIN_WAIT,
+ MIPS_INTRIN_PAUSE,
MIPS_INTRIN_HWR0,
MIPS_INTRIN_HWR1,
MIPS_INTRIN_HWR2,
@@ -1095,6 +1103,10 @@ public:
return {
NameAndType("stype", Type::IntegerType(4, false)),
};
+ case MIPS_INTRIN_SYNCI:
+ return {
+ NameAndType("vaddr", Type::IntegerType(8, false)),
+ };
case MIPS_INTRIN_HWR_UNKNOWN:
return {
NameAndType("hwreg", Type::IntegerType(4, false)),
@@ -1110,6 +1122,11 @@ public:
NameAndType("address", Type::IntegerType(m_bits == 64 ? 8 : 4, false)),
};
+ case MIPS_INTRIN_SDBBP:
+ return {
+ NameAndType("code", Type::IntegerType(1, false)),
+ };
+
// NOTE: SET_x_PARTx could potentially benefit from
// including the old value as an input (since each
// only sets part of the register and keeps the