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authorGalen Williamson <galen@vector35.com>2024-11-06 08:44:58 -0500
committerGalen Williamson <galen@vector35.com>2024-11-06 19:24:25 -0500
commite8cdd50599f33495e23db7649a6dbccd65c08154 (patch)
tree96c4569b5d73a8d7d8b9b97fb12d10bd80c1b15f /arch/powerpc/disassembler.cpp
parentf1b87ea3ecd5f2293a788e747598a764e898f2fa (diff)
Fixes Vector35/binaryninja-api#5968: "PowerPC flag names no longer recognized (due to changes in capstone register numbering)": handles new capstone flag numbers, allows assembling `isel` instructions with capstone syntax, disassembles flag registers with capstone syntax
Diffstat (limited to 'arch/powerpc/disassembler.cpp')
-rw-r--r--arch/powerpc/disassembler.cpp17
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/powerpc/disassembler.cpp b/arch/powerpc/disassembler.cpp
index 480ab658..66e40d32 100644
--- a/arch/powerpc/disassembler.cpp
+++ b/arch/powerpc/disassembler.cpp
@@ -106,7 +106,7 @@ powerpc_decompose(const uint8_t *data, int size, uint32_t addr, bool lil_end,
// bool update_cr0;
// uint8_t op_count;
// cs_ppc_op operands[8];
- // } cs_ppc;
+ // } cs_ppc;
// and each operand is:
// typedef struct cs_ppc_op {
@@ -183,3 +183,18 @@ powerpc_reg_to_str(uint32_t rid)
return cs_reg_name(handle_lil, rid);
}
+extern "C" const uint32_t
+powerpc_crx_to_reg(uint32_t rid)
+{
+ if (rid >= PPC_REG_CR0EQ && rid <= PPC_REG_CR7EQ)
+ return (rid - PPC_REG_CR0EQ) * 4 + 2;
+ else if (rid >= PPC_REG_CR0GT && rid <= PPC_REG_CR7GT)
+ return (rid - PPC_REG_CR0GT) * 4 + 1;
+ else if (rid >= PPC_REG_CR0LT && rid <= PPC_REG_CR7LT)
+ return (rid - PPC_REG_CR0LT) * 4 + 0;
+ else if (rid >= PPC_REG_CR0UN && rid <= PPC_REG_CR7UN)
+ return (rid - PPC_REG_CR0UN) * 4 + 3;
+ else
+ return rid;
+}
+