[ppc] merges PR Vector35/binaryninja-api#5176 (adds support for "psq" Quantized Floating Point instructions, fixes/completes 64-bit instruction/register support)

1 files changed, 94 insertions, 48 deletions

diff --git a/arch/powerpc/il.h b/arch/powerpc/il.h
index 68723f37..b4ca2526 100644
--- a/arch/powerpc/il.h
+++ b/arch/powerpc/il.h
@@ -15,8 +15,27 @@ eg: cmp a, b
 if a<b  then c=0b100 (not setting SO, setting LT)
 if a>b  then c=0b010 (not setting SO, setting GT)
 if a==b then c=0b001 (not setting SO, setting EQ)
+
+FOR FLOATING POINT
+if ((frA) is a NaN or (frB) is a NaN)   then c=0b0001
+else if (frA)< (frB)                    then c=0b1000
+else if (frA)> (frB)                    then c=0b0100
+else if (frA)==(frB)                    then c=0b0010
  */
 
+typedef enum
+{
+    PPC_SUF_S=0,
+    PPC_SUF_U=1,
+    PPC_SUF_F=2,
+    PPC_SUF_SZ=3
+} ppc_suf;
+
+#define IL_FLOAT_FLAG_NAN   (1 << 8)
+#define IL_FLOAT_FLAG_LT    (8 << 8)
+#define IL_FLOAT_FLAG_GT    (4 << 8)
+#define IL_FLOAT_FLAG_EQ    (2 << 8)
+
 #define IL_FLAG_LT 0
 #define IL_FLAG_GT 1
 #define IL_FLAG_EQ 2
@@ -59,62 +78,78 @@ if a==b then c=0b001 (not setting SO, setting EQ)
 #define IL_FLAGWRITE_NONE 0
 #define IL_FLAGWRITE_CR0_S 1
 #define IL_FLAGWRITE_CR0_U 2
-#define IL_FLAGWRITE_CR1_S 3
-#define IL_FLAGWRITE_CR1_U 4
-#define IL_FLAGWRITE_CR2_S 5
-#define IL_FLAGWRITE_CR2_U 6
-#define IL_FLAGWRITE_CR3_S 7
-#define IL_FLAGWRITE_CR3_U 8
-#define IL_FLAGWRITE_CR4_S 9
-#define IL_FLAGWRITE_CR4_U 10
-#define IL_FLAGWRITE_CR5_S 11
-#define IL_FLAGWRITE_CR5_U 12
-#define IL_FLAGWRITE_CR6_S 13
-#define IL_FLAGWRITE_CR6_U 14
-#define IL_FLAGWRITE_CR7_S 15
-#define IL_FLAGWRITE_CR7_U 16
-#define IL_FLAGWRITE_XER 17
-#define IL_FLAGWRITE_XER_CA 18
-#define IL_FLAGWRITE_XER_OV_SO 19
+#define IL_FLAGWRITE_CR0_F 3
+#define IL_FLAGWRITE_CR1_S 4
+#define IL_FLAGWRITE_CR1_U 5
+#define IL_FLAGWRITE_CR1_F 6
+#define IL_FLAGWRITE_CR2_S 7
+#define IL_FLAGWRITE_CR2_U 8
+#define IL_FLAGWRITE_CR2_F 9
+#define IL_FLAGWRITE_CR3_S 10
+#define IL_FLAGWRITE_CR3_U 11
+#define IL_FLAGWRITE_CR3_F 12
+#define IL_FLAGWRITE_CR4_S 13
+#define IL_FLAGWRITE_CR4_U 14
+#define IL_FLAGWRITE_CR4_F 15
+#define IL_FLAGWRITE_CR5_S 16
+#define IL_FLAGWRITE_CR5_U 17
+#define IL_FLAGWRITE_CR5_F 18
+#define IL_FLAGWRITE_CR6_S 19
+#define IL_FLAGWRITE_CR6_U 20
+#define IL_FLAGWRITE_CR6_F 21
+#define IL_FLAGWRITE_CR7_S 22
+#define IL_FLAGWRITE_CR7_U 23
+#define IL_FLAGWRITE_CR7_F 24
+#define IL_FLAGWRITE_XER 25
+#define IL_FLAGWRITE_XER_CA 26
+#define IL_FLAGWRITE_XER_OV_SO 27
 
-#define IL_FLAGWRITE_MTCR0 20
-#define IL_FLAGWRITE_MTCR1 21
-#define IL_FLAGWRITE_MTCR2 22
-#define IL_FLAGWRITE_MTCR3 23
-#define IL_FLAGWRITE_MTCR4 24
-#define IL_FLAGWRITE_MTCR5 25
-#define IL_FLAGWRITE_MTCR6 26
-#define IL_FLAGWRITE_MTCR7 27
+#define IL_FLAGWRITE_MTCR0 28
+#define IL_FLAGWRITE_MTCR1 29
+#define IL_FLAGWRITE_MTCR2 30
+#define IL_FLAGWRITE_MTCR3 31
+#define IL_FLAGWRITE_MTCR4 32
+#define IL_FLAGWRITE_MTCR5 33
+#define IL_FLAGWRITE_MTCR6 34
+#define IL_FLAGWRITE_MTCR7 35
 
-#define IL_FLAGWRITE_INVL0 30
-#define IL_FLAGWRITE_INVL1 31
-#define IL_FLAGWRITE_INVL2 32
-#define IL_FLAGWRITE_INVL3 33
-#define IL_FLAGWRITE_INVL4 34
-#define IL_FLAGWRITE_INVL5 35
-#define IL_FLAGWRITE_INVL6 36
-#define IL_FLAGWRITE_INVL7 37
+#define IL_FLAGWRITE_INVL0 38
+#define IL_FLAGWRITE_INVL1 39
+#define IL_FLAGWRITE_INVL2 40
+#define IL_FLAGWRITE_INVL3 41
+#define IL_FLAGWRITE_INVL4 42
+#define IL_FLAGWRITE_INVL5 43
+#define IL_FLAGWRITE_INVL6 44
+#define IL_FLAGWRITE_INVL7 45
 
-#define IL_FLAGWRITE_INVALL 40
+#define IL_FLAGWRITE_INVALL 48
 
 /* the different classes of writes to each cr */
 #define IL_FLAGCLASS_NONE 0
 #define IL_FLAGCLASS_CR0_S 1
 #define IL_FLAGCLASS_CR0_U 2
-#define IL_FLAGCLASS_CR1_S 3
-#define IL_FLAGCLASS_CR1_U 4
-#define IL_FLAGCLASS_CR2_S 5
-#define IL_FLAGCLASS_CR2_U 6
-#define IL_FLAGCLASS_CR3_S 7
-#define IL_FLAGCLASS_CR3_U 8
-#define IL_FLAGCLASS_CR4_S 9
-#define IL_FLAGCLASS_CR4_U 10
-#define IL_FLAGCLASS_CR5_S 11
-#define IL_FLAGCLASS_CR5_U 12
-#define IL_FLAGCLASS_CR6_S 13
-#define IL_FLAGCLASS_CR6_U 14
-#define IL_FLAGCLASS_CR7_S 15
-#define IL_FLAGCLASS_CR7_U 16
+#define IL_FLAGCLASS_CR0_F 3
+#define IL_FLAGCLASS_CR1_S 4
+#define IL_FLAGCLASS_CR1_U 5
+#define IL_FLAGCLASS_CR1_F 6
+#define IL_FLAGCLASS_CR2_S 7
+#define IL_FLAGCLASS_CR2_U 8
+#define IL_FLAGCLASS_CR2_F 9
+#define IL_FLAGCLASS_CR3_S 10
+#define IL_FLAGCLASS_CR3_U 11
+#define IL_FLAGCLASS_CR3_F 12
+#define IL_FLAGCLASS_CR4_S 13
+#define IL_FLAGCLASS_CR4_U 14
+#define IL_FLAGCLASS_CR4_F 15
+#define IL_FLAGCLASS_CR5_S 16
+#define IL_FLAGCLASS_CR5_U 17
+#define IL_FLAGCLASS_CR5_F 18
+#define IL_FLAGCLASS_CR6_S 19
+#define IL_FLAGCLASS_CR6_U 20
+#define IL_FLAGCLASS_CR6_F 21
+#define IL_FLAGCLASS_CR7_S 22
+#define IL_FLAGCLASS_CR7_U 23
+#define IL_FLAGCLASS_CR7_F 24
 
 #define IL_FLAGGROUP_CR0_LT (0 + 0)
 #define IL_FLAGGROUP_CR0_LE (0 + 1)
@@ -172,5 +207,16 @@ if a==b then c=0b001 (not setting SO, setting EQ)
 #define IL_FLAGGROUP_CR7_EQ (70 + 4)
 #define IL_FLAGGROUP_CR7_NE (70 + 5)
 
+enum PPCIntrinsic : uint32_t
+{
+    PPC_INTRIN_CNTLZW,
+    PPC_INTRIN_FRSP,
+    PPC_INTRIN_END,
+    PPC_PS_INTRIN_QUANTIZE,
+    PPC_PS_INTRIN_DEQUANTIZE,
+    PPC_PS_INTRIN_END,
+	PPC_INTRIN_INVALID = 0xFFFFFFFF,
+};
+
 
 bool GetLowLevelILForPPCInstruction(Architecture *arch, LowLevelILFunction& il, const uint8_t *data, uint64_t addr, decomp_result *res, bool le);