diff options
| author | Xusheng <xusheng@vector35.com> | 2024-04-04 15:50:18 +0800 |
|---|---|---|
| committer | Xusheng <xusheng@vector35.com> | 2024-04-10 19:58:15 +0800 |
| commit | 16fc31044f3b202200a6f03a538cda5f985bbecb (patch) | |
| tree | c6a769b4015d40660bfbb1f64e8a833b1a58e477 /arch/x86/il.h | |
| parent | f2f976e7d1c8d818f512f66179f93fa575eab3c3 (diff) | |
Update xed to v2024.04.01
Diffstat (limited to 'arch/x86/il.h')
| -rw-r--r-- | arch/x86/il.h | 1913 |
1 files changed, 1808 insertions, 105 deletions
diff --git a/arch/x86/il.h b/arch/x86/il.h index 2082b660..41f41dee 100644 --- a/arch/x86/il.h +++ b/arch/x86/il.h @@ -111,7 +111,15 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_INVALID = 1000, INTRINSIC_XED_IFORM_AAA, INTRINSIC_XED_IFORM_AAD_IMMb, + INTRINSIC_XED_IFORM_AADD_MEM32_GPR32, + INTRINSIC_XED_IFORM_AADD_MEM64_GPR64, + INTRINSIC_XED_IFORM_AADD_MEMi32_GPR32i32_APX, + INTRINSIC_XED_IFORM_AADD_MEMi64_GPR64i64_APX, INTRINSIC_XED_IFORM_AAM_IMMb, + INTRINSIC_XED_IFORM_AAND_MEM32_GPR32, + INTRINSIC_XED_IFORM_AAND_MEM64_GPR64, + INTRINSIC_XED_IFORM_AAND_MEMi32_GPR32i32_APX, + INTRINSIC_XED_IFORM_AAND_MEMi64_GPR64i64_APX, INTRINSIC_XED_IFORM_AAS, INTRINSIC_XED_IFORM_ADC_AL_IMMb, INTRINSIC_XED_IFORM_ADC_GPR8_GPR8_10, @@ -119,20 +127,52 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_ADC_GPR8_IMMb_80r2, INTRINSIC_XED_IFORM_ADC_GPR8_IMMb_82r2, INTRINSIC_XED_IFORM_ADC_GPR8_MEMb, + INTRINSIC_XED_IFORM_ADC_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_ADC_GPR8i8_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_ADC_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_ADC_GPR8i8_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_ADC_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_ADC_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_ADC_GPR8i8_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_ADC_GPR8i8_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_ADC_GPRv_GPRv_11, INTRINSIC_XED_IFORM_ADC_GPRv_GPRv_13, + INTRINSIC_XED_IFORM_ADC_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_ADC_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_ADC_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_ADC_GPRv_GPRv_IMMz_APX, + INTRINSIC_XED_IFORM_ADC_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_ADC_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_ADC_GPRv_IMMb, INTRINSIC_XED_IFORM_ADC_GPRv_IMMz, + INTRINSIC_XED_IFORM_ADC_GPRv_IMMz_APX, INTRINSIC_XED_IFORM_ADC_GPRv_MEMv, + INTRINSIC_XED_IFORM_ADC_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_ADC_GPRv_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_ADC_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_ADC_GPRv_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_ADC_MEMb_GPR8, INTRINSIC_XED_IFORM_ADC_MEMb_IMMb_80r2, INTRINSIC_XED_IFORM_ADC_MEMb_IMMb_82r2, + INTRINSIC_XED_IFORM_ADC_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_ADC_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_ADC_MEMv_GPRv, + INTRINSIC_XED_IFORM_ADC_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_ADC_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_ADC_MEMv_IMMb, INTRINSIC_XED_IFORM_ADC_MEMv_IMMz, + INTRINSIC_XED_IFORM_ADC_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_ADC_OrAX_IMMz, INTRINSIC_XED_IFORM_ADCX_GPR32d_GPR32d, INTRINSIC_XED_IFORM_ADCX_GPR32d_MEMd, + INTRINSIC_XED_IFORM_ADCX_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_ADCX_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_ADCX_GPR32i32_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_ADCX_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_ADCX_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_ADCX_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_ADCX_GPR64i64_GPR64i64_MEMi64_APX, + INTRINSIC_XED_IFORM_ADCX_GPR64i64_MEMi64_APX, INTRINSIC_XED_IFORM_ADCX_GPR64q_GPR64q, INTRINSIC_XED_IFORM_ADCX_GPR64q_MEMq, INTRINSIC_XED_IFORM_ADC_LOCK_MEMb_GPR8, @@ -147,17 +187,41 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_ADD_GPR8_IMMb_80r0, INTRINSIC_XED_IFORM_ADD_GPR8_IMMb_82r0, INTRINSIC_XED_IFORM_ADD_GPR8_MEMb, + INTRINSIC_XED_IFORM_ADD_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_ADD_GPR8i8_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_ADD_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_ADD_GPR8i8_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_ADD_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_ADD_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_ADD_GPR8i8_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_ADD_GPR8i8_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_ADD_GPRv_GPRv_01, INTRINSIC_XED_IFORM_ADD_GPRv_GPRv_03, + INTRINSIC_XED_IFORM_ADD_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_ADD_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_ADD_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_ADD_GPRv_GPRv_IMMz_APX, + INTRINSIC_XED_IFORM_ADD_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_ADD_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_ADD_GPRv_IMMb, INTRINSIC_XED_IFORM_ADD_GPRv_IMMz, + INTRINSIC_XED_IFORM_ADD_GPRv_IMMz_APX, INTRINSIC_XED_IFORM_ADD_GPRv_MEMv, + INTRINSIC_XED_IFORM_ADD_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_ADD_GPRv_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_ADD_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_ADD_GPRv_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_ADD_MEMb_GPR8, INTRINSIC_XED_IFORM_ADD_MEMb_IMMb_80r0, INTRINSIC_XED_IFORM_ADD_MEMb_IMMb_82r0, + INTRINSIC_XED_IFORM_ADD_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_ADD_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_ADD_MEMv_GPRv, + INTRINSIC_XED_IFORM_ADD_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_ADD_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_ADD_MEMv_IMMb, INTRINSIC_XED_IFORM_ADD_MEMv_IMMz, + INTRINSIC_XED_IFORM_ADD_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_ADD_OrAX_IMMz, INTRINSIC_XED_IFORM_ADDPD_XMMpd_MEMpd, INTRINSIC_XED_IFORM_ADDPD_XMMpd_XMMpd, @@ -179,16 +243,32 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_ADD_LOCK_MEMv_IMMz, INTRINSIC_XED_IFORM_ADOX_GPR32d_GPR32d, INTRINSIC_XED_IFORM_ADOX_GPR32d_MEMd, + INTRINSIC_XED_IFORM_ADOX_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_ADOX_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_ADOX_GPR32i32_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_ADOX_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_ADOX_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_ADOX_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_ADOX_GPR64i64_GPR64i64_MEMi64_APX, + INTRINSIC_XED_IFORM_ADOX_GPR64i64_MEMi64_APX, INTRINSIC_XED_IFORM_ADOX_GPR64q_GPR64q, INTRINSIC_XED_IFORM_ADOX_GPR64q_MEMq, INTRINSIC_XED_IFORM_AESDEC_XMMdq_MEMdq, INTRINSIC_XED_IFORM_AESDEC_XMMdq_XMMdq, + INTRINSIC_XED_IFORM_AESDEC128KL_XMMu8_MEMu8, + INTRINSIC_XED_IFORM_AESDEC256KL_XMMu8_MEMu8, INTRINSIC_XED_IFORM_AESDECLAST_XMMdq_MEMdq, INTRINSIC_XED_IFORM_AESDECLAST_XMMdq_XMMdq, + INTRINSIC_XED_IFORM_AESDECWIDE128KL_MEMu8, + INTRINSIC_XED_IFORM_AESDECWIDE256KL_MEMu8, INTRINSIC_XED_IFORM_AESENC_XMMdq_MEMdq, INTRINSIC_XED_IFORM_AESENC_XMMdq_XMMdq, + INTRINSIC_XED_IFORM_AESENC128KL_XMMu8_MEMu8, + INTRINSIC_XED_IFORM_AESENC256KL_XMMu8_MEMu8, INTRINSIC_XED_IFORM_AESENCLAST_XMMdq_MEMdq, INTRINSIC_XED_IFORM_AESENCLAST_XMMdq_XMMdq, + INTRINSIC_XED_IFORM_AESENCWIDE128KL_MEMu8, + INTRINSIC_XED_IFORM_AESENCWIDE256KL_MEMu8, INTRINSIC_XED_IFORM_AESIMC_XMMdq_MEMdq, INTRINSIC_XED_IFORM_AESIMC_XMMdq_XMMdq, INTRINSIC_XED_IFORM_AESKEYGENASSIST_XMMdq_MEMdq_IMMb, @@ -199,22 +279,50 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_AND_GPR8_IMMb_80r4, INTRINSIC_XED_IFORM_AND_GPR8_IMMb_82r4, INTRINSIC_XED_IFORM_AND_GPR8_MEMb, + INTRINSIC_XED_IFORM_AND_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_AND_GPR8i8_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_AND_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_AND_GPR8i8_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_AND_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_AND_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_AND_GPR8i8_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_AND_GPR8i8_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_AND_GPRv_GPRv_21, INTRINSIC_XED_IFORM_AND_GPRv_GPRv_23, + INTRINSIC_XED_IFORM_AND_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_AND_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_AND_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_AND_GPRv_GPRv_IMMz_APX, + INTRINSIC_XED_IFORM_AND_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_AND_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_AND_GPRv_IMMb, INTRINSIC_XED_IFORM_AND_GPRv_IMMz, + INTRINSIC_XED_IFORM_AND_GPRv_IMMz_APX, INTRINSIC_XED_IFORM_AND_GPRv_MEMv, + INTRINSIC_XED_IFORM_AND_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_AND_GPRv_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_AND_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_AND_GPRv_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_AND_MEMb_GPR8, INTRINSIC_XED_IFORM_AND_MEMb_IMMb_80r4, INTRINSIC_XED_IFORM_AND_MEMb_IMMb_82r4, + INTRINSIC_XED_IFORM_AND_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_AND_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_AND_MEMv_GPRv, + INTRINSIC_XED_IFORM_AND_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_AND_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_AND_MEMv_IMMb, INTRINSIC_XED_IFORM_AND_MEMv_IMMz, + INTRINSIC_XED_IFORM_AND_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_AND_OrAX_IMMz, - INTRINSIC_XED_IFORM_ANDN_VGPR32d_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_ANDN_VGPR32d_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_ANDN_VGPR64q_VGPR64q_MEMq, - INTRINSIC_XED_IFORM_ANDN_VGPR64q_VGPR64q_VGPR64q, + INTRINSIC_XED_IFORM_ANDN_GPR32d_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_ANDN_GPR32d_GPR32d_MEMd, + INTRINSIC_XED_IFORM_ANDN_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_ANDN_GPR32i32_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_ANDN_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_ANDN_GPR64i64_GPR64i64_MEMi64_APX, + INTRINSIC_XED_IFORM_ANDN_GPR64q_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_ANDN_GPR64q_GPR64q_MEMq, INTRINSIC_XED_IFORM_ANDNPD_XMMxuq_MEMxuq, INTRINSIC_XED_IFORM_ANDNPD_XMMxuq_XMMxuq, INTRINSIC_XED_IFORM_ANDNPS_XMMxud_MEMxud, @@ -229,36 +337,48 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_AND_LOCK_MEMv_GPRv, INTRINSIC_XED_IFORM_AND_LOCK_MEMv_IMMb, INTRINSIC_XED_IFORM_AND_LOCK_MEMv_IMMz, + INTRINSIC_XED_IFORM_AOR_MEM32_GPR32, + INTRINSIC_XED_IFORM_AOR_MEM64_GPR64, + INTRINSIC_XED_IFORM_AOR_MEMi32_GPR32i32_APX, + INTRINSIC_XED_IFORM_AOR_MEMi64_GPR64i64_APX, INTRINSIC_XED_IFORM_ARPL_GPR16_GPR16, INTRINSIC_XED_IFORM_ARPL_MEMw_GPR16, - INTRINSIC_XED_IFORM_BEXTR_VGPR32d_MEMd_VGPR32d, - INTRINSIC_XED_IFORM_BEXTR_VGPR32d_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_BEXTR_VGPR64q_MEMq_VGPR64q, - INTRINSIC_XED_IFORM_BEXTR_VGPR64q_VGPR64q_VGPR64q, + INTRINSIC_XED_IFORM_AXOR_MEM32_GPR32, + INTRINSIC_XED_IFORM_AXOR_MEM64_GPR64, + INTRINSIC_XED_IFORM_AXOR_MEMi32_GPR32i32_APX, + INTRINSIC_XED_IFORM_AXOR_MEMi64_GPR64i64_APX, + INTRINSIC_XED_IFORM_BEXTR_GPR32d_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BEXTR_GPR32d_MEMd_GPR32d, + INTRINSIC_XED_IFORM_BEXTR_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_BEXTR_GPR32i32_MEMi32_GPR32i32_APX, + INTRINSIC_XED_IFORM_BEXTR_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_BEXTR_GPR64i64_MEMi64_GPR64i64_APX, + INTRINSIC_XED_IFORM_BEXTR_GPR64q_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_BEXTR_GPR64q_MEMq_GPR64q, INTRINSIC_XED_IFORM_BEXTR_XOP_GPR32d_GPR32d_IMMd, INTRINSIC_XED_IFORM_BEXTR_XOP_GPR32d_MEMd_IMMd, INTRINSIC_XED_IFORM_BEXTR_XOP_GPRyy_GPRyy_IMMd, INTRINSIC_XED_IFORM_BEXTR_XOP_GPRyy_MEMy_IMMd, - INTRINSIC_XED_IFORM_BLCFILL_VGPR32d_GPR32d, - INTRINSIC_XED_IFORM_BLCFILL_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLCFILL_VGPRyy_GPRyy, - INTRINSIC_XED_IFORM_BLCFILL_VGPRyy_MEMy, - INTRINSIC_XED_IFORM_BLCI_VGPR32d_GPR32d, - INTRINSIC_XED_IFORM_BLCI_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLCI_VGPRyy_GPRyy, - INTRINSIC_XED_IFORM_BLCI_VGPRyy_MEMy, - INTRINSIC_XED_IFORM_BLCIC_VGPR32d_GPR32d, - INTRINSIC_XED_IFORM_BLCIC_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLCIC_VGPRyy_GPRyy, - INTRINSIC_XED_IFORM_BLCIC_VGPRyy_MEMy, - INTRINSIC_XED_IFORM_BLCMSK_VGPR32d_GPR32d, - INTRINSIC_XED_IFORM_BLCMSK_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLCMSK_VGPRyy_GPRyy, - INTRINSIC_XED_IFORM_BLCMSK_VGPRyy_MEMy, - INTRINSIC_XED_IFORM_BLCS_VGPR32d_GPR32d, - INTRINSIC_XED_IFORM_BLCS_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLCS_VGPRyy_GPRyy, - INTRINSIC_XED_IFORM_BLCS_VGPRyy_MEMy, + INTRINSIC_XED_IFORM_BLCFILL_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLCFILL_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLCFILL_GPRyy_GPRyy, + INTRINSIC_XED_IFORM_BLCFILL_GPRyy_MEMy, + INTRINSIC_XED_IFORM_BLCI_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLCI_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLCI_GPRyy_GPRyy, + INTRINSIC_XED_IFORM_BLCI_GPRyy_MEMy, + INTRINSIC_XED_IFORM_BLCIC_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLCIC_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLCIC_GPRyy_GPRyy, + INTRINSIC_XED_IFORM_BLCIC_GPRyy_MEMy, + INTRINSIC_XED_IFORM_BLCMSK_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLCMSK_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLCMSK_GPRyy_GPRyy, + INTRINSIC_XED_IFORM_BLCMSK_GPRyy_MEMy, + INTRINSIC_XED_IFORM_BLCS_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLCS_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLCS_GPRyy_GPRyy, + INTRINSIC_XED_IFORM_BLCS_GPRyy_MEMy, INTRINSIC_XED_IFORM_BLENDPD_XMMdq_MEMdq_IMMb, INTRINSIC_XED_IFORM_BLENDPD_XMMdq_XMMdq_IMMb, INTRINSIC_XED_IFORM_BLENDPS_XMMdq_MEMdq_IMMb, @@ -267,26 +387,38 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_BLENDVPD_XMMdq_XMMdq, INTRINSIC_XED_IFORM_BLENDVPS_XMMdq_MEMdq, INTRINSIC_XED_IFORM_BLENDVPS_XMMdq_XMMdq, - INTRINSIC_XED_IFORM_BLSFILL_VGPR32d_GPR32d, - INTRINSIC_XED_IFORM_BLSFILL_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLSFILL_VGPRyy_GPRyy, - INTRINSIC_XED_IFORM_BLSFILL_VGPRyy_MEMy, - INTRINSIC_XED_IFORM_BLSI_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLSI_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_BLSI_VGPR64q_MEMq, - INTRINSIC_XED_IFORM_BLSI_VGPR64q_VGPR64q, - INTRINSIC_XED_IFORM_BLSIC_VGPR32d_GPR32d, - INTRINSIC_XED_IFORM_BLSIC_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLSIC_VGPRyy_GPRyy, - INTRINSIC_XED_IFORM_BLSIC_VGPRyy_MEMy, - INTRINSIC_XED_IFORM_BLSMSK_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLSMSK_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_BLSMSK_VGPR64q_MEMq, - INTRINSIC_XED_IFORM_BLSMSK_VGPR64q_VGPR64q, - INTRINSIC_XED_IFORM_BLSR_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_BLSR_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_BLSR_VGPR64q_MEMq, - INTRINSIC_XED_IFORM_BLSR_VGPR64q_VGPR64q, + INTRINSIC_XED_IFORM_BLSFILL_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLSFILL_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLSFILL_GPRyy_GPRyy, + INTRINSIC_XED_IFORM_BLSFILL_GPRyy_MEMy, + INTRINSIC_XED_IFORM_BLSI_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLSI_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLSI_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_BLSI_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_BLSI_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_BLSI_GPR64i64_MEMi64_APX, + INTRINSIC_XED_IFORM_BLSI_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_BLSI_GPR64q_MEMq, + INTRINSIC_XED_IFORM_BLSIC_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLSIC_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLSIC_GPRyy_GPRyy, + INTRINSIC_XED_IFORM_BLSIC_GPRyy_MEMy, + INTRINSIC_XED_IFORM_BLSMSK_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLSMSK_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLSMSK_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_BLSMSK_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_BLSMSK_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_BLSMSK_GPR64i64_MEMi64_APX, + INTRINSIC_XED_IFORM_BLSMSK_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_BLSMSK_GPR64q_MEMq, + INTRINSIC_XED_IFORM_BLSR_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BLSR_GPR32d_MEMd, + INTRINSIC_XED_IFORM_BLSR_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_BLSR_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_BLSR_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_BLSR_GPR64i64_MEMi64_APX, + INTRINSIC_XED_IFORM_BLSR_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_BLSR_GPR64q_MEMq, INTRINSIC_XED_IFORM_BNDCL_BND_AGEN, INTRINSIC_XED_IFORM_BNDCL_BND_GPR32, INTRINSIC_XED_IFORM_BNDCL_BND_GPR64, @@ -335,10 +467,14 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_BTS_MEMv_IMMb, INTRINSIC_XED_IFORM_BTS_LOCK_MEMv_GPRv, INTRINSIC_XED_IFORM_BTS_LOCK_MEMv_IMMb, - INTRINSIC_XED_IFORM_BZHI_VGPR32d_MEMd_VGPR32d, - INTRINSIC_XED_IFORM_BZHI_VGPR32d_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_BZHI_VGPR64q_MEMq_VGPR64q, - INTRINSIC_XED_IFORM_BZHI_VGPR64q_VGPR64q_VGPR64q, + INTRINSIC_XED_IFORM_BZHI_GPR32d_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_BZHI_GPR32d_MEMd_GPR32d, + INTRINSIC_XED_IFORM_BZHI_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_BZHI_GPR32i32_MEMi32_GPR32i32_APX, + INTRINSIC_XED_IFORM_BZHI_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_BZHI_GPR64i64_MEMi64_GPR64i64_APX, + INTRINSIC_XED_IFORM_BZHI_GPR64q_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_BZHI_GPR64q_MEMq_GPR64q, INTRINSIC_XED_IFORM_CALL_FAR_MEMp2, INTRINSIC_XED_IFORM_CALL_FAR_PTRp_IMMw, INTRINSIC_XED_IFORM_CALL_NEAR_GPRv, @@ -346,8 +482,280 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_CALL_NEAR_RELBRd, INTRINSIC_XED_IFORM_CALL_NEAR_RELBRz, INTRINSIC_XED_IFORM_CBW, + INTRINSIC_XED_IFORM_CCMPB_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPB_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPBE_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPF_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPL_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPLE_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNB_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNBE_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNL_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNLE_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNO_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNS_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPNZ_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPO_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPS_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPT_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_GPR8i8_MEMi8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_GPRv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_GPRv_MEMv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_MEMv_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CCMPZ_MEMv_IMMz_DFV_APX, INTRINSIC_XED_IFORM_CDQ, INTRINSIC_XED_IFORM_CDQE, + INTRINSIC_XED_IFORM_CFCMOVB_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVB_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVB_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVB_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVB_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVBE_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVBE_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVBE_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVBE_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVBE_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVL_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVL_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVL_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVL_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVL_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVLE_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVLE_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVLE_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVLE_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVLE_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNB_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNB_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNB_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNB_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNB_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNBE_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNBE_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNBE_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNBE_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNBE_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNL_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNL_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNL_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNL_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNL_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNLE_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNLE_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNLE_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNLE_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNLE_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNO_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNO_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNO_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNO_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNO_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNP_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNP_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNP_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNP_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNP_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNS_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNS_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNS_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNS_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNS_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNZ_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNZ_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVNZ_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNZ_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVNZ_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVO_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVO_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVO_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVO_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVO_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVP_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVP_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVP_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVP_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVP_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVS_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVS_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVS_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVS_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVS_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVZ_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVZ_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CFCMOVZ_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVZ_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_CFCMOVZ_MEMv_GPRv_APX, INTRINSIC_XED_IFORM_CLAC, INTRINSIC_XED_IFORM_CLC, INTRINSIC_XED_IFORM_CLD, @@ -358,40 +766,73 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_CLI, INTRINSIC_XED_IFORM_CLRSSBSY_MEMu64, INTRINSIC_XED_IFORM_CLTS, + INTRINSIC_XED_IFORM_CLUI, INTRINSIC_XED_IFORM_CLWB_MEMmprefetch, INTRINSIC_XED_IFORM_CLZERO, INTRINSIC_XED_IFORM_CMC, INTRINSIC_XED_IFORM_CMOVB_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVB_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVB_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVB_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVBE_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVBE_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVBE_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVBE_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVL_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVL_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVL_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVL_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVLE_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVLE_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVLE_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVLE_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVNB_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVNB_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVNB_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVNB_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVNBE_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVNBE_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVNBE_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVNBE_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVNL_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVNL_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVNL_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVNL_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVNLE_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVNLE_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVNLE_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVNLE_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVNO_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVNO_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVNO_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVNO_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVNP_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVNP_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVNP_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVNP_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVNS_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVNS_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVNS_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVNS_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVNZ_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVNZ_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVNZ_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVNZ_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVO_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVO_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVO_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVO_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVP_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVP_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVP_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVP_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVS_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVS_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVS_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVS_GPRv_MEMv, INTRINSIC_XED_IFORM_CMOVZ_GPRv_GPRv, + INTRINSIC_XED_IFORM_CMOVZ_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_CMOVZ_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_CMOVZ_GPRv_MEMv, INTRINSIC_XED_IFORM_CMP_AL_IMMb, INTRINSIC_XED_IFORM_CMP_GPR8_GPR8_38, @@ -411,10 +852,66 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_CMP_MEMv_IMMb, INTRINSIC_XED_IFORM_CMP_MEMv_IMMz, INTRINSIC_XED_IFORM_CMP_OrAX_IMMz, + INTRINSIC_XED_IFORM_CMPBEXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPBEXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPBEXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPBEXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPBXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPBXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPBXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPBXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPLEXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPLEXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPLEXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPLEXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPLXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPLXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPLXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPLXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPNBEXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPNBEXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPNBEXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPNBEXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPNBXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPNBXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPNBXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPNBXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPNLEXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPNLEXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPNLEXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPNLEXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPNLXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPNLXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPNLXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPNLXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPNOXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPNOXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPNOXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPNOXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPNPXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPNPXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPNPXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPNPXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPNSXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPNSXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPNSXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPNSXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPNZXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPNZXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPNZXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPNZXADD_MEMu64_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_CMPOXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPOXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPOXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPOXADD_MEMu64_GPR64u64_GPR64u64_APX, INTRINSIC_XED_IFORM_CMPPD_XMMpd_MEMpd_IMMb, INTRINSIC_XED_IFORM_CMPPD_XMMpd_XMMpd_IMMb, INTRINSIC_XED_IFORM_CMPPS_XMMps_MEMps_IMMb, INTRINSIC_XED_IFORM_CMPPS_XMMps_XMMps_IMMb, + INTRINSIC_XED_IFORM_CMPPXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPPXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPPXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPPXADD_MEMu64_GPR64u64_GPR64u64_APX, INTRINSIC_XED_IFORM_CMPSB, INTRINSIC_XED_IFORM_CMPSD, INTRINSIC_XED_IFORM_CMPSD_XMM_XMMsd_MEMsd_IMMb, @@ -423,6 +920,10 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_CMPSS_XMMss_MEMss_IMMb, INTRINSIC_XED_IFORM_CMPSS_XMMss_XMMss_IMMb, INTRINSIC_XED_IFORM_CMPSW, + INTRINSIC_XED_IFORM_CMPSXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPSXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPSXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPSXADD_MEMu64_GPR64u64_GPR64u64_APX, INTRINSIC_XED_IFORM_CMPXCHG_GPR8_GPR8, INTRINSIC_XED_IFORM_CMPXCHG_GPRv_GPRv, INTRINSIC_XED_IFORM_CMPXCHG_MEMb_GPR8, @@ -433,16 +934,152 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_CMPXCHG8B_LOCK_MEMq, INTRINSIC_XED_IFORM_CMPXCHG_LOCK_MEMb_GPR8, INTRINSIC_XED_IFORM_CMPXCHG_LOCK_MEMv_GPRv, + INTRINSIC_XED_IFORM_CMPZXADD_MEMu32_GPR32u32_GPR32u32, + INTRINSIC_XED_IFORM_CMPZXADD_MEMu32_GPR32u32_GPR32u32_APX, + INTRINSIC_XED_IFORM_CMPZXADD_MEMu64_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_CMPZXADD_MEMu64_GPR64u64_GPR64u64_APX, INTRINSIC_XED_IFORM_COMISD_XMMsd_MEMsd, INTRINSIC_XED_IFORM_COMISD_XMMsd_XMMsd, INTRINSIC_XED_IFORM_COMISS_XMMss_MEMss, INTRINSIC_XED_IFORM_COMISS_XMMss_XMMss, INTRINSIC_XED_IFORM_CPUID, INTRINSIC_XED_IFORM_CQO, + INTRINSIC_XED_IFORM_CRC32_GPRy_GPR8i8_APX, + INTRINSIC_XED_IFORM_CRC32_GPRy_GPRv_APX, + INTRINSIC_XED_IFORM_CRC32_GPRy_MEMi8_APX, + INTRINSIC_XED_IFORM_CRC32_GPRy_MEMv_APX, INTRINSIC_XED_IFORM_CRC32_GPRyy_GPR8b, INTRINSIC_XED_IFORM_CRC32_GPRyy_GPRv, INTRINSIC_XED_IFORM_CRC32_GPRyy_MEMb, INTRINSIC_XED_IFORM_CRC32_GPRyy_MEMv, + INTRINSIC_XED_IFORM_CTESTB_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTB_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTB_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTB_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTB_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTB_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTB_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTB_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTBE_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTBE_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTBE_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTBE_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTBE_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTBE_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTBE_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTBE_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTF_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTF_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTF_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTF_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTF_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTF_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTF_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTF_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTL_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTL_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTL_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTL_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTL_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTL_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTL_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTL_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTLE_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTLE_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTLE_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTLE_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTLE_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTLE_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTLE_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTLE_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNB_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNB_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNB_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNB_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNB_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNB_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNB_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNB_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNBE_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNBE_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNBE_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNBE_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNBE_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNBE_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNBE_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNBE_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNL_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNL_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNL_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNL_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNL_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNL_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNL_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNL_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNLE_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNLE_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNLE_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNLE_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNLE_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNLE_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNLE_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNLE_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNO_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNO_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNO_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNO_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNO_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNO_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNO_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNO_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNS_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNS_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNS_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNS_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNS_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNS_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNS_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNS_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNZ_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNZ_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNZ_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNZ_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNZ_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNZ_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNZ_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTNZ_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTO_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTO_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTO_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTO_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTO_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTO_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTO_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTO_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTS_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTS_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTS_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTS_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTS_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTS_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTS_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTS_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTT_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTT_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTT_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTT_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTT_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTT_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTT_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTT_MEMv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTZ_GPR8i8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTZ_GPR8i8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTZ_GPRv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTZ_GPRv_IMMz_DFV_APX, + INTRINSIC_XED_IFORM_CTESTZ_MEMi8_GPR8i8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTZ_MEMi8_IMM8_DFV_APX, + INTRINSIC_XED_IFORM_CTESTZ_MEMv_GPRv_DFV_APX, + INTRINSIC_XED_IFORM_CTESTZ_MEMv_IMMz_DFV_APX, INTRINSIC_XED_IFORM_CVTDQ2PD_XMMpd_MEMq, INTRINSIC_XED_IFORM_CVTDQ2PD_XMMpd_XMMq, INTRINSIC_XED_IFORM_CVTDQ2PS_XMMps_MEMdq, @@ -504,16 +1141,28 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_DAA, INTRINSIC_XED_IFORM_DAS, INTRINSIC_XED_IFORM_DEC_GPR8, + INTRINSIC_XED_IFORM_DEC_GPR8i8_APX, + INTRINSIC_XED_IFORM_DEC_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_DEC_GPR8i8_MEMi8_APX, INTRINSIC_XED_IFORM_DEC_GPRv_48, + INTRINSIC_XED_IFORM_DEC_GPRv_APX, INTRINSIC_XED_IFORM_DEC_GPRv_FFr1, + INTRINSIC_XED_IFORM_DEC_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_DEC_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_DEC_MEMb, + INTRINSIC_XED_IFORM_DEC_MEMi8_APX, INTRINSIC_XED_IFORM_DEC_MEMv, + INTRINSIC_XED_IFORM_DEC_MEMv_APX, INTRINSIC_XED_IFORM_DEC_LOCK_MEMb, INTRINSIC_XED_IFORM_DEC_LOCK_MEMv, INTRINSIC_XED_IFORM_DIV_GPR8, + INTRINSIC_XED_IFORM_DIV_GPR8i8_APX, INTRINSIC_XED_IFORM_DIV_GPRv, + INTRINSIC_XED_IFORM_DIV_GPRv_APX, INTRINSIC_XED_IFORM_DIV_MEMb, + INTRINSIC_XED_IFORM_DIV_MEMi8_APX, INTRINSIC_XED_IFORM_DIV_MEMv, + INTRINSIC_XED_IFORM_DIV_MEMv_APX, INTRINSIC_XED_IFORM_DIVPD_XMMpd_MEMpd, INTRINSIC_XED_IFORM_DIVPD_XMMpd_XMMpd, INTRINSIC_XED_IFORM_DIVPS_XMMps_MEMps, @@ -530,19 +1179,25 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_ENCLS, INTRINSIC_XED_IFORM_ENCLU, INTRINSIC_XED_IFORM_ENCLV, + INTRINSIC_XED_IFORM_ENCODEKEY128_GPR32u8_GPR32u8, + INTRINSIC_XED_IFORM_ENCODEKEY256_GPR32u8_GPR32u8, INTRINSIC_XED_IFORM_ENDBR32, INTRINSIC_XED_IFORM_ENDBR64, INTRINSIC_XED_IFORM_ENQCMD_GPRa_MEMu32, + INTRINSIC_XED_IFORM_ENQCMD_GPRav_MEMu32_APX, INTRINSIC_XED_IFORM_ENQCMDS_GPRa_MEMu32, + INTRINSIC_XED_IFORM_ENQCMDS_GPRav_MEMu32_APX, INTRINSIC_XED_IFORM_ENTER_IMMw_IMMb, + INTRINSIC_XED_IFORM_ERETS, + INTRINSIC_XED_IFORM_ERETU, INTRINSIC_XED_IFORM_EXTRACTPS_GPR32d_XMMdq_IMMb, INTRINSIC_XED_IFORM_EXTRACTPS_MEMd_XMMps_IMMb, INTRINSIC_XED_IFORM_EXTRQ_XMMq_IMMb_IMMb, INTRINSIC_XED_IFORM_EXTRQ_XMMq_XMMdq, INTRINSIC_XED_IFORM_F2XM1, INTRINSIC_XED_IFORM_FABS, - INTRINSIC_XED_IFORM_FADD_ST0_MEMm64real, - INTRINSIC_XED_IFORM_FADD_ST0_MEMmem32real, + INTRINSIC_XED_IFORM_FADD_MEMm64real, + INTRINSIC_XED_IFORM_FADD_MEMmem32real, INTRINSIC_XED_IFORM_FADD_ST0_X87, INTRINSIC_XED_IFORM_FADD_X87_ST0, INTRINSIC_XED_IFORM_FADDP_X87_ST0, @@ -705,33 +1360,58 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_HADDPS_XMMps_MEMps, INTRINSIC_XED_IFORM_HADDPS_XMMps_XMMps, INTRINSIC_XED_IFORM_HLT, + INTRINSIC_XED_IFORM_HRESET_IMM8, INTRINSIC_XED_IFORM_HSUBPD_XMMpd_MEMpd, INTRINSIC_XED_IFORM_HSUBPD_XMMpd_XMMpd, INTRINSIC_XED_IFORM_HSUBPS_XMMps_MEMps, INTRINSIC_XED_IFORM_HSUBPS_XMMps_XMMps, INTRINSIC_XED_IFORM_IDIV_GPR8, + INTRINSIC_XED_IFORM_IDIV_GPR8i8_APX, INTRINSIC_XED_IFORM_IDIV_GPRv, + INTRINSIC_XED_IFORM_IDIV_GPRv_APX, INTRINSIC_XED_IFORM_IDIV_MEMb, + INTRINSIC_XED_IFORM_IDIV_MEMi8_APX, INTRINSIC_XED_IFORM_IDIV_MEMv, + INTRINSIC_XED_IFORM_IDIV_MEMv_APX, INTRINSIC_XED_IFORM_IMUL_GPR8, + INTRINSIC_XED_IFORM_IMUL_GPR8i8_APX, INTRINSIC_XED_IFORM_IMUL_GPRv, + INTRINSIC_XED_IFORM_IMUL_GPRv_APX, INTRINSIC_XED_IFORM_IMUL_GPRv_GPRv, + INTRINSIC_XED_IFORM_IMUL_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_IMUL_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_IMUL_GPRv_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_IMUL_GPRv_GPRv_IMMb, INTRINSIC_XED_IFORM_IMUL_GPRv_GPRv_IMMz, + INTRINSIC_XED_IFORM_IMUL_GPRv_GPRv_IMMz_APX, + INTRINSIC_XED_IFORM_IMUL_GPRv_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_IMUL_GPRv_MEMv, + INTRINSIC_XED_IFORM_IMUL_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_IMUL_GPRv_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_IMUL_GPRv_MEMv_IMMb, INTRINSIC_XED_IFORM_IMUL_GPRv_MEMv_IMMz, + INTRINSIC_XED_IFORM_IMUL_GPRv_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_IMUL_MEMb, + INTRINSIC_XED_IFORM_IMUL_MEMi8_APX, INTRINSIC_XED_IFORM_IMUL_MEMv, + INTRINSIC_XED_IFORM_IMUL_MEMv_APX, INTRINSIC_XED_IFORM_IN_AL_DX, INTRINSIC_XED_IFORM_IN_AL_IMMb, INTRINSIC_XED_IFORM_IN_OeAX_DX, INTRINSIC_XED_IFORM_IN_OeAX_IMMb, INTRINSIC_XED_IFORM_INC_GPR8, + INTRINSIC_XED_IFORM_INC_GPR8i8_APX, + INTRINSIC_XED_IFORM_INC_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_INC_GPR8i8_MEMi8_APX, INTRINSIC_XED_IFORM_INC_GPRv_40, + INTRINSIC_XED_IFORM_INC_GPRv_APX, INTRINSIC_XED_IFORM_INC_GPRv_FFr0, + INTRINSIC_XED_IFORM_INC_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_INC_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_INC_MEMb, + INTRINSIC_XED_IFORM_INC_MEMi8_APX, INTRINSIC_XED_IFORM_INC_MEMv, + INTRINSIC_XED_IFORM_INC_MEMv_APX, INTRINSIC_XED_IFORM_INCSSPD_GPR32u8, INTRINSIC_XED_IFORM_INCSSPQ_GPR64u8, INTRINSIC_XED_IFORM_INC_LOCK_MEMb, @@ -750,12 +1430,17 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_INVD, INTRINSIC_XED_IFORM_INVEPT_GPR32_MEMdq, INTRINSIC_XED_IFORM_INVEPT_GPR64_MEMdq, + INTRINSIC_XED_IFORM_INVEPT_GPR64i64_MEMi128_APX, INTRINSIC_XED_IFORM_INVLPG_MEMb, INTRINSIC_XED_IFORM_INVLPGA_ArAX_ECX, + INTRINSIC_XED_IFORM_INVLPGB_EAX_EDX_ECX, + INTRINSIC_XED_IFORM_INVLPGB_RAX_EDX_ECX, INTRINSIC_XED_IFORM_INVPCID_GPR32_MEMdq, INTRINSIC_XED_IFORM_INVPCID_GPR64_MEMdq, + INTRINSIC_XED_IFORM_INVPCID_GPR64i64_MEMi128_APX, INTRINSIC_XED_IFORM_INVVPID_GPR32_MEMdq, INTRINSIC_XED_IFORM_INVVPID_GPR64_MEMdq, + INTRINSIC_XED_IFORM_INVVPID_GPR64i64_MEMi128_APX, INTRINSIC_XED_IFORM_IRET, INTRINSIC_XED_IFORM_IRETD, INTRINSIC_XED_IFORM_IRETQ, @@ -778,6 +1463,7 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_JMP_RELBRb, INTRINSIC_XED_IFORM_JMP_RELBRd, INTRINSIC_XED_IFORM_JMP_RELBRz, + INTRINSIC_XED_IFORM_JMPABS_ABSBRu64_APX, INTRINSIC_XED_IFORM_JMP_FAR_MEMp2, INTRINSIC_XED_IFORM_JMP_FAR_PTRp_IMMw, INTRINSIC_XED_IFORM_JNB_RELBRb, @@ -829,25 +1515,45 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_KANDNW_MASKmskw_MASKmskw_MASKmskw_AVX512, INTRINSIC_XED_IFORM_KANDQ_MASKmskw_MASKmskw_MASKmskw_AVX512, INTRINSIC_XED_IFORM_KANDW_MASKmskw_MASKmskw_MASKmskw_AVX512, + INTRINSIC_XED_IFORM_KMOVB_GPR32u32_MASKmskw_APX, INTRINSIC_XED_IFORM_KMOVB_GPR32u32_MASKmskw_AVX512, + INTRINSIC_XED_IFORM_KMOVB_MASKmskw_GPR32u32_APX, INTRINSIC_XED_IFORM_KMOVB_MASKmskw_GPR32u32_AVX512, + INTRINSIC_XED_IFORM_KMOVB_MASKmskw_MASKu8_APX, INTRINSIC_XED_IFORM_KMOVB_MASKmskw_MASKu8_AVX512, + INTRINSIC_XED_IFORM_KMOVB_MASKmskw_MEMu8_APX, INTRINSIC_XED_IFORM_KMOVB_MASKmskw_MEMu8_AVX512, + INTRINSIC_XED_IFORM_KMOVB_MEMu8_MASKmskw_APX, INTRINSIC_XED_IFORM_KMOVB_MEMu8_MASKmskw_AVX512, + INTRINSIC_XED_IFORM_KMOVD_GPR32u32_MASKmskw_APX, INTRINSIC_XED_IFORM_KMOVD_GPR32u32_MASKmskw_AVX512, + INTRINSIC_XED_IFORM_KMOVD_MASKmskw_GPR32u32_APX, INTRINSIC_XED_IFORM_KMOVD_MASKmskw_GPR32u32_AVX512, + INTRINSIC_XED_IFORM_KMOVD_MASKmskw_MASKu32_APX, INTRINSIC_XED_IFORM_KMOVD_MASKmskw_MASKu32_AVX512, + INTRINSIC_XED_IFORM_KMOVD_MASKmskw_MEMu32_APX, INTRINSIC_XED_IFORM_KMOVD_MASKmskw_MEMu32_AVX512, + INTRINSIC_XED_IFORM_KMOVD_MEMu32_MASKmskw_APX, INTRINSIC_XED_IFORM_KMOVD_MEMu32_MASKmskw_AVX512, + INTRINSIC_XED_IFORM_KMOVQ_GPR64u64_MASKmskw_APX, INTRINSIC_XED_IFORM_KMOVQ_GPR64u64_MASKmskw_AVX512, + INTRINSIC_XED_IFORM_KMOVQ_MASKmskw_GPR64u64_APX, INTRINSIC_XED_IFORM_KMOVQ_MASKmskw_GPR64u64_AVX512, + INTRINSIC_XED_IFORM_KMOVQ_MASKmskw_MASKu64_APX, INTRINSIC_XED_IFORM_KMOVQ_MASKmskw_MASKu64_AVX512, + INTRINSIC_XED_IFORM_KMOVQ_MASKmskw_MEMu64_APX, INTRINSIC_XED_IFORM_KMOVQ_MASKmskw_MEMu64_AVX512, + INTRINSIC_XED_IFORM_KMOVQ_MEMu64_MASKmskw_APX, INTRINSIC_XED_IFORM_KMOVQ_MEMu64_MASKmskw_AVX512, + INTRINSIC_XED_IFORM_KMOVW_GPR32u32_MASKmskw_APX, INTRINSIC_XED_IFORM_KMOVW_GPR32u32_MASKmskw_AVX512, + INTRINSIC_XED_IFORM_KMOVW_MASKmskw_GPR32u32_APX, INTRINSIC_XED_IFORM_KMOVW_MASKmskw_GPR32u32_AVX512, + INTRINSIC_XED_IFORM_KMOVW_MASKmskw_MASKu16_APX, INTRINSIC_XED_IFORM_KMOVW_MASKmskw_MASKu16_AVX512, + INTRINSIC_XED_IFORM_KMOVW_MASKmskw_MEMu16_APX, INTRINSIC_XED_IFORM_KMOVW_MASKmskw_MEMu16_AVX512, + INTRINSIC_XED_IFORM_KMOVW_MEMu16_MASKmskw_APX, INTRINSIC_XED_IFORM_KMOVW_MEMu16_MASKmskw_AVX512, INTRINSIC_XED_IFORM_KNOTB_MASKmskw_MASKmskw_AVX512, INTRINSIC_XED_IFORM_KNOTD_MASKmskw_MASKmskw_AVX512, @@ -890,6 +1596,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_LDDQU_XMMpd_MEMdq, INTRINSIC_XED_IFORM_LDMXCSR_MEMd, INTRINSIC_XED_IFORM_LDS_GPRz_MEMp, + INTRINSIC_XED_IFORM_LDTILECFG_MEM, + INTRINSIC_XED_IFORM_LDTILECFG_MEM_APX, INTRINSIC_XED_IFORM_LEA_GPRv_AGEN, INTRINSIC_XED_IFORM_LEAVE, INTRINSIC_XED_IFORM_LES_GPRz_MEMp, @@ -900,11 +1608,14 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_LGS_GPRv_MEMp2, INTRINSIC_XED_IFORM_LIDT_MEMs, INTRINSIC_XED_IFORM_LIDT_MEMs64, + INTRINSIC_XED_IFORM_LKGS_GPR16u16, + INTRINSIC_XED_IFORM_LKGS_MEMu16, INTRINSIC_XED_IFORM_LLDT_GPR16, INTRINSIC_XED_IFORM_LLDT_MEMw, INTRINSIC_XED_IFORM_LLWPCB_GPRyy, INTRINSIC_XED_IFORM_LMSW_GPR16, INTRINSIC_XED_IFORM_LMSW_MEMw, + INTRINSIC_XED_IFORM_LOADIWKEY_XMMu8_XMMu8, INTRINSIC_XED_IFORM_LODSB, INTRINSIC_XED_IFORM_LODSD, INTRINSIC_XED_IFORM_LODSQ, @@ -917,13 +1628,15 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_LSS_GPRv_MEMp2, INTRINSIC_XED_IFORM_LTR_GPR16, INTRINSIC_XED_IFORM_LTR_MEMw, - INTRINSIC_XED_IFORM_LWPINS_VGPRyy_GPR32y_IMMd, - INTRINSIC_XED_IFORM_LWPINS_VGPRyy_MEMd_IMMd, - INTRINSIC_XED_IFORM_LWPVAL_VGPRyy_GPR32y_IMMd, - INTRINSIC_XED_IFORM_LWPVAL_VGPRyy_MEMd_IMMd, + INTRINSIC_XED_IFORM_LWPINS_GPRyy_GPR32d_IMMd, + INTRINSIC_XED_IFORM_LWPINS_GPRyy_MEMd_IMMd, + INTRINSIC_XED_IFORM_LWPVAL_GPRyy_GPR32d_IMMd, + INTRINSIC_XED_IFORM_LWPVAL_GPRyy_MEMd_IMMd, INTRINSIC_XED_IFORM_LZCNT_GPRv_GPRv, + INTRINSIC_XED_IFORM_LZCNT_GPRv_GPRv_APX, INTRINSIC_XED_IFORM_LZCNT_GPRv_MEMv, - INTRINSIC_XED_IFORM_MASKMOVDQU_XMMdq_XMMdq, + INTRINSIC_XED_IFORM_LZCNT_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_MASKMOVDQU_XMMxub_XMMxub, INTRINSIC_XED_IFORM_MASKMOVQ_MMXq_MMXq, INTRINSIC_XED_IFORM_MAXPD_XMMpd_MEMpd, INTRINSIC_XED_IFORM_MAXPD_XMMpd_XMMpd, @@ -975,8 +1688,11 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_MOVAPS_XMMps_MEMps, INTRINSIC_XED_IFORM_MOVAPS_XMMps_XMMps_0F28, INTRINSIC_XED_IFORM_MOVAPS_XMMps_XMMps_0F29, + INTRINSIC_XED_IFORM_MOVBE_GPRv_GPRv_APX, INTRINSIC_XED_IFORM_MOVBE_GPRv_MEMv, + INTRINSIC_XED_IFORM_MOVBE_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_MOVBE_MEMv_GPRv, + INTRINSIC_XED_IFORM_MOVBE_MEMv_GPRv_APX, INTRINSIC_XED_IFORM_MOVD_GPR32_MMXd, INTRINSIC_XED_IFORM_MOVD_GPR32_XMMd, INTRINSIC_XED_IFORM_MOVD_MEMd_MMXd, @@ -988,8 +1704,10 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_MOVDDUP_XMMdq_MEMq, INTRINSIC_XED_IFORM_MOVDDUP_XMMdq_XMMq, INTRINSIC_XED_IFORM_MOVDIR64B_GPRa_MEM, + INTRINSIC_XED_IFORM_MOVDIR64B_GPRav_MEMu32_APX, INTRINSIC_XED_IFORM_MOVDIRI_MEMu32_GPR32u32, INTRINSIC_XED_IFORM_MOVDIRI_MEMu64_GPR64u64, + INTRINSIC_XED_IFORM_MOVDIRI_MEMyu_GPRyu_APX, INTRINSIC_XED_IFORM_MOVDQ2Q_MMXq_XMMq, INTRINSIC_XED_IFORM_MOVDQA_MEMdq_XMMdq, INTRINSIC_XED_IFORM_MOVDQA_XMMdq_MEMdq, @@ -1007,7 +1725,7 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_MOVLHPS_XMMq_XMMq, INTRINSIC_XED_IFORM_MOVLPD_MEMq_XMMsd, INTRINSIC_XED_IFORM_MOVLPD_XMMsd_MEMq, - INTRINSIC_XED_IFORM_MOVLPS_MEMq_XMMps, + INTRINSIC_XED_IFORM_MOVLPS_MEMq_XMMq, INTRINSIC_XED_IFORM_MOVLPS_XMMq_MEMq, INTRINSIC_XED_IFORM_MOVMSKPD_GPR32_XMMpd, INTRINSIC_XED_IFORM_MOVMSKPS_GPR32_XMMps, @@ -1082,9 +1800,13 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_MPSADBW_XMMdq_MEMdq_IMMb, INTRINSIC_XED_IFORM_MPSADBW_XMMdq_XMMdq_IMMb, INTRINSIC_XED_IFORM_MUL_GPR8, + INTRINSIC_XED_IFORM_MUL_GPR8i8_APX, INTRINSIC_XED_IFORM_MUL_GPRv, + INTRINSIC_XED_IFORM_MUL_GPRv_APX, INTRINSIC_XED_IFORM_MUL_MEMb, + INTRINSIC_XED_IFORM_MUL_MEMi8_APX, INTRINSIC_XED_IFORM_MUL_MEMv, + INTRINSIC_XED_IFORM_MUL_MEMv_APX, INTRINSIC_XED_IFORM_MULPD_XMMpd_MEMpd, INTRINSIC_XED_IFORM_MULPD_XMMpd_XMMpd, INTRINSIC_XED_IFORM_MULPS_XMMps_MEMps, @@ -1093,16 +1815,28 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_MULSD_XMMsd_XMMsd, INTRINSIC_XED_IFORM_MULSS_XMMss_MEMss, INTRINSIC_XED_IFORM_MULSS_XMMss_XMMss, - INTRINSIC_XED_IFORM_MULX_VGPR32d_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_MULX_VGPR32d_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_MULX_VGPR64q_VGPR64q_MEMq, - INTRINSIC_XED_IFORM_MULX_VGPR64q_VGPR64q_VGPR64q, + INTRINSIC_XED_IFORM_MULX_GPR32d_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_MULX_GPR32d_GPR32d_MEMd, + INTRINSIC_XED_IFORM_MULX_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_MULX_GPR32i32_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_MULX_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_MULX_GPR64i64_GPR64i64_MEMi64_APX, + INTRINSIC_XED_IFORM_MULX_GPR64q_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_MULX_GPR64q_GPR64q_MEMq, INTRINSIC_XED_IFORM_MWAIT, INTRINSIC_XED_IFORM_MWAITX, INTRINSIC_XED_IFORM_NEG_GPR8, + INTRINSIC_XED_IFORM_NEG_GPR8i8_APX, + INTRINSIC_XED_IFORM_NEG_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_NEG_GPR8i8_MEMi8_APX, INTRINSIC_XED_IFORM_NEG_GPRv, + INTRINSIC_XED_IFORM_NEG_GPRv_APX, + INTRINSIC_XED_IFORM_NEG_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_NEG_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_NEG_MEMb, + INTRINSIC_XED_IFORM_NEG_MEMi8_APX, INTRINSIC_XED_IFORM_NEG_MEMv, + INTRINSIC_XED_IFORM_NEG_MEMv_APX, INTRINSIC_XED_IFORM_NEG_LOCK_MEMb, INTRINSIC_XED_IFORM_NEG_LOCK_MEMv, INTRINSIC_XED_IFORM_NOP_90, @@ -1114,6 +1848,7 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_NOP_GPRv_0F18r5, INTRINSIC_XED_IFORM_NOP_GPRv_0F18r6, INTRINSIC_XED_IFORM_NOP_GPRv_0F18r7, + INTRINSIC_XED_IFORM_NOP_GPRv_0F1F, INTRINSIC_XED_IFORM_NOP_GPRv_GPRv_0F0D, INTRINSIC_XED_IFORM_NOP_GPRv_GPRv_0F19, INTRINSIC_XED_IFORM_NOP_GPRv_GPRv_0F1A, @@ -1121,22 +1856,27 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_NOP_GPRv_GPRv_0F1C, INTRINSIC_XED_IFORM_NOP_GPRv_GPRv_0F1D, INTRINSIC_XED_IFORM_NOP_GPRv_GPRv_0F1E, - INTRINSIC_XED_IFORM_NOP_GPRv_GPRv_0F1F, INTRINSIC_XED_IFORM_NOP_GPRv_MEM_0F1B, INTRINSIC_XED_IFORM_NOP_GPRv_MEMv_0F1A, INTRINSIC_XED_IFORM_NOP_MEMv_0F18r4, INTRINSIC_XED_IFORM_NOP_MEMv_0F18r5, - INTRINSIC_XED_IFORM_NOP_MEMv_0F18r6, - INTRINSIC_XED_IFORM_NOP_MEMv_0F18r7, + INTRINSIC_XED_IFORM_NOP_MEMv_0F1F, INTRINSIC_XED_IFORM_NOP_MEMv_GPRv_0F19, INTRINSIC_XED_IFORM_NOP_MEMv_GPRv_0F1C, INTRINSIC_XED_IFORM_NOP_MEMv_GPRv_0F1D, INTRINSIC_XED_IFORM_NOP_MEMv_GPRv_0F1E, - INTRINSIC_XED_IFORM_NOP_MEMv_GPRv_0F1F, INTRINSIC_XED_IFORM_NOT_GPR8, + INTRINSIC_XED_IFORM_NOT_GPR8i8_APX, + INTRINSIC_XED_IFORM_NOT_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_NOT_GPR8i8_MEMi8_APX, INTRINSIC_XED_IFORM_NOT_GPRv, + INTRINSIC_XED_IFORM_NOT_GPRv_APX, + INTRINSIC_XED_IFORM_NOT_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_NOT_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_NOT_MEMb, + INTRINSIC_XED_IFORM_NOT_MEMi8_APX, INTRINSIC_XED_IFORM_NOT_MEMv, + INTRINSIC_XED_IFORM_NOT_MEMv_APX, INTRINSIC_XED_IFORM_NOT_LOCK_MEMb, INTRINSIC_XED_IFORM_NOT_LOCK_MEMv, INTRINSIC_XED_IFORM_OR_AL_IMMb, @@ -1145,17 +1885,41 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_OR_GPR8_IMMb_80r1, INTRINSIC_XED_IFORM_OR_GPR8_IMMb_82r1, INTRINSIC_XED_IFORM_OR_GPR8_MEMb, + INTRINSIC_XED_IFORM_OR_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_OR_GPR8i8_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_OR_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_OR_GPR8i8_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_OR_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_OR_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_OR_GPR8i8_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_OR_GPR8i8_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_OR_GPRv_GPRv_09, INTRINSIC_XED_IFORM_OR_GPRv_GPRv_0B, + INTRINSIC_XED_IFORM_OR_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_OR_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_OR_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_OR_GPRv_GPRv_IMMz_APX, + INTRINSIC_XED_IFORM_OR_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_OR_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_OR_GPRv_IMMb, INTRINSIC_XED_IFORM_OR_GPRv_IMMz, + INTRINSIC_XED_IFORM_OR_GPRv_IMMz_APX, INTRINSIC_XED_IFORM_OR_GPRv_MEMv, + INTRINSIC_XED_IFORM_OR_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_OR_GPRv_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_OR_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_OR_GPRv_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_OR_MEMb_GPR8, INTRINSIC_XED_IFORM_OR_MEMb_IMMb_80r1, INTRINSIC_XED_IFORM_OR_MEMb_IMMb_82r1, + INTRINSIC_XED_IFORM_OR_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_OR_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_OR_MEMv_GPRv, + INTRINSIC_XED_IFORM_OR_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_OR_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_OR_MEMv_IMMb, INTRINSIC_XED_IFORM_OR_MEMv_IMMz, + INTRINSIC_XED_IFORM_OR_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_OR_OrAX_IMMz, INTRINSIC_XED_IFORM_ORPD_XMMxuq_MEMxuq, INTRINSIC_XED_IFORM_ORPD_XMMxuq_XMMxuq, @@ -1259,6 +2023,7 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_PBLENDVB_XMMdq_XMMdq, INTRINSIC_XED_IFORM_PBLENDW_XMMdq_MEMdq_IMMb, INTRINSIC_XED_IFORM_PBLENDW_XMMdq_XMMdq_IMMb, + INTRINSIC_XED_IFORM_PBNDKB, INTRINSIC_XED_IFORM_PCLMULQDQ_XMMdq_MEMdq_IMMb, INTRINSIC_XED_IFORM_PCLMULQDQ_XMMdq_XMMdq_IMMb, INTRINSIC_XED_IFORM_PCMPEQB_MMXq_MEMq, @@ -1304,14 +2069,23 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_PCMPISTRM_XMMdq_MEMdq_IMMb, INTRINSIC_XED_IFORM_PCMPISTRM_XMMdq_XMMdq_IMMb, INTRINSIC_XED_IFORM_PCONFIG, - INTRINSIC_XED_IFORM_PDEP_VGPR32d_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_PDEP_VGPR32d_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_PDEP_VGPR64q_VGPR64q_MEMq, - INTRINSIC_XED_IFORM_PDEP_VGPR64q_VGPR64q_VGPR64q, - INTRINSIC_XED_IFORM_PEXT_VGPR32d_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_PEXT_VGPR32d_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_PEXT_VGPR64q_VGPR64q_MEMq, - INTRINSIC_XED_IFORM_PEXT_VGPR64q_VGPR64q_VGPR64q, + INTRINSIC_XED_IFORM_PCONFIG64, + INTRINSIC_XED_IFORM_PDEP_GPR32d_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_PDEP_GPR32d_GPR32d_MEMd, + INTRINSIC_XED_IFORM_PDEP_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_PDEP_GPR32i32_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_PDEP_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_PDEP_GPR64i64_GPR64i64_MEMi64_APX, + INTRINSIC_XED_IFORM_PDEP_GPR64q_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_PDEP_GPR64q_GPR64q_MEMq, + INTRINSIC_XED_IFORM_PEXT_GPR32d_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_PEXT_GPR32d_GPR32d_MEMd, + INTRINSIC_XED_IFORM_PEXT_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_PEXT_GPR32i32_GPR32i32_MEMi32_APX, + INTRINSIC_XED_IFORM_PEXT_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_PEXT_GPR64i64_GPR64i64_MEMi64_APX, + INTRINSIC_XED_IFORM_PEXT_GPR64q_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_PEXT_GPR64q_GPR64q_MEMq, INTRINSIC_XED_IFORM_PEXTRB_GPR32d_XMMdq_IMMb, INTRINSIC_XED_IFORM_PEXTRB_MEMb_XMMdq_IMMb, INTRINSIC_XED_IFORM_PEXTRD_GPR32d_XMMdq_IMMb, @@ -1500,17 +2274,24 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_POP_GS, INTRINSIC_XED_IFORM_POP_MEMv, INTRINSIC_XED_IFORM_POP_SS, + INTRINSIC_XED_IFORM_POP2_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_POP2P_GPR64u64_GPR64u64_APX, INTRINSIC_XED_IFORM_POPA, INTRINSIC_XED_IFORM_POPAD, INTRINSIC_XED_IFORM_POPCNT_GPRv_GPRv, + INTRINSIC_XED_IFORM_POPCNT_GPRv_GPRv_APX, INTRINSIC_XED_IFORM_POPCNT_GPRv_MEMv, + INTRINSIC_XED_IFORM_POPCNT_GPRv_MEMv_APX, INTRINSIC_XED_IFORM_POPF, INTRINSIC_XED_IFORM_POPFD, INTRINSIC_XED_IFORM_POPFQ, + INTRINSIC_XED_IFORM_POPP_GPR64, INTRINSIC_XED_IFORM_POR_MMXq_MEMq, INTRINSIC_XED_IFORM_POR_MMXq_MMXq, INTRINSIC_XED_IFORM_POR_XMMdq_MEMdq, INTRINSIC_XED_IFORM_POR_XMMdq_XMMdq, + INTRINSIC_XED_IFORM_PREFETCHIT0_MEMu8, + INTRINSIC_XED_IFORM_PREFETCHIT1_MEMu8, INTRINSIC_XED_IFORM_PREFETCHNTA_MEMmprefetch, INTRINSIC_XED_IFORM_PREFETCHT0_MEMmprefetch, INTRINSIC_XED_IFORM_PREFETCHT1_MEMmprefetch, @@ -1679,11 +2460,14 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_PUSH_IMMz, INTRINSIC_XED_IFORM_PUSH_MEMv, INTRINSIC_XED_IFORM_PUSH_SS, + INTRINSIC_XED_IFORM_PUSH2_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_PUSH2P_GPR64u64_GPR64u64_APX, INTRINSIC_XED_IFORM_PUSHA, INTRINSIC_XED_IFORM_PUSHAD, INTRINSIC_XED_IFORM_PUSHF, INTRINSIC_XED_IFORM_PUSHFD, INTRINSIC_XED_IFORM_PUSHFQ, + INTRINSIC_XED_IFORM_PUSHP_GPR64, INTRINSIC_XED_IFORM_PVALIDATE_RAX_ECX_EDX, INTRINSIC_XED_IFORM_PXOR_MMXq_MEMq, INTRINSIC_XED_IFORM_PXOR_MMXq_MMXq, @@ -1692,15 +2476,39 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_RCL_GPR8_CL, INTRINSIC_XED_IFORM_RCL_GPR8_IMMb, INTRINSIC_XED_IFORM_RCL_GPR8_ONE, + INTRINSIC_XED_IFORM_RCL_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_RCL_GPR8i8_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_RCL_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_RCL_GPR8i8_GPR8i8_ONE_APX, + INTRINSIC_XED_IFORM_RCL_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_RCL_GPR8i8_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_RCL_GPR8i8_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_RCL_GPR8i8_MEMi8_ONE_APX, + INTRINSIC_XED_IFORM_RCL_GPR8i8_ONE_APX, INTRINSIC_XED_IFORM_RCL_GPRv_CL, + INTRINSIC_XED_IFORM_RCL_GPRv_CL_APX, + INTRINSIC_XED_IFORM_RCL_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_RCL_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_RCL_GPRv_GPRv_ONE_APX, + INTRINSIC_XED_IFORM_RCL_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_RCL_GPRv_IMMb, + INTRINSIC_XED_IFORM_RCL_GPRv_MEMv_CL_APX, + INTRINSIC_XED_IFORM_RCL_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_RCL_GPRv_MEMv_ONE_APX, INTRINSIC_XED_IFORM_RCL_GPRv_ONE, + INTRINSIC_XED_IFORM_RCL_GPRv_ONE_APX, INTRINSIC_XED_IFORM_RCL_MEMb_CL, INTRINSIC_XED_IFORM_RCL_MEMb_IMMb, INTRINSIC_XED_IFORM_RCL_MEMb_ONE, + INTRINSIC_XED_IFORM_RCL_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_RCL_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_RCL_MEMi8_ONE_APX, INTRINSIC_XED_IFORM_RCL_MEMv_CL, + INTRINSIC_XED_IFORM_RCL_MEMv_CL_APX, + INTRINSIC_XED_IFORM_RCL_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_RCL_MEMv_IMMb, INTRINSIC_XED_IFORM_RCL_MEMv_ONE, + INTRINSIC_XED_IFORM_RCL_MEMv_ONE_APX, INTRINSIC_XED_IFORM_RCPPS_XMMps_MEMps, INTRINSIC_XED_IFORM_RCPPS_XMMps_XMMps, INTRINSIC_XED_IFORM_RCPSS_XMMss_MEMss, @@ -1708,18 +2516,43 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_RCR_GPR8_CL, INTRINSIC_XED_IFORM_RCR_GPR8_IMMb, INTRINSIC_XED_IFORM_RCR_GPR8_ONE, + INTRINSIC_XED_IFORM_RCR_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_RCR_GPR8i8_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_RCR_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_RCR_GPR8i8_GPR8i8_ONE_APX, + INTRINSIC_XED_IFORM_RCR_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_RCR_GPR8i8_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_RCR_GPR8i8_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_RCR_GPR8i8_MEMi8_ONE_APX, + INTRINSIC_XED_IFORM_RCR_GPR8i8_ONE_APX, INTRINSIC_XED_IFORM_RCR_GPRv_CL, + INTRINSIC_XED_IFORM_RCR_GPRv_CL_APX, + INTRINSIC_XED_IFORM_RCR_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_RCR_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_RCR_GPRv_GPRv_ONE_APX, + INTRINSIC_XED_IFORM_RCR_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_RCR_GPRv_IMMb, + INTRINSIC_XED_IFORM_RCR_GPRv_MEMv_CL_APX, + INTRINSIC_XED_IFORM_RCR_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_RCR_GPRv_MEMv_ONE_APX, INTRINSIC_XED_IFORM_RCR_GPRv_ONE, + INTRINSIC_XED_IFORM_RCR_GPRv_ONE_APX, INTRINSIC_XED_IFORM_RCR_MEMb_CL, INTRINSIC_XED_IFORM_RCR_MEMb_IMMb, INTRINSIC_XED_IFORM_RCR_MEMb_ONE, + INTRINSIC_XED_IFORM_RCR_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_RCR_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_RCR_MEMi8_ONE_APX, INTRINSIC_XED_IFORM_RCR_MEMv_CL, + INTRINSIC_XED_IFORM_RCR_MEMv_CL_APX, + INTRINSIC_XED_IFORM_RCR_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_RCR_MEMv_IMMb, INTRINSIC_XED_IFORM_RCR_MEMv_ONE, + INTRINSIC_XED_IFORM_RCR_MEMv_ONE_APX, INTRINSIC_XED_IFORM_RDFSBASE_GPRy, INTRINSIC_XED_IFORM_RDGSBASE_GPRy, INTRINSIC_XED_IFORM_RDMSR, + INTRINSIC_XED_IFORM_RDMSRLIST, INTRINSIC_XED_IFORM_RDPID_GPR32u32, INTRINSIC_XED_IFORM_RDPID_GPR64u64, INTRINSIC_XED_IFORM_RDPKRU, @@ -1783,31 +2616,83 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_ROL_GPR8_CL, INTRINSIC_XED_IFORM_ROL_GPR8_IMMb, INTRINSIC_XED_IFORM_ROL_GPR8_ONE, + INTRINSIC_XED_IFORM_ROL_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_ROL_GPR8i8_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_ROL_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_ROL_GPR8i8_GPR8i8_ONE_APX, + INTRINSIC_XED_IFORM_ROL_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_ROL_GPR8i8_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_ROL_GPR8i8_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_ROL_GPR8i8_MEMi8_ONE_APX, + INTRINSIC_XED_IFORM_ROL_GPR8i8_ONE_APX, INTRINSIC_XED_IFORM_ROL_GPRv_CL, + INTRINSIC_XED_IFORM_ROL_GPRv_CL_APX, + INTRINSIC_XED_IFORM_ROL_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_ROL_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_ROL_GPRv_GPRv_ONE_APX, + INTRINSIC_XED_IFORM_ROL_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_ROL_GPRv_IMMb, + INTRINSIC_XED_IFORM_ROL_GPRv_MEMv_CL_APX, + INTRINSIC_XED_IFORM_ROL_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_ROL_GPRv_MEMv_ONE_APX, INTRINSIC_XED_IFORM_ROL_GPRv_ONE, + INTRINSIC_XED_IFORM_ROL_GPRv_ONE_APX, INTRINSIC_XED_IFORM_ROL_MEMb_CL, INTRINSIC_XED_IFORM_ROL_MEMb_IMMb, INTRINSIC_XED_IFORM_ROL_MEMb_ONE, + INTRINSIC_XED_IFORM_ROL_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_ROL_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_ROL_MEMi8_ONE_APX, INTRINSIC_XED_IFORM_ROL_MEMv_CL, + INTRINSIC_XED_IFORM_ROL_MEMv_CL_APX, + INTRINSIC_XED_IFORM_ROL_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_ROL_MEMv_IMMb, INTRINSIC_XED_IFORM_ROL_MEMv_ONE, + INTRINSIC_XED_IFORM_ROL_MEMv_ONE_APX, INTRINSIC_XED_IFORM_ROR_GPR8_CL, INTRINSIC_XED_IFORM_ROR_GPR8_IMMb, INTRINSIC_XED_IFORM_ROR_GPR8_ONE, + INTRINSIC_XED_IFORM_ROR_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_ROR_GPR8i8_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_ROR_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_ROR_GPR8i8_GPR8i8_ONE_APX, + INTRINSIC_XED_IFORM_ROR_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_ROR_GPR8i8_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_ROR_GPR8i8_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_ROR_GPR8i8_MEMi8_ONE_APX, + INTRINSIC_XED_IFORM_ROR_GPR8i8_ONE_APX, INTRINSIC_XED_IFORM_ROR_GPRv_CL, + INTRINSIC_XED_IFORM_ROR_GPRv_CL_APX, + INTRINSIC_XED_IFORM_ROR_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_ROR_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_ROR_GPRv_GPRv_ONE_APX, + INTRINSIC_XED_IFORM_ROR_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_ROR_GPRv_IMMb, + INTRINSIC_XED_IFORM_ROR_GPRv_MEMv_CL_APX, + INTRINSIC_XED_IFORM_ROR_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_ROR_GPRv_MEMv_ONE_APX, INTRINSIC_XED_IFORM_ROR_GPRv_ONE, + INTRINSIC_XED_IFORM_ROR_GPRv_ONE_APX, INTRINSIC_XED_IFORM_ROR_MEMb_CL, INTRINSIC_XED_IFORM_ROR_MEMb_IMMb, INTRINSIC_XED_IFORM_ROR_MEMb_ONE, + INTRINSIC_XED_IFORM_ROR_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_ROR_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_ROR_MEMi8_ONE_APX, INTRINSIC_XED_IFORM_ROR_MEMv_CL, + INTRINSIC_XED_IFORM_ROR_MEMv_CL_APX, + INTRINSIC_XED_IFORM_ROR_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_ROR_MEMv_IMMb, INTRINSIC_XED_IFORM_ROR_MEMv_ONE, - INTRINSIC_XED_IFORM_RORX_VGPR32d_MEMd_IMMb, - INTRINSIC_XED_IFORM_RORX_VGPR32d_VGPR32d_IMMb, - INTRINSIC_XED_IFORM_RORX_VGPR64q_MEMq_IMMb, - INTRINSIC_XED_IFORM_RORX_VGPR64q_VGPR64q_IMMb, + INTRINSIC_XED_IFORM_ROR_MEMv_ONE_APX, + INTRINSIC_XED_IFORM_RORX_GPR32d_GPR32d_IMMb, + INTRINSIC_XED_IFORM_RORX_GPR32d_MEMd_IMMb, + INTRINSIC_XED_IFORM_RORX_GPR32i32_GPR32i32_IMM8_APX, + INTRINSIC_XED_IFORM_RORX_GPR32i32_MEMi32_IMM8_APX, + INTRINSIC_XED_IFORM_RORX_GPR64i64_GPR64i64_IMM8_APX, + INTRINSIC_XED_IFORM_RORX_GPR64i64_MEMi64_IMM8_APX, + INTRINSIC_XED_IFORM_RORX_GPR64q_GPR64q_IMMb, + INTRINSIC_XED_IFORM_RORX_GPR64q_MEMq_IMMb, INTRINSIC_XED_IFORM_ROUNDPD_XMMpd_MEMpd_IMMb, INTRINSIC_XED_IFORM_ROUNDPD_XMMpd_XMMpd_IMMb, INTRINSIC_XED_IFORM_ROUNDPS_XMMps_MEMps_IMMb, @@ -1827,19 +2712,47 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_SAR_GPR8_CL, INTRINSIC_XED_IFORM_SAR_GPR8_IMMb, INTRINSIC_XED_IFORM_SAR_GPR8_ONE, + INTRINSIC_XED_IFORM_SAR_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_SAR_GPR8i8_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_SAR_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SAR_GPR8i8_GPR8i8_ONE_APX, + INTRINSIC_XED_IFORM_SAR_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SAR_GPR8i8_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_SAR_GPR8i8_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_SAR_GPR8i8_MEMi8_ONE_APX, + INTRINSIC_XED_IFORM_SAR_GPR8i8_ONE_APX, INTRINSIC_XED_IFORM_SAR_GPRv_CL, + INTRINSIC_XED_IFORM_SAR_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SAR_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SAR_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_SAR_GPRv_GPRv_ONE_APX, + INTRINSIC_XED_IFORM_SAR_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SAR_GPRv_IMMb, + INTRINSIC_XED_IFORM_SAR_GPRv_MEMv_CL_APX, + INTRINSIC_XED_IFORM_SAR_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_SAR_GPRv_MEMv_ONE_APX, INTRINSIC_XED_IFORM_SAR_GPRv_ONE, + INTRINSIC_XED_IFORM_SAR_GPRv_ONE_APX, INTRINSIC_XED_IFORM_SAR_MEMb_CL, INTRINSIC_XED_IFORM_SAR_MEMb_IMMb, INTRINSIC_XED_IFORM_SAR_MEMb_ONE, + INTRINSIC_XED_IFORM_SAR_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_SAR_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_SAR_MEMi8_ONE_APX, INTRINSIC_XED_IFORM_SAR_MEMv_CL, + INTRINSIC_XED_IFORM_SAR_MEMv_CL_APX, + INTRINSIC_XED_IFORM_SAR_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_SAR_MEMv_IMMb, INTRINSIC_XED_IFORM_SAR_MEMv_ONE, - INTRINSIC_XED_IFORM_SARX_VGPR32d_MEMd_VGPR32d, - INTRINSIC_XED_IFORM_SARX_VGPR32d_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_SARX_VGPR64q_MEMq_VGPR64q, - INTRINSIC_XED_IFORM_SARX_VGPR64q_VGPR64q_VGPR64q, + INTRINSIC_XED_IFORM_SAR_MEMv_ONE_APX, + INTRINSIC_XED_IFORM_SARX_GPR32d_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_SARX_GPR32d_MEMd_GPR32d, + INTRINSIC_XED_IFORM_SARX_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_SARX_GPR32i32_MEMi32_GPR32i32_APX, + INTRINSIC_XED_IFORM_SARX_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_SARX_GPR64i64_MEMi64_GPR64i64_APX, + INTRINSIC_XED_IFORM_SARX_GPR64q_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_SARX_GPR64q_MEMq_GPR64q, INTRINSIC_XED_IFORM_SAVEPREVSSP, INTRINSIC_XED_IFORM_SBB_AL_IMMb, INTRINSIC_XED_IFORM_SBB_GPR8_GPR8_18, @@ -1847,17 +2760,41 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_SBB_GPR8_IMMb_80r3, INTRINSIC_XED_IFORM_SBB_GPR8_IMMb_82r3, INTRINSIC_XED_IFORM_SBB_GPR8_MEMb, + INTRINSIC_XED_IFORM_SBB_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_SBB_GPR8i8_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_SBB_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SBB_GPR8i8_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_SBB_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SBB_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_SBB_GPR8i8_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_SBB_GPR8i8_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_SBB_GPRv_GPRv_19, INTRINSIC_XED_IFORM_SBB_GPRv_GPRv_1B, + INTRINSIC_XED_IFORM_SBB_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_SBB_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_SBB_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_SBB_GPRv_GPRv_IMMz_APX, + INTRINSIC_XED_IFORM_SBB_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_SBB_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SBB_GPRv_IMMb, INTRINSIC_XED_IFORM_SBB_GPRv_IMMz, + INTRINSIC_XED_IFORM_SBB_GPRv_IMMz_APX, INTRINSIC_XED_IFORM_SBB_GPRv_MEMv, + INTRINSIC_XED_IFORM_SBB_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_SBB_GPRv_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_SBB_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_SBB_GPRv_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_SBB_MEMb_GPR8, INTRINSIC_XED_IFORM_SBB_MEMb_IMMb_80r3, INTRINSIC_XED_IFORM_SBB_MEMb_IMMb_82r3, + INTRINSIC_XED_IFORM_SBB_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_SBB_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_SBB_MEMv_GPRv, + INTRINSIC_XED_IFORM_SBB_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_SBB_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_SBB_MEMv_IMMb, INTRINSIC_XED_IFORM_SBB_MEMv_IMMz, + INTRINSIC_XED_IFORM_SBB_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_SBB_OrAX_IMMz, INTRINSIC_XED_IFORM_SBB_LOCK_MEMb_GPR8, INTRINSIC_XED_IFORM_SBB_LOCK_MEMb_IMMb_80r3, @@ -1869,40 +2806,76 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_SCASD, INTRINSIC_XED_IFORM_SCASQ, INTRINSIC_XED_IFORM_SCASW, + INTRINSIC_XED_IFORM_SEAMCALL, + INTRINSIC_XED_IFORM_SEAMOPS, + INTRINSIC_XED_IFORM_SEAMRET, + INTRINSIC_XED_IFORM_SENDUIPI_GPR64u32, INTRINSIC_XED_IFORM_SERIALIZE, INTRINSIC_XED_IFORM_SETB_GPR8, + INTRINSIC_XED_IFORM_SETB_GPR8i8_APX, INTRINSIC_XED_IFORM_SETB_MEMb, + INTRINSIC_XED_IFORM_SETB_MEMi8_APX, INTRINSIC_XED_IFORM_SETBE_GPR8, + INTRINSIC_XED_IFORM_SETBE_GPR8i8_APX, INTRINSIC_XED_IFORM_SETBE_MEMb, + INTRINSIC_XED_IFORM_SETBE_MEMi8_APX, INTRINSIC_XED_IFORM_SETL_GPR8, + INTRINSIC_XED_IFORM_SETL_GPR8i8_APX, INTRINSIC_XED_IFORM_SETL_MEMb, + INTRINSIC_XED_IFORM_SETL_MEMi8_APX, INTRINSIC_XED_IFORM_SETLE_GPR8, + INTRINSIC_XED_IFORM_SETLE_GPR8i8_APX, INTRINSIC_XED_IFORM_SETLE_MEMb, + INTRINSIC_XED_IFORM_SETLE_MEMi8_APX, INTRINSIC_XED_IFORM_SETNB_GPR8, + INTRINSIC_XED_IFORM_SETNB_GPR8i8_APX, INTRINSIC_XED_IFORM_SETNB_MEMb, + INTRINSIC_XED_IFORM_SETNB_MEMi8_APX, INTRINSIC_XED_IFORM_SETNBE_GPR8, + INTRINSIC_XED_IFORM_SETNBE_GPR8i8_APX, INTRINSIC_XED_IFORM_SETNBE_MEMb, + INTRINSIC_XED_IFORM_SETNBE_MEMi8_APX, INTRINSIC_XED_IFORM_SETNL_GPR8, + INTRINSIC_XED_IFORM_SETNL_GPR8i8_APX, INTRINSIC_XED_IFORM_SETNL_MEMb, + INTRINSIC_XED_IFORM_SETNL_MEMi8_APX, INTRINSIC_XED_IFORM_SETNLE_GPR8, + INTRINSIC_XED_IFORM_SETNLE_GPR8i8_APX, INTRINSIC_XED_IFORM_SETNLE_MEMb, + INTRINSIC_XED_IFORM_SETNLE_MEMi8_APX, INTRINSIC_XED_IFORM_SETNO_GPR8, + INTRINSIC_XED_IFORM_SETNO_GPR8i8_APX, INTRINSIC_XED_IFORM_SETNO_MEMb, + INTRINSIC_XED_IFORM_SETNO_MEMi8_APX, INTRINSIC_XED_IFORM_SETNP_GPR8, + INTRINSIC_XED_IFORM_SETNP_GPR8i8_APX, INTRINSIC_XED_IFORM_SETNP_MEMb, + INTRINSIC_XED_IFORM_SETNP_MEMi8_APX, INTRINSIC_XED_IFORM_SETNS_GPR8, + INTRINSIC_XED_IFORM_SETNS_GPR8i8_APX, INTRINSIC_XED_IFORM_SETNS_MEMb, + INTRINSIC_XED_IFORM_SETNS_MEMi8_APX, INTRINSIC_XED_IFORM_SETNZ_GPR8, + INTRINSIC_XED_IFORM_SETNZ_GPR8i8_APX, INTRINSIC_XED_IFORM_SETNZ_MEMb, + INTRINSIC_XED_IFORM_SETNZ_MEMi8_APX, INTRINSIC_XED_IFORM_SETO_GPR8, + INTRINSIC_XED_IFORM_SETO_GPR8i8_APX, INTRINSIC_XED_IFORM_SETO_MEMb, + INTRINSIC_XED_IFORM_SETO_MEMi8_APX, INTRINSIC_XED_IFORM_SETP_GPR8, + INTRINSIC_XED_IFORM_SETP_GPR8i8_APX, INTRINSIC_XED_IFORM_SETP_MEMb, + INTRINSIC_XED_IFORM_SETP_MEMi8_APX, INTRINSIC_XED_IFORM_SETS_GPR8, + INTRINSIC_XED_IFORM_SETS_GPR8i8_APX, INTRINSIC_XED_IFORM_SETS_MEMb, + INTRINSIC_XED_IFORM_SETS_MEMi8_APX, INTRINSIC_XED_IFORM_SETSSBSY, INTRINSIC_XED_IFORM_SETZ_GPR8, + INTRINSIC_XED_IFORM_SETZ_GPR8i8_APX, INTRINSIC_XED_IFORM_SETZ_MEMb, + INTRINSIC_XED_IFORM_SETZ_MEMi8_APX, INTRINSIC_XED_IFORM_SFENCE, INTRINSIC_XED_IFORM_SGDT_MEMs, INTRINSIC_XED_IFORM_SGDT_MEMs64, @@ -1926,10 +2899,28 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_SHL_GPR8_IMMb_C0r6, INTRINSIC_XED_IFORM_SHL_GPR8_ONE_D0r4, INTRINSIC_XED_IFORM_SHL_GPR8_ONE_D0r6, + INTRINSIC_XED_IFORM_SHL_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_SHL_GPR8i8_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_SHL_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SHL_GPR8i8_GPR8i8_ONE_APX, + INTRINSIC_XED_IFORM_SHL_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SHL_GPR8i8_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_SHL_GPR8i8_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_SHL_GPR8i8_MEMi8_ONE_APX, + INTRINSIC_XED_IFORM_SHL_GPR8i8_ONE_APX, + INTRINSIC_XED_IFORM_SHL_GPRv_CL_APX, INTRINSIC_XED_IFORM_SHL_GPRv_CL_D3r4, INTRINSIC_XED_IFORM_SHL_GPRv_CL_D3r6, + INTRINSIC_XED_IFORM_SHL_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHL_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_SHL_GPRv_GPRv_ONE_APX, + INTRINSIC_XED_IFORM_SHL_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SHL_GPRv_IMMb_C1r4, INTRINSIC_XED_IFORM_SHL_GPRv_IMMb_C1r6, + INTRINSIC_XED_IFORM_SHL_GPRv_MEMv_CL_APX, + INTRINSIC_XED_IFORM_SHL_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_SHL_GPRv_MEMv_ONE_APX, + INTRINSIC_XED_IFORM_SHL_GPRv_ONE_APX, INTRINSIC_XED_IFORM_SHL_GPRv_ONE_D1r4, INTRINSIC_XED_IFORM_SHL_GPRv_ONE_D1r6, INTRINSIC_XED_IFORM_SHL_MEMb_CL_D2r4, @@ -1938,40 +2929,94 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_SHL_MEMb_IMMb_C0r6, INTRINSIC_XED_IFORM_SHL_MEMb_ONE_D0r4, INTRINSIC_XED_IFORM_SHL_MEMb_ONE_D0r6, + INTRINSIC_XED_IFORM_SHL_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_SHL_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_SHL_MEMi8_ONE_APX, + INTRINSIC_XED_IFORM_SHL_MEMv_CL_APX, INTRINSIC_XED_IFORM_SHL_MEMv_CL_D3r4, INTRINSIC_XED_IFORM_SHL_MEMv_CL_D3r6, + INTRINSIC_XED_IFORM_SHL_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_SHL_MEMv_IMMb_C1r4, INTRINSIC_XED_IFORM_SHL_MEMv_IMMb_C1r6, + INTRINSIC_XED_IFORM_SHL_MEMv_ONE_APX, INTRINSIC_XED_IFORM_SHL_MEMv_ONE_D1r4, INTRINSIC_XED_IFORM_SHL_MEMv_ONE_D1r6, INTRINSIC_XED_IFORM_SHLD_GPRv_GPRv_CL, + INTRINSIC_XED_IFORM_SHLD_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHLD_GPRv_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHLD_GPRv_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_SHLD_GPRv_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SHLD_GPRv_GPRv_IMMb, + INTRINSIC_XED_IFORM_SHLD_GPRv_MEMv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHLD_GPRv_MEMv_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SHLD_MEMv_GPRv_CL, + INTRINSIC_XED_IFORM_SHLD_MEMv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHLD_MEMv_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SHLD_MEMv_GPRv_IMMb, - INTRINSIC_XED_IFORM_SHLX_VGPR32d_MEMd_VGPR32d, - INTRINSIC_XED_IFORM_SHLX_VGPR32d_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_SHLX_VGPR64q_MEMq_VGPR64q, - INTRINSIC_XED_IFORM_SHLX_VGPR64q_VGPR64q_VGPR64q, + INTRINSIC_XED_IFORM_SHLX_GPR32d_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_SHLX_GPR32d_MEMd_GPR32d, + INTRINSIC_XED_IFORM_SHLX_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_SHLX_GPR32i32_MEMi32_GPR32i32_APX, + INTRINSIC_XED_IFORM_SHLX_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_SHLX_GPR64i64_MEMi64_GPR64i64_APX, + INTRINSIC_XED_IFORM_SHLX_GPR64q_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_SHLX_GPR64q_MEMq_GPR64q, INTRINSIC_XED_IFORM_SHR_GPR8_CL, INTRINSIC_XED_IFORM_SHR_GPR8_IMMb, INTRINSIC_XED_IFORM_SHR_GPR8_ONE, + INTRINSIC_XED_IFORM_SHR_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_SHR_GPR8i8_GPR8i8_CL_APX, + INTRINSIC_XED_IFORM_SHR_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SHR_GPR8i8_GPR8i8_ONE_APX, + INTRINSIC_XED_IFORM_SHR_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SHR_GPR8i8_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_SHR_GPR8i8_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_SHR_GPR8i8_MEMi8_ONE_APX, + INTRINSIC_XED_IFORM_SHR_GPR8i8_ONE_APX, INTRINSIC_XED_IFORM_SHR_GPRv_CL, + INTRINSIC_XED_IFORM_SHR_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHR_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHR_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_SHR_GPRv_GPRv_ONE_APX, + INTRINSIC_XED_IFORM_SHR_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SHR_GPRv_IMMb, + INTRINSIC_XED_IFORM_SHR_GPRv_MEMv_CL_APX, + INTRINSIC_XED_IFORM_SHR_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_SHR_GPRv_MEMv_ONE_APX, INTRINSIC_XED_IFORM_SHR_GPRv_ONE, + INTRINSIC_XED_IFORM_SHR_GPRv_ONE_APX, INTRINSIC_XED_IFORM_SHR_MEMb_CL, INTRINSIC_XED_IFORM_SHR_MEMb_IMMb, INTRINSIC_XED_IFORM_SHR_MEMb_ONE, + INTRINSIC_XED_IFORM_SHR_MEMi8_CL_APX, + INTRINSIC_XED_IFORM_SHR_MEMi8_IMM8_APX, + INTRINSIC_XED_IFORM_SHR_MEMi8_ONE_APX, INTRINSIC_XED_IFORM_SHR_MEMv_CL, + INTRINSIC_XED_IFORM_SHR_MEMv_CL_APX, + INTRINSIC_XED_IFORM_SHR_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_SHR_MEMv_IMMb, INTRINSIC_XED_IFORM_SHR_MEMv_ONE, + INTRINSIC_XED_IFORM_SHR_MEMv_ONE_APX, INTRINSIC_XED_IFORM_SHRD_GPRv_GPRv_CL, + INTRINSIC_XED_IFORM_SHRD_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHRD_GPRv_GPRv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHRD_GPRv_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_SHRD_GPRv_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SHRD_GPRv_GPRv_IMMb, + INTRINSIC_XED_IFORM_SHRD_GPRv_MEMv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHRD_GPRv_MEMv_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SHRD_MEMv_GPRv_CL, + INTRINSIC_XED_IFORM_SHRD_MEMv_GPRv_CL_APX, + INTRINSIC_XED_IFORM_SHRD_MEMv_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SHRD_MEMv_GPRv_IMMb, - INTRINSIC_XED_IFORM_SHRX_VGPR32d_MEMd_VGPR32d, - INTRINSIC_XED_IFORM_SHRX_VGPR32d_VGPR32d_VGPR32d, - INTRINSIC_XED_IFORM_SHRX_VGPR64q_MEMq_VGPR64q, - INTRINSIC_XED_IFORM_SHRX_VGPR64q_VGPR64q_VGPR64q, + INTRINSIC_XED_IFORM_SHRX_GPR32d_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_SHRX_GPR32d_MEMd_GPR32d, + INTRINSIC_XED_IFORM_SHRX_GPR32i32_GPR32i32_GPR32i32_APX, + INTRINSIC_XED_IFORM_SHRX_GPR32i32_MEMi32_GPR32i32_APX, + INTRINSIC_XED_IFORM_SHRX_GPR64i64_GPR64i64_GPR64i64_APX, + INTRINSIC_XED_IFORM_SHRX_GPR64i64_MEMi64_GPR64i64_APX, + INTRINSIC_XED_IFORM_SHRX_GPR64q_GPR64q_GPR64q, + INTRINSIC_XED_IFORM_SHRX_GPR64q_MEMq_GPR64q, INTRINSIC_XED_IFORM_SHUFPD_XMMpd_MEMpd_IMMb, INTRINSIC_XED_IFORM_SHUFPD_XMMpd_XMMpd_IMMb, INTRINSIC_XED_IFORM_SHUFPS_XMMps_MEMps_IMMb, @@ -2004,23 +3049,50 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_STOSW, INTRINSIC_XED_IFORM_STR_GPRv, INTRINSIC_XED_IFORM_STR_MEMw, + INTRINSIC_XED_IFORM_STTILECFG_MEM, + INTRINSIC_XED_IFORM_STTILECFG_MEM_APX, + INTRINSIC_XED_IFORM_STUI, INTRINSIC_XED_IFORM_SUB_AL_IMMb, INTRINSIC_XED_IFORM_SUB_GPR8_GPR8_28, INTRINSIC_XED_IFORM_SUB_GPR8_GPR8_2A, INTRINSIC_XED_IFORM_SUB_GPR8_IMMb_80r5, INTRINSIC_XED_IFORM_SUB_GPR8_IMMb_82r5, INTRINSIC_XED_IFORM_SUB_GPR8_MEMb, + INTRINSIC_XED_IFORM_SUB_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_SUB_GPR8i8_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_SUB_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SUB_GPR8i8_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_SUB_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_SUB_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_SUB_GPR8i8_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_SUB_GPR8i8_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_SUB_GPRv_GPRv_29, INTRINSIC_XED_IFORM_SUB_GPRv_GPRv_2B, + INTRINSIC_XED_IFORM_SUB_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_SUB_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_SUB_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_SUB_GPRv_GPRv_IMMz_APX, + INTRINSIC_XED_IFORM_SUB_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_SUB_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_SUB_GPRv_IMMb, INTRINSIC_XED_IFORM_SUB_GPRv_IMMz, + INTRINSIC_XED_IFORM_SUB_GPRv_IMMz_APX, INTRINSIC_XED_IFORM_SUB_GPRv_MEMv, + INTRINSIC_XED_IFORM_SUB_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_SUB_GPRv_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_SUB_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_SUB_GPRv_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_SUB_MEMb_GPR8, INTRINSIC_XED_IFORM_SUB_MEMb_IMMb_80r5, INTRINSIC_XED_IFORM_SUB_MEMb_IMMb_82r5, + INTRINSIC_XED_IFORM_SUB_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_SUB_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_SUB_MEMv_GPRv, + INTRINSIC_XED_IFORM_SUB_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_SUB_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_SUB_MEMv_IMMb, INTRINSIC_XED_IFORM_SUB_MEMv_IMMz, + INTRINSIC_XED_IFORM_SUB_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_SUB_OrAX_IMMz, INTRINSIC_XED_IFORM_SUBPD_XMMpd_MEMpd, INTRINSIC_XED_IFORM_SUBPD_XMMpd_XMMpd, @@ -2038,16 +3110,25 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_SUB_LOCK_MEMv_IMMz, INTRINSIC_XED_IFORM_SWAPGS, INTRINSIC_XED_IFORM_SYSCALL, - INTRINSIC_XED_IFORM_SYSCALL_AMD, + INTRINSIC_XED_IFORM_SYSCALL_32, INTRINSIC_XED_IFORM_SYSENTER, INTRINSIC_XED_IFORM_SYSEXIT, INTRINSIC_XED_IFORM_SYSRET, INTRINSIC_XED_IFORM_SYSRET64, INTRINSIC_XED_IFORM_SYSRET_AMD, - INTRINSIC_XED_IFORM_T1MSKC_VGPR32d_GPR32d, - INTRINSIC_XED_IFORM_T1MSKC_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_T1MSKC_VGPRyy_GPRyy, - INTRINSIC_XED_IFORM_T1MSKC_VGPRyy_MEMy, + INTRINSIC_XED_IFORM_T1MSKC_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_T1MSKC_GPR32d_MEMd, + INTRINSIC_XED_IFORM_T1MSKC_GPRyy_GPRyy, + INTRINSIC_XED_IFORM_T1MSKC_GPRyy_MEMy, + INTRINSIC_XED_IFORM_TCMMIMFP16PS_TMMf32_TMM2f16_TMM2f16, + INTRINSIC_XED_IFORM_TCMMRLFP16PS_TMMf32_TMM2f16_TMM2f16, + INTRINSIC_XED_IFORM_TDCALL, + INTRINSIC_XED_IFORM_TDPBF16PS_TMMf32_TMM2bf16_TMM2bf16, + INTRINSIC_XED_IFORM_TDPBSSD_TMMi32_TMM4i8_TMM4i8, + INTRINSIC_XED_IFORM_TDPBSUD_TMMi32_TMM4i8_TMM4u8, + INTRINSIC_XED_IFORM_TDPBUSD_TMMi32_TMM4u8_TMM4i8, + INTRINSIC_XED_IFORM_TDPBUUD_TMMu32_TMM4u8_TMM4u8, + INTRINSIC_XED_IFORM_TDPFP16PS_TMMf32_TMM2f16_TMM2f16, INTRINSIC_XED_IFORM_TEST_AL_IMMb, INTRINSIC_XED_IFORM_TEST_GPR8_GPR8, INTRINSIC_XED_IFORM_TEST_GPR8_IMMb_F6r0, @@ -2062,26 +3143,38 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_TEST_MEMv_IMMz_F7r0, INTRINSIC_XED_IFORM_TEST_MEMv_IMMz_F7r1, INTRINSIC_XED_IFORM_TEST_OrAX_IMMz, + INTRINSIC_XED_IFORM_TESTUI, + INTRINSIC_XED_IFORM_TILELOADD_TMMu32_MEMu32, + INTRINSIC_XED_IFORM_TILELOADD_TMMu32_MEMu32_APX, + INTRINSIC_XED_IFORM_TILELOADDT1_TMMu32_MEMu32, + INTRINSIC_XED_IFORM_TILELOADDT1_TMMu32_MEMu32_APX, + INTRINSIC_XED_IFORM_TILERELEASE, + INTRINSIC_XED_IFORM_TILESTORED_MEMu32_TMMu32, + INTRINSIC_XED_IFORM_TILESTORED_MEMu32_TMMu32_APX, + INTRINSIC_XED_IFORM_TILEZERO_TMMu32, + INTRINSIC_XED_IFORM_TLBSYNC, INTRINSIC_XED_IFORM_TPAUSE_GPR32u32, - INTRINSIC_XED_IFORM_TPAUSE_GPR64u64, INTRINSIC_XED_IFORM_TZCNT_GPRv_GPRv, + INTRINSIC_XED_IFORM_TZCNT_GPRv_GPRv_APX, INTRINSIC_XED_IFORM_TZCNT_GPRv_MEMv, - INTRINSIC_XED_IFORM_TZMSK_VGPR32d_GPR32d, - INTRINSIC_XED_IFORM_TZMSK_VGPR32d_MEMd, - INTRINSIC_XED_IFORM_TZMSK_VGPRyy_GPRyy, - INTRINSIC_XED_IFORM_TZMSK_VGPRyy_MEMy, + INTRINSIC_XED_IFORM_TZCNT_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_TZMSK_GPR32d_GPR32d, + INTRINSIC_XED_IFORM_TZMSK_GPR32d_MEMd, + INTRINSIC_XED_IFORM_TZMSK_GPRyy_GPRyy, + INTRINSIC_XED_IFORM_TZMSK_GPRyy_MEMy, INTRINSIC_XED_IFORM_UCOMISD_XMMsd_MEMsd, INTRINSIC_XED_IFORM_UCOMISD_XMMsd_XMMsd, INTRINSIC_XED_IFORM_UCOMISS_XMMss_MEMss, INTRINSIC_XED_IFORM_UCOMISS_XMMss_XMMss, + INTRINSIC_XED_IFORM_UD0, INTRINSIC_XED_IFORM_UD0_GPR32_GPR32, INTRINSIC_XED_IFORM_UD0_GPR32_MEMd, INTRINSIC_XED_IFORM_UD1_GPR32_GPR32, INTRINSIC_XED_IFORM_UD1_GPR32_MEMd, INTRINSIC_XED_IFORM_UD2, + INTRINSIC_XED_IFORM_UIRET, INTRINSIC_XED_IFORM_UMONITOR_GPRa, INTRINSIC_XED_IFORM_UMWAIT_GPR32, - INTRINSIC_XED_IFORM_UMWAIT_GPR64, INTRINSIC_XED_IFORM_UNPCKHPD_XMMpd_MEMdq, INTRINSIC_XED_IFORM_UNPCKHPD_XMMpd_XMMq, INTRINSIC_XED_IFORM_UNPCKHPS_XMMps_MEMdq, @@ -2090,6 +3183,14 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_UNPCKLPD_XMMpd_XMMq, INTRINSIC_XED_IFORM_UNPCKLPS_XMMps_MEMdq, INTRINSIC_XED_IFORM_UNPCKLPS_XMMps_XMMq, + INTRINSIC_XED_IFORM_URDMSR_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_URDMSR_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_URDMSR_GPR64u64_IMM32, + INTRINSIC_XED_IFORM_URDMSR_GPR64u64_IMM32_APX, + INTRINSIC_XED_IFORM_UWRMSR_GPR64u64_GPR64u64, + INTRINSIC_XED_IFORM_UWRMSR_GPR64u64_GPR64u64_APX, + INTRINSIC_XED_IFORM_UWRMSR_IMM32_GPR64u64, + INTRINSIC_XED_IFORM_UWRMSR_IMM32_GPR64u64_APX, INTRINSIC_XED_IFORM_V4FMADDPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512, INTRINSIC_XED_IFORM_V4FMADDSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, INTRINSIC_XED_IFORM_V4FNMADDPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512, @@ -2104,6 +3205,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VADDPD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VADDPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VADDPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VADDPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VADDPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VADDPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VADDPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VADDPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VADDPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VADDPS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VADDPS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VADDPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2118,6 +3225,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VADDSD_XMMdq_XMMdq_XMMq, INTRINSIC_XED_IFORM_VADDSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VADDSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VADDSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VADDSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VADDSS_XMMdq_XMMdq_MEMd, INTRINSIC_XED_IFORM_VADDSS_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VADDSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2226,6 +3335,10 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VANDPS_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512, INTRINSIC_XED_IFORM_VANDPS_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512, INTRINSIC_XED_IFORM_VANDPS_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512, + INTRINSIC_XED_IFORM_VBCSTNEBF162PS_XMMf32_MEMbf16, + INTRINSIC_XED_IFORM_VBCSTNEBF162PS_YMMf32_MEMbf16, + INTRINSIC_XED_IFORM_VBCSTNESH2PS_XMMf32_MEMf16, + INTRINSIC_XED_IFORM_VBCSTNESH2PS_YMMf32_MEMf16, INTRINSIC_XED_IFORM_VBLENDMPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VBLENDMPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, INTRINSIC_XED_IFORM_VBLENDMPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512, @@ -2304,6 +3417,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCMPPD_XMMdq_XMMdq_XMMdq_IMMb, INTRINSIC_XED_IFORM_VCMPPD_YMMqq_YMMqq_MEMqq_IMMb, INTRINSIC_XED_IFORM_VCMPPD_YMMqq_YMMqq_YMMqq_IMMb, + INTRINSIC_XED_IFORM_VCMPPH_MASKmskw_MASKmskw_XMMf16_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VCMPPH_MASKmskw_MASKmskw_XMMf16_XMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VCMPPH_MASKmskw_MASKmskw_YMMf16_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VCMPPH_MASKmskw_MASKmskw_YMMf16_YMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VCMPPH_MASKmskw_MASKmskw_ZMMf16_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VCMPPH_MASKmskw_MASKmskw_ZMMf16_ZMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VCMPPS_MASKmskw_MASKmskw_XMMf32_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VCMPPS_MASKmskw_MASKmskw_XMMf32_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VCMPPS_MASKmskw_MASKmskw_YMMf32_MEMf32_IMM8_AVX512, @@ -2318,6 +3437,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCMPSD_MASKmskw_MASKmskw_XMMf64_XMMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VCMPSD_XMMdq_XMMdq_MEMq_IMMb, INTRINSIC_XED_IFORM_VCMPSD_XMMdq_XMMdq_XMMq_IMMb, + INTRINSIC_XED_IFORM_VCMPSH_MASKmskw_MASKmskw_XMMf16_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VCMPSH_MASKmskw_MASKmskw_XMMf16_XMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VCMPSS_MASKmskw_MASKmskw_XMMf32_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VCMPSS_MASKmskw_MASKmskw_XMMf32_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VCMPSS_XMMdq_XMMdq_MEMd_IMMb, @@ -2326,6 +3447,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCOMISD_XMMf64_XMMf64_AVX512, INTRINSIC_XED_IFORM_VCOMISD_XMMq_MEMq, INTRINSIC_XED_IFORM_VCOMISD_XMMq_XMMq, + INTRINSIC_XED_IFORM_VCOMISH_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCOMISH_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VCOMISS_XMMd_MEMd, INTRINSIC_XED_IFORM_VCOMISS_XMMd_XMMd, INTRINSIC_XED_IFORM_VCOMISS_XMMf32_MEMf32_AVX512, @@ -2352,6 +3475,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTDQ2PD_YMMqq_XMMdq, INTRINSIC_XED_IFORM_VCVTDQ2PD_ZMMf64_MASKmskw_MEMi32_AVX512, INTRINSIC_XED_IFORM_VCVTDQ2PD_ZMMf64_MASKmskw_YMMi32_AVX512, + INTRINSIC_XED_IFORM_VCVTDQ2PH_XMMf16_MASKmskw_MEMi32_AVX512_VL128, + INTRINSIC_XED_IFORM_VCVTDQ2PH_XMMf16_MASKmskw_MEMi32_AVX512_VL256, + INTRINSIC_XED_IFORM_VCVTDQ2PH_XMMf16_MASKmskw_XMMi32_AVX512, + INTRINSIC_XED_IFORM_VCVTDQ2PH_XMMf16_MASKmskw_YMMi32_AVX512, + INTRINSIC_XED_IFORM_VCVTDQ2PH_YMMf16_MASKmskw_MEMi32_AVX512, + INTRINSIC_XED_IFORM_VCVTDQ2PH_YMMf16_MASKmskw_ZMMi32_AVX512, INTRINSIC_XED_IFORM_VCVTDQ2PS_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VCVTDQ2PS_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VCVTDQ2PS_XMMf32_MASKmskw_MEMi32_AVX512, @@ -2368,10 +3497,22 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTNE2PS2BF16_YMMbf16_MASKmskw_YMMf32_YMMf32_AVX512, INTRINSIC_XED_IFORM_VCVTNE2PS2BF16_ZMMbf16_MASKmskw_ZMMf32_MEMf32_AVX512_VL512, INTRINSIC_XED_IFORM_VCVTNE2PS2BF16_ZMMbf16_MASKmskw_ZMMf32_ZMMf32_AVX512, + INTRINSIC_XED_IFORM_VCVTNEEBF162PS_XMMf32_MEM2bf16, + INTRINSIC_XED_IFORM_VCVTNEEBF162PS_YMMf32_MEM2bf16, + INTRINSIC_XED_IFORM_VCVTNEEPH2PS_XMMf32_MEM2f16, + INTRINSIC_XED_IFORM_VCVTNEEPH2PS_YMMf32_MEM2f16, + INTRINSIC_XED_IFORM_VCVTNEOBF162PS_XMMf32_MEM2bf16, + INTRINSIC_XED_IFORM_VCVTNEOBF162PS_YMMf32_MEM2bf16, + INTRINSIC_XED_IFORM_VCVTNEOPH2PS_XMMf32_MEM2f16, + INTRINSIC_XED_IFORM_VCVTNEOPH2PS_YMMf32_MEM2f16, INTRINSIC_XED_IFORM_VCVTNEPS2BF16_XMMbf16_MASKmskw_MEMf32_AVX512_VL128, INTRINSIC_XED_IFORM_VCVTNEPS2BF16_XMMbf16_MASKmskw_MEMf32_AVX512_VL256, INTRINSIC_XED_IFORM_VCVTNEPS2BF16_XMMbf16_MASKmskw_XMMf32_AVX512, INTRINSIC_XED_IFORM_VCVTNEPS2BF16_XMMbf16_MASKmskw_YMMf32_AVX512, + INTRINSIC_XED_IFORM_VCVTNEPS2BF16_XMMbf16_MEMf32_VL128, + INTRINSIC_XED_IFORM_VCVTNEPS2BF16_XMMbf16_MEMf32_VL256, + INTRINSIC_XED_IFORM_VCVTNEPS2BF16_XMMbf16_XMMf32, + INTRINSIC_XED_IFORM_VCVTNEPS2BF16_XMMbf16_YMMf32, INTRINSIC_XED_IFORM_VCVTNEPS2BF16_YMMbf16_MASKmskw_MEMf32_AVX512_VL512, INTRINSIC_XED_IFORM_VCVTNEPS2BF16_YMMbf16_MASKmskw_ZMMf32_AVX512, INTRINSIC_XED_IFORM_VCVTPD2DQ_XMMdq_MEMdq, @@ -2384,6 +3525,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTPD2DQ_XMMi32_MASKmskw_YMMf64_AVX512_VL256, INTRINSIC_XED_IFORM_VCVTPD2DQ_YMMi32_MASKmskw_MEMf64_AVX512_VL512, INTRINSIC_XED_IFORM_VCVTPD2DQ_YMMi32_MASKmskw_ZMMf64_AVX512_VL512, + INTRINSIC_XED_IFORM_VCVTPD2PH_XMMf16_MASKmskw_MEMf64_AVX512_VL128, + INTRINSIC_XED_IFORM_VCVTPD2PH_XMMf16_MASKmskw_MEMf64_AVX512_VL256, + INTRINSIC_XED_IFORM_VCVTPD2PH_XMMf16_MASKmskw_MEMf64_AVX512_VL512, + INTRINSIC_XED_IFORM_VCVTPD2PH_XMMf16_MASKmskw_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VCVTPD2PH_XMMf16_MASKmskw_YMMf64_AVX512, + INTRINSIC_XED_IFORM_VCVTPD2PH_XMMf16_MASKmskw_ZMMf64_AVX512, INTRINSIC_XED_IFORM_VCVTPD2PS_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VCVTPD2PS_XMMdq_MEMqq, INTRINSIC_XED_IFORM_VCVTPD2PS_XMMdq_XMMdq, @@ -2412,6 +3559,18 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTPD2UQQ_YMMu64_MASKmskw_YMMf64_AVX512, INTRINSIC_XED_IFORM_VCVTPD2UQQ_ZMMu64_MASKmskw_MEMf64_AVX512, INTRINSIC_XED_IFORM_VCVTPD2UQQ_ZMMu64_MASKmskw_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2DQ_XMMi32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2DQ_XMMi32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2DQ_YMMi32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2DQ_YMMi32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2DQ_ZMMi32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2DQ_ZMMi32_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PD_XMMf64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PD_XMMf64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PD_YMMf64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PD_YMMf64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PD_ZMMf64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PD_ZMMf64_MASKmskw_XMMf16_AVX512, INTRINSIC_XED_IFORM_VCVTPH2PS_XMMdq_MEMq, INTRINSIC_XED_IFORM_VCVTPH2PS_XMMdq_XMMq, INTRINSIC_XED_IFORM_VCVTPH2PS_XMMf32_MASKmskw_MEMf16_AVX512, @@ -2422,6 +3581,42 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTPH2PS_YMMqq_XMMdq, INTRINSIC_XED_IFORM_VCVTPH2PS_ZMMf32_MASKmskw_MEMf16_AVX512, INTRINSIC_XED_IFORM_VCVTPH2PS_ZMMf32_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PSX_XMMf32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PSX_XMMf32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PSX_YMMf32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PSX_YMMf32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PSX_ZMMf32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2PSX_ZMMf32_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2QQ_XMMi64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2QQ_XMMi64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2QQ_YMMi64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2QQ_YMMi64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2QQ_ZMMi64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2QQ_ZMMi64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UDQ_XMMu32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UDQ_XMMu32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UDQ_YMMu32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UDQ_YMMu32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UDQ_ZMMu32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UDQ_ZMMu32_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UQQ_XMMu64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UQQ_XMMu64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UQQ_YMMu64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UQQ_YMMu64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UQQ_ZMMu64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UQQ_ZMMu64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UW_XMMu16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UW_XMMu16_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UW_YMMu16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UW_YMMu16_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UW_ZMMu16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2UW_ZMMu16_MASKmskw_ZMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2W_XMMi16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2W_XMMi16_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2W_YMMi16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2W_YMMi16_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2W_ZMMi16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTPH2W_ZMMi16_MASKmskw_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VCVTPS2DQ_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VCVTPS2DQ_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VCVTPS2DQ_XMMi32_MASKmskw_MEMf32_AVX512, @@ -2452,6 +3647,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTPS2PH_XMMf16_MASKmskw_YMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VCVTPS2PH_XMMq_XMMdq_IMMb, INTRINSIC_XED_IFORM_VCVTPS2PH_YMMf16_MASKmskw_ZMMf32_IMM8_AVX512, + INTRINSIC_XED_IFORM_VCVTPS2PHX_XMMf16_MASKmskw_MEMf32_AVX512_VL128, + INTRINSIC_XED_IFORM_VCVTPS2PHX_XMMf16_MASKmskw_MEMf32_AVX512_VL256, + INTRINSIC_XED_IFORM_VCVTPS2PHX_XMMf16_MASKmskw_XMMf32_AVX512, + INTRINSIC_XED_IFORM_VCVTPS2PHX_XMMf16_MASKmskw_YMMf32_AVX512, + INTRINSIC_XED_IFORM_VCVTPS2PHX_YMMf16_MASKmskw_MEMf32_AVX512_VL512, + INTRINSIC_XED_IFORM_VCVTPS2PHX_YMMf16_MASKmskw_ZMMf32_AVX512, INTRINSIC_XED_IFORM_VCVTPS2QQ_XMMi64_MASKmskw_MEMf32_AVX512, INTRINSIC_XED_IFORM_VCVTPS2QQ_XMMi64_MASKmskw_XMMf32_AVX512, INTRINSIC_XED_IFORM_VCVTPS2QQ_YMMi64_MASKmskw_MEMf32_AVX512, @@ -2476,12 +3677,20 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTQQ2PD_YMMi64_MASKmskw_YMMf64_AVX512, INTRINSIC_XED_IFORM_VCVTQQ2PD_ZMMi64_MASKmskw_MEMf64_AVX512, INTRINSIC_XED_IFORM_VCVTQQ2PD_ZMMi64_MASKmskw_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VCVTQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL128, + INTRINSIC_XED_IFORM_VCVTQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL256, + INTRINSIC_XED_IFORM_VCVTQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL512, + INTRINSIC_XED_IFORM_VCVTQQ2PH_XMMf16_MASKmskw_XMMu64_AVX512, + INTRINSIC_XED_IFORM_VCVTQQ2PH_XMMf16_MASKmskw_YMMu64_AVX512, + INTRINSIC_XED_IFORM_VCVTQQ2PH_XMMf16_MASKmskw_ZMMu64_AVX512, INTRINSIC_XED_IFORM_VCVTQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL128, INTRINSIC_XED_IFORM_VCVTQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL256, INTRINSIC_XED_IFORM_VCVTQQ2PS_XMMf32_MASKmskw_XMMu64_AVX512_VL128, INTRINSIC_XED_IFORM_VCVTQQ2PS_XMMf32_MASKmskw_YMMu64_AVX512_VL256, INTRINSIC_XED_IFORM_VCVTQQ2PS_YMMf32_MASKmskw_MEMu64_AVX512_VL512, INTRINSIC_XED_IFORM_VCVTQQ2PS_YMMf32_MASKmskw_ZMMu64_AVX512_VL512, + INTRINSIC_XED_IFORM_VCVTSD2SH_XMMf16_MASKmskw_XMMf64_MEMf64_AVX512, + INTRINSIC_XED_IFORM_VCVTSD2SH_XMMf16_MASKmskw_XMMf64_XMMf64_AVX512, INTRINSIC_XED_IFORM_VCVTSD2SI_GPR32d_MEMq, INTRINSIC_XED_IFORM_VCVTSD2SI_GPR32d_XMMq, INTRINSIC_XED_IFORM_VCVTSD2SI_GPR32i32_MEMf64_AVX512, @@ -2498,6 +3707,18 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTSD2USI_GPR32u32_XMMf64_AVX512, INTRINSIC_XED_IFORM_VCVTSD2USI_GPR64u64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VCVTSD2USI_GPR64u64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2SD_XMMf64_MASKmskw_XMMf64_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2SD_XMMf64_MASKmskw_XMMf64_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2SI_GPR32i32_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2SI_GPR32i32_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2SI_GPR64i64_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2SI_GPR64i64_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2SS_XMMf32_MASKmskw_XMMf32_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2SS_XMMf32_MASKmskw_XMMf32_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2USI_GPR32u32_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2USI_GPR32u32_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2USI_GPR64u64_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTSH2USI_GPR64u64_XMMf16_AVX512, INTRINSIC_XED_IFORM_VCVTSI2SD_XMMdq_XMMdq_GPR32d, INTRINSIC_XED_IFORM_VCVTSI2SD_XMMdq_XMMdq_GPR64q, INTRINSIC_XED_IFORM_VCVTSI2SD_XMMdq_XMMdq_MEMd, @@ -2506,6 +3727,10 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTSI2SD_XMMf64_XMMf64_GPR64i64_AVX512, INTRINSIC_XED_IFORM_VCVTSI2SD_XMMf64_XMMf64_MEMi32_AVX512, INTRINSIC_XED_IFORM_VCVTSI2SD_XMMf64_XMMf64_MEMi64_AVX512, + INTRINSIC_XED_IFORM_VCVTSI2SH_XMMf16_XMMf16_GPR32i32_AVX512, + INTRINSIC_XED_IFORM_VCVTSI2SH_XMMf16_XMMf16_GPR64i64_AVX512, + INTRINSIC_XED_IFORM_VCVTSI2SH_XMMf16_XMMf16_MEMi32_AVX512, + INTRINSIC_XED_IFORM_VCVTSI2SH_XMMf16_XMMf16_MEMi64_AVX512, INTRINSIC_XED_IFORM_VCVTSI2SS_XMMdq_XMMdq_GPR32d, INTRINSIC_XED_IFORM_VCVTSI2SS_XMMdq_XMMdq_GPR64q, INTRINSIC_XED_IFORM_VCVTSI2SS_XMMdq_XMMdq_MEMd, @@ -2518,6 +3743,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTSS2SD_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VCVTSS2SD_XMMf64_MASKmskw_XMMf32_MEMf32_AVX512, INTRINSIC_XED_IFORM_VCVTSS2SD_XMMf64_MASKmskw_XMMf32_XMMf32_AVX512, + INTRINSIC_XED_IFORM_VCVTSS2SH_XMMf16_MASKmskw_XMMf16_MEMf32_AVX512, + INTRINSIC_XED_IFORM_VCVTSS2SH_XMMf16_MASKmskw_XMMf16_XMMf32_AVX512, INTRINSIC_XED_IFORM_VCVTSS2SI_GPR32d_MEMd, INTRINSIC_XED_IFORM_VCVTSS2SI_GPR32d_XMMd, INTRINSIC_XED_IFORM_VCVTSS2SI_GPR32i32_MEMf32_AVX512, @@ -2558,6 +3785,42 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTTPD2UQQ_YMMu64_MASKmskw_YMMf64_AVX512, INTRINSIC_XED_IFORM_VCVTTPD2UQQ_ZMMu64_MASKmskw_MEMf64_AVX512, INTRINSIC_XED_IFORM_VCVTTPD2UQQ_ZMMu64_MASKmskw_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2DQ_XMMi32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2DQ_XMMi32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2DQ_YMMi32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2DQ_YMMi32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2DQ_ZMMi32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2DQ_ZMMi32_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2QQ_XMMi64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2QQ_XMMi64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2QQ_YMMi64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2QQ_YMMi64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2QQ_ZMMi64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2QQ_ZMMi64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UDQ_XMMu32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UDQ_XMMu32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UDQ_YMMu32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UDQ_YMMu32_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UDQ_ZMMu32_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UDQ_ZMMu32_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UQQ_XMMu64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UQQ_XMMu64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UQQ_YMMu64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UQQ_YMMu64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UQQ_ZMMu64_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UQQ_ZMMu64_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UW_XMMu16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UW_XMMu16_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UW_YMMu16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UW_YMMu16_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UW_ZMMu16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2UW_ZMMu16_MASKmskw_ZMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2W_XMMi16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2W_XMMi16_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2W_YMMi16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2W_YMMi16_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2W_ZMMi16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTPH2W_ZMMi16_MASKmskw_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VCVTTPS2DQ_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VCVTTPS2DQ_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VCVTTPS2DQ_XMMi32_MASKmskw_MEMf32_AVX512, @@ -2598,6 +3861,14 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTTSD2USI_GPR32u32_XMMf64_AVX512, INTRINSIC_XED_IFORM_VCVTTSD2USI_GPR64u64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VCVTTSD2USI_GPR64u64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VCVTTSH2SI_GPR32i32_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTSH2SI_GPR32i32_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTSH2SI_GPR64i64_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTSH2SI_GPR64i64_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTSH2USI_GPR32u32_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTSH2USI_GPR32u32_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTSH2USI_GPR64u64_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VCVTTSH2USI_GPR64u64_XMMf16_AVX512, INTRINSIC_XED_IFORM_VCVTTSS2SI_GPR32d_MEMd, INTRINSIC_XED_IFORM_VCVTTSS2SI_GPR32d_XMMd, INTRINSIC_XED_IFORM_VCVTTSS2SI_GPR32i32_MEMf32_AVX512, @@ -2616,6 +3887,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTUDQ2PD_YMMf64_MASKmskw_XMMu32_AVX512, INTRINSIC_XED_IFORM_VCVTUDQ2PD_ZMMf64_MASKmskw_MEMu32_AVX512, INTRINSIC_XED_IFORM_VCVTUDQ2PD_ZMMf64_MASKmskw_YMMu32_AVX512, + INTRINSIC_XED_IFORM_VCVTUDQ2PH_XMMf16_MASKmskw_MEMu32_AVX512_VL128, + INTRINSIC_XED_IFORM_VCVTUDQ2PH_XMMf16_MASKmskw_MEMu32_AVX512_VL256, + INTRINSIC_XED_IFORM_VCVTUDQ2PH_XMMf16_MASKmskw_XMMu32_AVX512, + INTRINSIC_XED_IFORM_VCVTUDQ2PH_XMMf16_MASKmskw_YMMu32_AVX512, + INTRINSIC_XED_IFORM_VCVTUDQ2PH_YMMf16_MASKmskw_MEMu32_AVX512, + INTRINSIC_XED_IFORM_VCVTUDQ2PH_YMMf16_MASKmskw_ZMMu32_AVX512, INTRINSIC_XED_IFORM_VCVTUDQ2PS_XMMf32_MASKmskw_MEMu32_AVX512, INTRINSIC_XED_IFORM_VCVTUDQ2PS_XMMf32_MASKmskw_XMMu32_AVX512, INTRINSIC_XED_IFORM_VCVTUDQ2PS_YMMf32_MASKmskw_MEMu32_AVX512, @@ -2628,6 +3905,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTUQQ2PD_YMMf64_MASKmskw_YMMu64_AVX512, INTRINSIC_XED_IFORM_VCVTUQQ2PD_ZMMf64_MASKmskw_MEMu64_AVX512, INTRINSIC_XED_IFORM_VCVTUQQ2PD_ZMMf64_MASKmskw_ZMMu64_AVX512, + INTRINSIC_XED_IFORM_VCVTUQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL128, + INTRINSIC_XED_IFORM_VCVTUQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL256, + INTRINSIC_XED_IFORM_VCVTUQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL512, + INTRINSIC_XED_IFORM_VCVTUQQ2PH_XMMf16_MASKmskw_XMMu64_AVX512, + INTRINSIC_XED_IFORM_VCVTUQQ2PH_XMMf16_MASKmskw_YMMu64_AVX512, + INTRINSIC_XED_IFORM_VCVTUQQ2PH_XMMf16_MASKmskw_ZMMu64_AVX512, INTRINSIC_XED_IFORM_VCVTUQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL128, INTRINSIC_XED_IFORM_VCVTUQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL256, INTRINSIC_XED_IFORM_VCVTUQQ2PS_XMMf32_MASKmskw_XMMu64_AVX512_VL128, @@ -2638,10 +3921,26 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VCVTUSI2SD_XMMf64_XMMf64_GPR64u64_AVX512, INTRINSIC_XED_IFORM_VCVTUSI2SD_XMMf64_XMMf64_MEMu32_AVX512, INTRINSIC_XED_IFORM_VCVTUSI2SD_XMMf64_XMMf64_MEMu64_AVX512, + INTRINSIC_XED_IFORM_VCVTUSI2SH_XMMf16_XMMf16_GPR32u32_AVX512, + INTRINSIC_XED_IFORM_VCVTUSI2SH_XMMf16_XMMf16_GPR64u64_AVX512, + INTRINSIC_XED_IFORM_VCVTUSI2SH_XMMf16_XMMf16_MEMu32_AVX512, + INTRINSIC_XED_IFORM_VCVTUSI2SH_XMMf16_XMMf16_MEMu64_AVX512, INTRINSIC_XED_IFORM_VCVTUSI2SS_XMMf32_XMMf32_GPR32u32_AVX512, INTRINSIC_XED_IFORM_VCVTUSI2SS_XMMf32_XMMf32_GPR64u64_AVX512, INTRINSIC_XED_IFORM_VCVTUSI2SS_XMMf32_XMMf32_MEMu32_AVX512, INTRINSIC_XED_IFORM_VCVTUSI2SS_XMMf32_XMMf32_MEMu64_AVX512, + INTRINSIC_XED_IFORM_VCVTUW2PH_XMMf16_MASKmskw_MEMu16_AVX512, + INTRINSIC_XED_IFORM_VCVTUW2PH_XMMf16_MASKmskw_XMMu16_AVX512, + INTRINSIC_XED_IFORM_VCVTUW2PH_YMMf16_MASKmskw_MEMu16_AVX512, + INTRINSIC_XED_IFORM_VCVTUW2PH_YMMf16_MASKmskw_YMMu16_AVX512, + INTRINSIC_XED_IFORM_VCVTUW2PH_ZMMf16_MASKmskw_MEMu16_AVX512, + INTRINSIC_XED_IFORM_VCVTUW2PH_ZMMf16_MASKmskw_ZMMu16_AVX512, + INTRINSIC_XED_IFORM_VCVTW2PH_XMMf16_MASKmskw_MEMi16_AVX512, + INTRINSIC_XED_IFORM_VCVTW2PH_XMMf16_MASKmskw_XMMi16_AVX512, + INTRINSIC_XED_IFORM_VCVTW2PH_YMMf16_MASKmskw_MEMi16_AVX512, + INTRINSIC_XED_IFORM_VCVTW2PH_YMMf16_MASKmskw_YMMi16_AVX512, + INTRINSIC_XED_IFORM_VCVTW2PH_ZMMf16_MASKmskw_MEMi16_AVX512, + INTRINSIC_XED_IFORM_VCVTW2PH_ZMMf16_MASKmskw_ZMMi16_AVX512, INTRINSIC_XED_IFORM_VDBPSADBW_XMMu16_MASKmskw_XMMu8_MEMu8_IMM8_AVX512, INTRINSIC_XED_IFORM_VDBPSADBW_XMMu16_MASKmskw_XMMu8_XMMu8_IMM8_AVX512, INTRINSIC_XED_IFORM_VDBPSADBW_YMMu16_MASKmskw_YMMu8_MEMu8_IMM8_AVX512, @@ -2658,6 +3957,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VDIVPD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VDIVPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VDIVPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VDIVPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VDIVPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VDIVPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VDIVPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VDIVPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VDIVPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VDIVPS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VDIVPS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VDIVPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2672,6 +3977,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VDIVSD_XMMdq_XMMdq_XMMq, INTRINSIC_XED_IFORM_VDIVSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VDIVSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VDIVSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VDIVSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VDIVSS_XMMdq_XMMdq_MEMd, INTRINSIC_XED_IFORM_VDIVSS_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VDIVSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2740,6 +4047,22 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VEXTRACTPS_GPR32f32_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VEXTRACTPS_MEMd_XMMdq_IMMb, INTRINSIC_XED_IFORM_VEXTRACTPS_MEMf32_XMMf32_IMM8_AVX512, + INTRINSIC_XED_IFORM_VFCMADDCPH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMADDCPH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMADDCPH_YMM2f16_MASKmskw_YMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMADDCPH_YMM2f16_MASKmskw_YMM2f16_YMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMADDCPH_ZMM2f16_MASKmskw_ZMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMADDCPH_ZMM2f16_MASKmskw_ZMM2f16_ZMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMADDCSH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMADDCSH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMULCPH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMULCPH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMULCPH_YMM2f16_MASKmskw_YMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMULCPH_YMM2f16_MASKmskw_YMM2f16_YMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMULCPH_ZMM2f16_MASKmskw_ZMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMULCPH_ZMM2f16_MASKmskw_ZMM2f16_ZMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMULCSH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFCMULCSH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512, INTRINSIC_XED_IFORM_VFIXUPIMMPD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VFIXUPIMMPD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VFIXUPIMMPD_YMMf64_MASKmskw_YMMf64_MEMf64_IMM8_AVX512, @@ -2766,6 +4089,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMADD132PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMADD132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMADD132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMADD132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMADD132PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMADD132PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMADD132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2780,6 +4109,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMADD132SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFMADD132SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMADD132SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMADD132SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD132SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFMADD132SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFMADD132SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFMADD132SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2794,6 +4125,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMADD213PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMADD213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMADD213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMADD213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMADD213PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMADD213PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMADD213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2808,6 +4145,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMADD213SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFMADD213SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMADD213SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMADD213SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD213SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFMADD213SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFMADD213SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFMADD213SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2822,6 +4161,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMADD231PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMADD231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMADD231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMADD231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMADD231PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMADD231PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMADD231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2836,10 +4181,20 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMADD231SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFMADD231SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMADD231SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMADD231SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADD231SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFMADD231SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFMADD231SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFMADD231SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, INTRINSIC_XED_IFORM_VFMADD231SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512, + INTRINSIC_XED_IFORM_VFMADDCPH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMADDCPH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMADDCPH_YMM2f16_MASKmskw_YMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMADDCPH_YMM2f16_MASKmskw_YMM2f16_YMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMADDCPH_ZMM2f16_MASKmskw_ZMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMADDCPH_ZMM2f16_MASKmskw_ZMM2f16_ZMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMADDCSH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMADDCSH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512, INTRINSIC_XED_IFORM_VFMADDPD_XMMdq_XMMdq_MEMdq_XMMdq, INTRINSIC_XED_IFORM_VFMADDPD_XMMdq_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMADDPD_XMMdq_XMMdq_XMMdq_XMMdq, @@ -2868,6 +4223,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMADDSUB132PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMADDSUB132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMADDSUB132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMADDSUB132PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMADDSUB132PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMADDSUB132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2888,6 +4249,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMADDSUB213PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMADDSUB213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMADDSUB213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMADDSUB213PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMADDSUB213PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMADDSUB213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2908,6 +4275,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMADDSUB231PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMADDSUB231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMADDSUB231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMADDSUB231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMADDSUB231PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMADDSUB231PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMADDSUB231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2940,6 +4313,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUB132PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMSUB132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMSUB132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMSUB132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMSUB132PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMSUB132PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMSUB132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2954,6 +4333,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUB132SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFMSUB132SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMSUB132SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMSUB132SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB132SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFMSUB132SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFMSUB132SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFMSUB132SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2968,6 +4349,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUB213PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMSUB213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMSUB213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMSUB213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMSUB213PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMSUB213PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMSUB213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2982,6 +4369,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUB213SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFMSUB213SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMSUB213SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMSUB213SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB213SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFMSUB213SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFMSUB213SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFMSUB213SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -2996,6 +4385,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUB231PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMSUB231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMSUB231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMSUB231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMSUB231PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMSUB231PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMSUB231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3010,6 +4405,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUB231SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFMSUB231SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMSUB231SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMSUB231SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUB231SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFMSUB231SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFMSUB231SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFMSUB231SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3024,6 +4421,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUBADD132PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMSUBADD132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMSUBADD132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMSUBADD132PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMSUBADD132PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMSUBADD132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3044,6 +4447,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUBADD213PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMSUBADD213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMSUBADD213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMSUBADD213PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMSUBADD213PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMSUBADD213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3064,6 +4473,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUBADD231PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFMSUBADD231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFMSUBADD231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFMSUBADD231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFMSUBADD231PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFMSUBADD231PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFMSUBADD231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3104,6 +4519,14 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFMSUBSS_XMMdq_XMMd_MEMd_XMMd, INTRINSIC_XED_IFORM_VFMSUBSS_XMMdq_XMMd_XMMd_MEMd, INTRINSIC_XED_IFORM_VFMSUBSS_XMMdq_XMMd_XMMd_XMMd, + INTRINSIC_XED_IFORM_VFMULCPH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMULCPH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMULCPH_YMM2f16_MASKmskw_YMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMULCPH_YMM2f16_MASKmskw_YMM2f16_YMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMULCPH_ZMM2f16_MASKmskw_ZMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMULCPH_ZMM2f16_MASKmskw_ZMM2f16_ZMM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMULCSH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512, + INTRINSIC_XED_IFORM_VFMULCSH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512, INTRINSIC_XED_IFORM_VFNMADD132PD_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFNMADD132PD_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFNMADD132PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, @@ -3114,6 +4537,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMADD132PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFNMADD132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMADD132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMADD132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMADD132PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFNMADD132PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFNMADD132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3128,6 +4557,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMADD132SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFNMADD132SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMADD132SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMADD132SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD132SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMADD132SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFNMADD132SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFNMADD132SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3142,6 +4573,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMADD213PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFNMADD213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMADD213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMADD213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMADD213PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFNMADD213PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFNMADD213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3156,6 +4593,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMADD213SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFNMADD213SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMADD213SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMADD213SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD213SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMADD213SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFNMADD213SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFNMADD213SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3170,6 +4609,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMADD231PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFNMADD231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMADD231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMADD231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMADD231PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFNMADD231PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFNMADD231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3184,6 +4629,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMADD231SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFNMADD231SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMADD231SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMADD231SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMADD231SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMADD231SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFNMADD231SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFNMADD231SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3216,6 +4663,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMSUB132PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFNMSUB132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMSUB132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMSUB132PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFNMSUB132PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFNMSUB132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3230,6 +4683,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMSUB132SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFNMSUB132SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMSUB132SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB132SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB132SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMSUB132SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFNMSUB132SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFNMSUB132SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3244,6 +4699,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMSUB213PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFNMSUB213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMSUB213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMSUB213PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFNMSUB213PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFNMSUB213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3258,6 +4719,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMSUB213SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFNMSUB213SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMSUB213SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB213SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB213SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMSUB213SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFNMSUB213SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFNMSUB213SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3272,6 +4735,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMSUB231PD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VFNMSUB231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMSUB231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMSUB231PS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VFNMSUB231PS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VFNMSUB231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3286,6 +4755,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFNMSUB231SD_XMMdq_XMMq_XMMq, INTRINSIC_XED_IFORM_VFNMSUB231SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VFNMSUB231SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB231SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VFNMSUB231SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VFNMSUB231SS_XMMdq_XMMd_MEMd, INTRINSIC_XED_IFORM_VFNMSUB231SS_XMMdq_XMMd_XMMd, INTRINSIC_XED_IFORM_VFNMSUB231SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3314,6 +4785,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFPCLASSPD_MASKmskw_MASKmskw_XMMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VFPCLASSPD_MASKmskw_MASKmskw_YMMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VFPCLASSPD_MASKmskw_MASKmskw_ZMMf64_IMM8_AVX512, + INTRINSIC_XED_IFORM_VFPCLASSPH_MASKmskw_MASKmskw_MEMf16_IMM8_AVX512_VL128, + INTRINSIC_XED_IFORM_VFPCLASSPH_MASKmskw_MASKmskw_MEMf16_IMM8_AVX512_VL256, + INTRINSIC_XED_IFORM_VFPCLASSPH_MASKmskw_MASKmskw_MEMf16_IMM8_AVX512_VL512, + INTRINSIC_XED_IFORM_VFPCLASSPH_MASKmskw_MASKmskw_XMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VFPCLASSPH_MASKmskw_MASKmskw_YMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VFPCLASSPH_MASKmskw_MASKmskw_ZMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL128, INTRINSIC_XED_IFORM_VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL256, INTRINSIC_XED_IFORM_VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL512, @@ -3322,6 +4799,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VFPCLASSPS_MASKmskw_MASKmskw_ZMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VFPCLASSSD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VFPCLASSSD_MASKmskw_MASKmskw_XMMf64_IMM8_AVX512, + INTRINSIC_XED_IFORM_VFPCLASSSH_MASKmskw_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VFPCLASSSH_MASKmskw_MASKmskw_XMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VFPCLASSSS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VFPCLASSSS_MASKmskw_MASKmskw_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VFRCZPD_XMMdq_MEMdq, @@ -3370,6 +4849,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VGETEXPPD_YMMf64_MASKmskw_YMMf64_AVX512, INTRINSIC_XED_IFORM_VGETEXPPD_ZMMf64_MASKmskw_MEMf64_AVX512, INTRINSIC_XED_IFORM_VGETEXPPD_ZMMf64_MASKmskw_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VGETEXPPH_XMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VGETEXPPH_XMMf16_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VGETEXPPH_YMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VGETEXPPH_YMMf16_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VGETEXPPH_ZMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VGETEXPPH_ZMMf16_MASKmskw_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VGETEXPPS_XMMf32_MASKmskw_MEMf32_AVX512, INTRINSIC_XED_IFORM_VGETEXPPS_XMMf32_MASKmskw_XMMf32_AVX512, INTRINSIC_XED_IFORM_VGETEXPPS_YMMf32_MASKmskw_MEMf32_AVX512, @@ -3378,6 +4863,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VGETEXPPS_ZMMf32_MASKmskw_ZMMf32_AVX512, INTRINSIC_XED_IFORM_VGETEXPSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VGETEXPSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VGETEXPSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VGETEXPSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VGETEXPSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, INTRINSIC_XED_IFORM_VGETEXPSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512, INTRINSIC_XED_IFORM_VGETMANTPD_XMMf64_MASKmskw_MEMf64_IMM8_AVX512, @@ -3386,6 +4873,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VGETMANTPD_YMMf64_MASKmskw_YMMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VGETMANTPD_ZMMf64_MASKmskw_MEMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VGETMANTPD_ZMMf64_MASKmskw_ZMMf64_IMM8_AVX512, + INTRINSIC_XED_IFORM_VGETMANTPH_XMMf16_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VGETMANTPH_XMMf16_MASKmskw_XMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VGETMANTPH_YMMf16_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VGETMANTPH_YMMf16_MASKmskw_YMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VGETMANTPH_ZMMf16_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VGETMANTPH_ZMMf16_MASKmskw_ZMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VGETMANTPS_XMMf32_MASKmskw_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VGETMANTPS_XMMf32_MASKmskw_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VGETMANTPS_YMMf32_MASKmskw_MEMf32_IMM8_AVX512, @@ -3394,6 +4887,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VGETMANTPS_ZMMf32_MASKmskw_ZMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VGETMANTSD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VGETMANTSD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512, + INTRINSIC_XED_IFORM_VGETMANTSH_XMMf16_MASKmskw_XMMf16_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VGETMANTSH_XMMf16_MASKmskw_XMMf16_XMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VGETMANTSS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VGETMANTSS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VGF2P8AFFINEINVQB_XMMu8_MASKmskw_XMMu8_MEMu64_IMM8_AVX512, @@ -3477,7 +4972,7 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VLDDQU_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VLDDQU_YMMqq_MEMqq, INTRINSIC_XED_IFORM_VLDMXCSR_MEMd, - INTRINSIC_XED_IFORM_VMASKMOVDQU_XMMdq_XMMdq, + INTRINSIC_XED_IFORM_VMASKMOVDQU_XMMxub_XMMxub, INTRINSIC_XED_IFORM_VMASKMOVPD_MEMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VMASKMOVPD_MEMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VMASKMOVPD_XMMdq_XMMdq_MEMdq, @@ -3496,6 +4991,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VMAXPD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VMAXPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VMAXPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VMAXPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMAXPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VMAXPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMAXPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VMAXPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMAXPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VMAXPS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VMAXPS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VMAXPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3510,6 +5011,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VMAXSD_XMMdq_XMMdq_XMMq, INTRINSIC_XED_IFORM_VMAXSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VMAXSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VMAXSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMAXSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VMAXSS_XMMdq_XMMdq_MEMd, INTRINSIC_XED_IFORM_VMAXSS_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VMAXSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3527,6 +5030,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VMINPD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VMINPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VMINPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VMINPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMINPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VMINPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMINPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VMINPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMINPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VMINPS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VMINPS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VMINPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3541,6 +5050,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VMINSD_XMMdq_XMMdq_XMMq, INTRINSIC_XED_IFORM_VMINSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VMINSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VMINSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMINSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VMINSS_XMMdq_XMMdq_MEMd, INTRINSIC_XED_IFORM_VMINSS_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VMINSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3591,7 +5102,7 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VMOVD_XMMu32_GPR32u32_AVX512, INTRINSIC_XED_IFORM_VMOVD_XMMu32_MEMu32_AVX512, INTRINSIC_XED_IFORM_VMOVDDUP_XMMdq_MEMq, - INTRINSIC_XED_IFORM_VMOVDDUP_XMMdq_XMMdq, + INTRINSIC_XED_IFORM_VMOVDDUP_XMMdq_XMMq, INTRINSIC_XED_IFORM_VMOVDDUP_XMMf64_MASKmskw_MEMf64_AVX512, INTRINSIC_XED_IFORM_VMOVDDUP_XMMf64_MASKmskw_XMMf64_AVX512, INTRINSIC_XED_IFORM_VMOVDDUP_YMMf64_MASKmskw_MEMf64_AVX512, @@ -3734,6 +5245,9 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VMOVSD_XMMdq_XMMdq_XMMq_11, INTRINSIC_XED_IFORM_VMOVSD_XMMf64_MASKmskw_MEMf64_AVX512, INTRINSIC_XED_IFORM_VMOVSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VMOVSH_MEMf16_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VMOVSH_XMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMOVSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VMOVSHDUP_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VMOVSHDUP_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VMOVSHDUP_XMMf32_MASKmskw_MEMf32_AVX512, @@ -3795,6 +5309,10 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VMOVUPS_YMMqq_YMMqq_11, INTRINSIC_XED_IFORM_VMOVUPS_ZMMf32_MASKmskw_MEMf32_AVX512, INTRINSIC_XED_IFORM_VMOVUPS_ZMMf32_MASKmskw_ZMMf32_AVX512, + INTRINSIC_XED_IFORM_VMOVW_GPR32f16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VMOVW_MEMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VMOVW_XMMf16_GPR32f16_AVX512, + INTRINSIC_XED_IFORM_VMOVW_XMMf16_MEMf16_AVX512, INTRINSIC_XED_IFORM_VMPSADBW_XMMdq_XMMdq_MEMdq_IMMb, INTRINSIC_XED_IFORM_VMPSADBW_XMMdq_XMMdq_XMMdq_IMMb, INTRINSIC_XED_IFORM_VMPSADBW_YMMqq_YMMqq_MEMqq_IMMb, @@ -3818,6 +5336,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VMULPD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VMULPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VMULPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VMULPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMULPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VMULPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMULPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VMULPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMULPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VMULPS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VMULPS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VMULPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -3832,6 +5356,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VMULSD_XMMdq_XMMdq_XMMq, INTRINSIC_XED_IFORM_VMULSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VMULSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VMULSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VMULSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VMULSS_XMMdq_XMMdq_MEMd, INTRINSIC_XED_IFORM_VMULSS_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VMULSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -4398,30 +5924,94 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VPCONFLICTQ_YMMu64_MASKmskw_YMMu64_AVX512, INTRINSIC_XED_IFORM_VPCONFLICTQ_ZMMu64_MASKmskw_MEMu64_AVX512CD, INTRINSIC_XED_IFORM_VPCONFLICTQ_ZMMu64_MASKmskw_ZMMu64_AVX512CD, + INTRINSIC_XED_IFORM_VPDPBSSD_XMMi32_XMM4i8_MEM4i8, + INTRINSIC_XED_IFORM_VPDPBSSD_XMMi32_XMM4i8_XMM4i8, + INTRINSIC_XED_IFORM_VPDPBSSD_YMMi32_YMM4i8_MEM4i8, + INTRINSIC_XED_IFORM_VPDPBSSD_YMMi32_YMM4i8_YMM4i8, + INTRINSIC_XED_IFORM_VPDPBSSDS_XMMi32_XMM4i8_MEM4i8, + INTRINSIC_XED_IFORM_VPDPBSSDS_XMMi32_XMM4i8_XMM4i8, + INTRINSIC_XED_IFORM_VPDPBSSDS_YMMi32_YMM4i8_MEM4i8, + INTRINSIC_XED_IFORM_VPDPBSSDS_YMMi32_YMM4i8_YMM4i8, + INTRINSIC_XED_IFORM_VPDPBSUD_XMMi32_XMM4i8_MEM4u8, + INTRINSIC_XED_IFORM_VPDPBSUD_XMMi32_XMM4i8_XMM4u8, + INTRINSIC_XED_IFORM_VPDPBSUD_YMMi32_YMM4i8_MEM4u8, + INTRINSIC_XED_IFORM_VPDPBSUD_YMMi32_YMM4i8_YMM4u8, + INTRINSIC_XED_IFORM_VPDPBSUDS_XMMi32_XMM4i8_MEM4u8, + INTRINSIC_XED_IFORM_VPDPBSUDS_XMMi32_XMM4i8_XMM4u8, + INTRINSIC_XED_IFORM_VPDPBSUDS_YMMi32_YMM4i8_MEM4u8, + INTRINSIC_XED_IFORM_VPDPBSUDS_YMMi32_YMM4i8_YMM4u8, INTRINSIC_XED_IFORM_VPDPBUSD_XMMi32_MASKmskw_XMMu8_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPBUSD_XMMi32_MASKmskw_XMMu8_XMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPBUSD_XMMi32_XMMu32_MEMu32, + INTRINSIC_XED_IFORM_VPDPBUSD_XMMi32_XMMu32_XMMu32, INTRINSIC_XED_IFORM_VPDPBUSD_YMMi32_MASKmskw_YMMu8_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPBUSD_YMMi32_MASKmskw_YMMu8_YMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPBUSD_YMMi32_YMMu32_MEMu32, + INTRINSIC_XED_IFORM_VPDPBUSD_YMMi32_YMMu32_YMMu32, INTRINSIC_XED_IFORM_VPDPBUSD_ZMMi32_MASKmskw_ZMMu8_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPBUSD_ZMMi32_MASKmskw_ZMMu8_ZMMu32_AVX512, INTRINSIC_XED_IFORM_VPDPBUSDS_XMMi32_MASKmskw_XMMu8_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPBUSDS_XMMi32_MASKmskw_XMMu8_XMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPBUSDS_XMMi32_XMMu32_MEMu32, + INTRINSIC_XED_IFORM_VPDPBUSDS_XMMi32_XMMu32_XMMu32, INTRINSIC_XED_IFORM_VPDPBUSDS_YMMi32_MASKmskw_YMMu8_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPBUSDS_YMMi32_MASKmskw_YMMu8_YMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPBUSDS_YMMi32_YMMu32_MEMu32, + INTRINSIC_XED_IFORM_VPDPBUSDS_YMMi32_YMMu32_YMMu32, INTRINSIC_XED_IFORM_VPDPBUSDS_ZMMi32_MASKmskw_ZMMu8_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPBUSDS_ZMMi32_MASKmskw_ZMMu8_ZMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPBUUD_XMMu32_XMM4u8_MEM4u8, + INTRINSIC_XED_IFORM_VPDPBUUD_XMMu32_XMM4u8_XMM4u8, + INTRINSIC_XED_IFORM_VPDPBUUD_YMMu32_YMM4u8_MEM4u8, + INTRINSIC_XED_IFORM_VPDPBUUD_YMMu32_YMM4u8_YMM4u8, + INTRINSIC_XED_IFORM_VPDPBUUDS_XMMu32_XMM4u8_MEM4u8, + INTRINSIC_XED_IFORM_VPDPBUUDS_XMMu32_XMM4u8_XMM4u8, + INTRINSIC_XED_IFORM_VPDPBUUDS_YMMu32_YMM4u8_MEM4u8, + INTRINSIC_XED_IFORM_VPDPBUUDS_YMMu32_YMM4u8_YMM4u8, INTRINSIC_XED_IFORM_VPDPWSSD_XMMi32_MASKmskw_XMMi16_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPWSSD_XMMi32_MASKmskw_XMMi16_XMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPWSSD_XMMi32_XMMu32_MEMu32, + INTRINSIC_XED_IFORM_VPDPWSSD_XMMi32_XMMu32_XMMu32, INTRINSIC_XED_IFORM_VPDPWSSD_YMMi32_MASKmskw_YMMi16_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPWSSD_YMMi32_MASKmskw_YMMi16_YMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPWSSD_YMMi32_YMMu32_MEMu32, + INTRINSIC_XED_IFORM_VPDPWSSD_YMMi32_YMMu32_YMMu32, INTRINSIC_XED_IFORM_VPDPWSSD_ZMMi32_MASKmskw_ZMMi16_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPWSSD_ZMMi32_MASKmskw_ZMMi16_ZMMu32_AVX512, INTRINSIC_XED_IFORM_VPDPWSSDS_XMMi32_MASKmskw_XMMi16_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPWSSDS_XMMi32_MASKmskw_XMMi16_XMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPWSSDS_XMMi32_XMMu32_MEMu32, + INTRINSIC_XED_IFORM_VPDPWSSDS_XMMi32_XMMu32_XMMu32, INTRINSIC_XED_IFORM_VPDPWSSDS_YMMi32_MASKmskw_YMMi16_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPWSSDS_YMMi32_MASKmskw_YMMi16_YMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPWSSDS_YMMi32_YMMu32_MEMu32, + INTRINSIC_XED_IFORM_VPDPWSSDS_YMMi32_YMMu32_YMMu32, INTRINSIC_XED_IFORM_VPDPWSSDS_ZMMi32_MASKmskw_ZMMi16_MEMu32_AVX512, INTRINSIC_XED_IFORM_VPDPWSSDS_ZMMi32_MASKmskw_ZMMi16_ZMMu32_AVX512, + INTRINSIC_XED_IFORM_VPDPWSUD_XMMi32_XMM2i16_MEM2u16, + INTRINSIC_XED_IFORM_VPDPWSUD_XMMi32_XMM2i16_XMM2u16, + INTRINSIC_XED_IFORM_VPDPWSUD_YMMi32_YMM2i16_MEM2u16, + INTRINSIC_XED_IFORM_VPDPWSUD_YMMi32_YMM2i16_YMM2u16, + INTRINSIC_XED_IFORM_VPDPWSUDS_XMMi32_XMM2i16_MEM2u16, + INTRINSIC_XED_IFORM_VPDPWSUDS_XMMi32_XMM2i16_XMM2u16, + INTRINSIC_XED_IFORM_VPDPWSUDS_YMMi32_YMM2i16_MEM2u16, + INTRINSIC_XED_IFORM_VPDPWSUDS_YMMi32_YMM2i16_YMM2u16, + INTRINSIC_XED_IFORM_VPDPWUSD_XMMi32_XMM2u16_MEM2i16, + INTRINSIC_XED_IFORM_VPDPWUSD_XMMi32_XMM2u16_XMM2i16, + INTRINSIC_XED_IFORM_VPDPWUSD_YMMi32_YMM2u16_MEM2i16, + INTRINSIC_XED_IFORM_VPDPWUSD_YMMi32_YMM2u16_YMM2i16, + INTRINSIC_XED_IFORM_VPDPWUSDS_XMMi32_XMM2u16_MEM2i16, + INTRINSIC_XED_IFORM_VPDPWUSDS_XMMi32_XMM2u16_XMM2i16, + INTRINSIC_XED_IFORM_VPDPWUSDS_YMMi32_YMM2u16_MEM2i16, + INTRINSIC_XED_IFORM_VPDPWUSDS_YMMi32_YMM2u16_YMM2i16, + INTRINSIC_XED_IFORM_VPDPWUUD_XMMu32_XMM2u16_MEM2u16, + INTRINSIC_XED_IFORM_VPDPWUUD_XMMu32_XMM2u16_XMM2u16, + INTRINSIC_XED_IFORM_VPDPWUUD_YMMu32_YMM2u16_MEM2u16, + INTRINSIC_XED_IFORM_VPDPWUUD_YMMu32_YMM2u16_YMM2u16, + INTRINSIC_XED_IFORM_VPDPWUUDS_XMMu32_XMM2u16_MEM2u16, + INTRINSIC_XED_IFORM_VPDPWUUDS_XMMu32_XMM2u16_XMM2u16, + INTRINSIC_XED_IFORM_VPDPWUUDS_YMMu32_YMM2u16_MEM2u16, + INTRINSIC_XED_IFORM_VPDPWUUDS_YMMu32_YMM2u16_YMM2u16, INTRINSIC_XED_IFORM_VPERM2F128_YMMqq_YMMqq_MEMqq_IMMb, INTRINSIC_XED_IFORM_VPERM2F128_YMMqq_YMMqq_YMMqq_IMMb, INTRINSIC_XED_IFORM_VPERM2I128_YMMqq_YMMqq_MEMqq_IMMb, @@ -4766,14 +6356,22 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VPMADCSWD_XMMdq_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VPMADD52HUQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512, INTRINSIC_XED_IFORM_VPMADD52HUQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512, + INTRINSIC_XED_IFORM_VPMADD52HUQ_XMMu64_XMMu64_MEMu64, + INTRINSIC_XED_IFORM_VPMADD52HUQ_XMMu64_XMMu64_XMMu64, INTRINSIC_XED_IFORM_VPMADD52HUQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512, INTRINSIC_XED_IFORM_VPMADD52HUQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512, + INTRINSIC_XED_IFORM_VPMADD52HUQ_YMMu64_YMMu64_MEMu64, + INTRINSIC_XED_IFORM_VPMADD52HUQ_YMMu64_YMMu64_YMMu64, INTRINSIC_XED_IFORM_VPMADD52HUQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512, INTRINSIC_XED_IFORM_VPMADD52HUQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512, INTRINSIC_XED_IFORM_VPMADD52LUQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512, INTRINSIC_XED_IFORM_VPMADD52LUQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512, + INTRINSIC_XED_IFORM_VPMADD52LUQ_XMMu64_XMMu64_MEMu64, + INTRINSIC_XED_IFORM_VPMADD52LUQ_XMMu64_XMMu64_XMMu64, INTRINSIC_XED_IFORM_VPMADD52LUQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512, INTRINSIC_XED_IFORM_VPMADD52LUQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512, + INTRINSIC_XED_IFORM_VPMADD52LUQ_YMMu64_YMMu64_MEMu64, + INTRINSIC_XED_IFORM_VPMADD52LUQ_YMMu64_YMMu64_YMMu64, INTRINSIC_XED_IFORM_VPMADD52LUQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512, INTRINSIC_XED_IFORM_VPMADD52LUQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512, INTRINSIC_XED_IFORM_VPMADDUBSW_XMMdq_XMMdq_MEMdq, @@ -6097,10 +7695,18 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VRCP28SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512ER, INTRINSIC_XED_IFORM_VRCP28SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512ER, INTRINSIC_XED_IFORM_VRCP28SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512ER, + INTRINSIC_XED_IFORM_VRCPPH_XMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VRCPPH_XMMf16_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VRCPPH_YMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VRCPPH_YMMf16_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VRCPPH_ZMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VRCPPH_ZMMf16_MASKmskw_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VRCPPS_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VRCPPS_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VRCPPS_YMMqq_MEMqq, INTRINSIC_XED_IFORM_VRCPPS_YMMqq_YMMqq, + INTRINSIC_XED_IFORM_VRCPSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VRCPSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VRCPSS_XMMdq_XMMdq_MEMd, INTRINSIC_XED_IFORM_VRCPSS_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VREDUCEPD_XMMf64_MASKmskw_MEMf64_IMM8_AVX512, @@ -6109,6 +7715,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VREDUCEPD_YMMf64_MASKmskw_YMMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VREDUCEPD_ZMMf64_MASKmskw_MEMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VREDUCEPD_ZMMf64_MASKmskw_ZMMf64_IMM8_AVX512, + INTRINSIC_XED_IFORM_VREDUCEPH_XMMf16_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VREDUCEPH_XMMf16_MASKmskw_XMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VREDUCEPH_YMMf16_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VREDUCEPH_YMMf16_MASKmskw_YMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VREDUCEPH_ZMMf16_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VREDUCEPH_ZMMf16_MASKmskw_ZMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VREDUCEPS_XMMf32_MASKmskw_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VREDUCEPS_XMMf32_MASKmskw_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VREDUCEPS_YMMf32_MASKmskw_MEMf32_IMM8_AVX512, @@ -6117,6 +7729,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VREDUCEPS_ZMMf32_MASKmskw_ZMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VREDUCESD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VREDUCESD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512, + INTRINSIC_XED_IFORM_VREDUCESH_XMMf16_MASKmskw_XMMf16_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VREDUCESH_XMMf16_MASKmskw_XMMf16_XMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VREDUCESS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VREDUCESS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALEPD_XMMf64_MASKmskw_MEMf64_IMM8_AVX512, @@ -6125,6 +7739,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VRNDSCALEPD_YMMf64_MASKmskw_YMMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALEPD_ZMMf64_MASKmskw_MEMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALEPD_ZMMf64_MASKmskw_ZMMf64_IMM8_AVX512, + INTRINSIC_XED_IFORM_VRNDSCALEPH_XMMf16_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VRNDSCALEPH_XMMf16_MASKmskw_XMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VRNDSCALEPH_YMMf16_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VRNDSCALEPH_YMMf16_MASKmskw_YMMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VRNDSCALEPH_ZMMf16_MASKmskw_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VRNDSCALEPH_ZMMf16_MASKmskw_ZMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALEPS_XMMf32_MASKmskw_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALEPS_XMMf32_MASKmskw_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALEPS_YMMf32_MASKmskw_MEMf32_IMM8_AVX512, @@ -6133,6 +7753,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VRNDSCALEPS_ZMMf32_MASKmskw_ZMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALESD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALESD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512, + INTRINSIC_XED_IFORM_VRNDSCALESH_XMMf16_MASKmskw_XMMf16_MEMf16_IMM8_AVX512, + INTRINSIC_XED_IFORM_VRNDSCALESH_XMMf16_MASKmskw_XMMf16_XMMf16_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALESS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VRNDSCALESS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VROUNDPD_XMMdq_MEMdq_IMMb, @@ -6171,10 +7793,18 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VRSQRT28SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512ER, INTRINSIC_XED_IFORM_VRSQRT28SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512ER, INTRINSIC_XED_IFORM_VRSQRT28SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512ER, + INTRINSIC_XED_IFORM_VRSQRTPH_XMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VRSQRTPH_XMMf16_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VRSQRTPH_YMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VRSQRTPH_YMMf16_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VRSQRTPH_ZMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VRSQRTPH_ZMMf16_MASKmskw_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VRSQRTPS_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VRSQRTPS_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VRSQRTPS_YMMqq_MEMqq, INTRINSIC_XED_IFORM_VRSQRTPS_YMMqq_YMMqq, + INTRINSIC_XED_IFORM_VRSQRTSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VRSQRTSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VRSQRTSS_XMMdq_XMMdq_MEMd, INTRINSIC_XED_IFORM_VRSQRTSS_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VSCALEFPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, @@ -6183,6 +7813,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VSCALEFPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512, INTRINSIC_XED_IFORM_VSCALEFPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VSCALEFPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VSCALEFPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSCALEFPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VSCALEFPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSCALEFPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VSCALEFPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSCALEFPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VSCALEFPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, INTRINSIC_XED_IFORM_VSCALEFPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512, INTRINSIC_XED_IFORM_VSCALEFPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512, @@ -6191,6 +7827,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VSCALEFPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512, INTRINSIC_XED_IFORM_VSCALEFSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VSCALEFSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VSCALEFSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSCALEFSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VSCALEFSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, INTRINSIC_XED_IFORM_VSCALEFSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512, INTRINSIC_XED_IFORM_VSCATTERDPD_MEMf64_MASKmskw_XMMf64_AVX512_VL128, @@ -6213,6 +7851,9 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VSCATTERQPS_MEMf32_MASKmskw_XMMf32_AVX512_VL128, INTRINSIC_XED_IFORM_VSCATTERQPS_MEMf32_MASKmskw_XMMf32_AVX512_VL256, INTRINSIC_XED_IFORM_VSCATTERQPS_MEMf32_MASKmskw_YMMf32_AVX512_VL512, + INTRINSIC_XED_IFORM_VSHA512MSG1_YMMu64_XMMu64, + INTRINSIC_XED_IFORM_VSHA512MSG2_YMMu64_YMMu64, + INTRINSIC_XED_IFORM_VSHA512RNDS2_YMMu64_YMMu64_XMMu64, INTRINSIC_XED_IFORM_VSHUFF32X4_YMMf32_MASKmskw_YMMf32_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VSHUFF32X4_YMMf32_MASKmskw_YMMf32_YMMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VSHUFF32X4_ZMMf32_MASKmskw_ZMMf32_MEMf32_IMM8_AVX512, @@ -6249,6 +7890,20 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VSHUFPS_YMMqq_YMMqq_YMMqq_IMMb, INTRINSIC_XED_IFORM_VSHUFPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_IMM8_AVX512, INTRINSIC_XED_IFORM_VSHUFPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_IMM8_AVX512, + INTRINSIC_XED_IFORM_VSM3MSG1_XMMu32_XMMu32_MEMu32, + INTRINSIC_XED_IFORM_VSM3MSG1_XMMu32_XMMu32_XMMu32, + INTRINSIC_XED_IFORM_VSM3MSG2_XMMu32_XMMu32_MEMu32, + INTRINSIC_XED_IFORM_VSM3MSG2_XMMu32_XMMu32_XMMu32, + INTRINSIC_XED_IFORM_VSM3RNDS2_XMMu32_XMMu32_MEMu32_IMM8, + INTRINSIC_XED_IFORM_VSM3RNDS2_XMMu32_XMMu32_XMMu32_IMM8, + INTRINSIC_XED_IFORM_VSM4KEY4_XMMu32_XMMu32_MEMu32, + INTRINSIC_XED_IFORM_VSM4KEY4_XMMu32_XMMu32_XMMu32, + INTRINSIC_XED_IFORM_VSM4KEY4_YMMu32_YMMu32_MEMu32, + INTRINSIC_XED_IFORM_VSM4KEY4_YMMu32_YMMu32_YMMu32, + INTRINSIC_XED_IFORM_VSM4RNDS4_XMMu32_XMMu32_MEMu32, + INTRINSIC_XED_IFORM_VSM4RNDS4_XMMu32_XMMu32_XMMu32, + INTRINSIC_XED_IFORM_VSM4RNDS4_YMMu32_YMMu32_MEMu32, + INTRINSIC_XED_IFORM_VSM4RNDS4_YMMu32_YMMu32_YMMu32, INTRINSIC_XED_IFORM_VSQRTPD_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VSQRTPD_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VSQRTPD_XMMf64_MASKmskw_MEMf64_AVX512, @@ -6259,6 +7914,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VSQRTPD_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VSQRTPD_ZMMf64_MASKmskw_MEMf64_AVX512, INTRINSIC_XED_IFORM_VSQRTPD_ZMMf64_MASKmskw_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VSQRTPH_XMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSQRTPH_XMMf16_MASKmskw_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VSQRTPH_YMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSQRTPH_YMMf16_MASKmskw_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VSQRTPH_ZMMf16_MASKmskw_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSQRTPH_ZMMf16_MASKmskw_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VSQRTPS_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VSQRTPS_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VSQRTPS_XMMf32_MASKmskw_MEMf32_AVX512, @@ -6273,6 +7934,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VSQRTSD_XMMdq_XMMdq_XMMq, INTRINSIC_XED_IFORM_VSQRTSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VSQRTSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VSQRTSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSQRTSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VSQRTSS_XMMdq_XMMdq_MEMd, INTRINSIC_XED_IFORM_VSQRTSS_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VSQRTSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -6288,6 +7951,12 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VSUBPD_YMMqq_YMMqq_YMMqq, INTRINSIC_XED_IFORM_VSUBPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VSUBPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512, + INTRINSIC_XED_IFORM_VSUBPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSUBPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, + INTRINSIC_XED_IFORM_VSUBPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSUBPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512, + INTRINSIC_XED_IFORM_VSUBPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSUBPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512, INTRINSIC_XED_IFORM_VSUBPS_XMMdq_XMMdq_MEMdq, INTRINSIC_XED_IFORM_VSUBPS_XMMdq_XMMdq_XMMdq, INTRINSIC_XED_IFORM_VSUBPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -6302,6 +7971,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VSUBSD_XMMdq_XMMdq_XMMq, INTRINSIC_XED_IFORM_VSUBSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VSUBSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VSUBSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VSUBSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VSUBSS_XMMdq_XMMdq_MEMd, INTRINSIC_XED_IFORM_VSUBSS_XMMdq_XMMdq_XMMd, INTRINSIC_XED_IFORM_VSUBSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512, @@ -6318,6 +7989,8 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_VUCOMISD_XMMdq_XMMq, INTRINSIC_XED_IFORM_VUCOMISD_XMMf64_MEMf64_AVX512, INTRINSIC_XED_IFORM_VUCOMISD_XMMf64_XMMf64_AVX512, + INTRINSIC_XED_IFORM_VUCOMISH_XMMf16_MEMf16_AVX512, + INTRINSIC_XED_IFORM_VUCOMISH_XMMf16_XMMf16_AVX512, INTRINSIC_XED_IFORM_VUCOMISS_XMMdq_MEMd, INTRINSIC_XED_IFORM_VUCOMISS_XMMdq_XMMd, INTRINSIC_XED_IFORM_VUCOMISS_XMMf32_MEMf32_AVX512, @@ -6389,11 +8062,17 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_WRFSBASE_GPRy, INTRINSIC_XED_IFORM_WRGSBASE_GPRy, INTRINSIC_XED_IFORM_WRMSR, + INTRINSIC_XED_IFORM_WRMSRLIST, + INTRINSIC_XED_IFORM_WRMSRNS, INTRINSIC_XED_IFORM_WRPKRU, INTRINSIC_XED_IFORM_WRSSD_MEMu32_GPR32u32, + INTRINSIC_XED_IFORM_WRSSD_MEMu32_GPR32u32_APX, INTRINSIC_XED_IFORM_WRSSQ_MEMu64_GPR64u64, + INTRINSIC_XED_IFORM_WRSSQ_MEMu64_GPR64u64_APX, INTRINSIC_XED_IFORM_WRUSSD_MEMu32_GPR32u32, + INTRINSIC_XED_IFORM_WRUSSD_MEMu32_GPR32u32_APX, INTRINSIC_XED_IFORM_WRUSSQ_MEMu64_GPR64u64, + INTRINSIC_XED_IFORM_WRUSSQ_MEMu64_GPR64u64_APX, INTRINSIC_XED_IFORM_XABORT_IMMb, INTRINSIC_XED_IFORM_XADD_GPR8_GPR8, INTRINSIC_XED_IFORM_XADD_GPRv_GPRv, @@ -6416,17 +8095,41 @@ enum X86_INTRINSIC INTRINSIC_XED_IFORM_XOR_GPR8_IMMb_80r6, INTRINSIC_XED_IFORM_XOR_GPR8_IMMb_82r6, INTRINSIC_XED_IFORM_XOR_GPR8_MEMb, + INTRINSIC_XED_IFORM_XOR_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_XOR_GPR8i8_GPR8i8_GPR8i8_APX, + INTRINSIC_XED_IFORM_XOR_GPR8i8_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_XOR_GPR8i8_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_XOR_GPR8i8_IMM8_APX, + INTRINSIC_XED_IFORM_XOR_GPR8i8_MEMi8_APX, + INTRINSIC_XED_IFORM_XOR_GPR8i8_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_XOR_GPR8i8_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_XOR_GPRv_GPRv_31, INTRINSIC_XED_IFORM_XOR_GPRv_GPRv_33, + INTRINSIC_XED_IFORM_XOR_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_XOR_GPRv_GPRv_GPRv_APX, + INTRINSIC_XED_IFORM_XOR_GPRv_GPRv_IMM8_APX, + INTRINSIC_XED_IFORM_XOR_GPRv_GPRv_IMMz_APX, + INTRINSIC_XED_IFORM_XOR_GPRv_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_XOR_GPRv_IMM8_APX, INTRINSIC_XED_IFORM_XOR_GPRv_IMMb, INTRINSIC_XED_IFORM_XOR_GPRv_IMMz, + INTRINSIC_XED_IFORM_XOR_GPRv_IMMz_APX, INTRINSIC_XED_IFORM_XOR_GPRv_MEMv, + INTRINSIC_XED_IFORM_XOR_GPRv_MEMv_APX, + INTRINSIC_XED_IFORM_XOR_GPRv_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_XOR_GPRv_MEMv_IMM8_APX, + INTRINSIC_XED_IFORM_XOR_GPRv_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_XOR_MEMb_GPR8, INTRINSIC_XED_IFORM_XOR_MEMb_IMMb_80r6, INTRINSIC_XED_IFORM_XOR_MEMb_IMMb_82r6, + INTRINSIC_XED_IFORM_XOR_MEMi8_GPR8i8_APX, + INTRINSIC_XED_IFORM_XOR_MEMi8_IMM8_APX, INTRINSIC_XED_IFORM_XOR_MEMv_GPRv, + INTRINSIC_XED_IFORM_XOR_MEMv_GPRv_APX, + INTRINSIC_XED_IFORM_XOR_MEMv_IMM8_APX, INTRINSIC_XED_IFORM_XOR_MEMv_IMMb, INTRINSIC_XED_IFORM_XOR_MEMv_IMMz, + INTRINSIC_XED_IFORM_XOR_MEMv_IMMz_APX, INTRINSIC_XED_IFORM_XOR_OrAX_IMMz, INTRINSIC_XED_IFORM_XORPD_XMMxuq_MEMxuq, INTRINSIC_XED_IFORM_XORPD_XMMxuq_XMMxuq, |