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authoryrp <yrp604@protonmail.com>2024-11-22 22:03:13 -0800
committerMason Reed <mason@vector35.com>2024-11-25 15:45:06 -0500
commit34bd2341f9fb8d5e8bc57639cb0ec547c3b8596b (patch)
treec16cf68938e612c3f3c51c1c05eaee0c32f91fb3 /arch/x86/test_lifting.py
parentfce3b5ba8e08f22b0d1604ac350348d5077e8e90 (diff)
Fix shrx, shlx, sarx, rorx
Diffstat (limited to 'arch/x86/test_lifting.py')
-rwxr-xr-xarch/x86/test_lifting.py8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/x86/test_lifting.py b/arch/x86/test_lifting.py
index ee2e1e34..6576b877 100755
--- a/arch/x86/test_lifting.py
+++ b/arch/x86/test_lifting.py
@@ -103,8 +103,14 @@ tests_movd = [
),
]
+test_shiftx = [
+ (b'\xc4\xe2\x4b\xf7\xc0', 'LLIL_SET_REG.d(eax,LLIL_LSR.d(LLIL_REG.d(eax),LLIL_REG.d(esi)))'), # shrx eax, eax, esi
+ (b'\xc4\xe2\x49\xf7\xc0', 'LLIL_SET_REG.d(eax,LLIL_LSL.d(LLIL_REG.d(eax),LLIL_REG.d(esi)))'), # shlx eax, eax, esi
+ (b'\xc4\xe2\x4a\xf7\xc0', 'LLIL_SET_REG.d(eax,LLIL_ASR.d(LLIL_REG.d(eax),LLIL_REG.d(esi)))'), # sarx eax, eax, esi
+ (b'\xc4\xe3\x7b\xf0\xc0\x05', 'LLIL_SET_REG.d(eax,LLIL_ROR.d(LLIL_REG.d(eax),LLIL_CONST.d(0x5)))'), # rorx eax, eax, 5
+]
-test_cases = tests_interrupts + tests_basics + tests_movd
+test_cases = tests_interrupts + tests_basics + tests_movd + test_shiftx
import re
import sys