diff options
| author | Galen Williamson <galen@vector35.com> | 2024-05-28 20:41:04 -0400 |
|---|---|---|
| committer | Galen Williamson <galen@vector35.com> | 2024-05-29 13:23:04 -0400 |
| commit | 309e4b3d84987bba9d8ad0990c8cbec781f90b7a (patch) | |
| tree | 8829da9b97608654015f5bf46f9cb8bb694e4345 /arch | |
| parent | e9f5102a28d8abfe565dc2f1c56fb237c33e05e7 (diff) | |
improve lifting of arm64 CSET instruction per Vector35/binaryninja-api#5134
Diffstat (limited to 'arch')
| -rwxr-xr-x | arch/arm64/arm64test.py | 8 | ||||
| -rw-r--r-- | arch/arm64/il.cpp | 6 |
2 files changed, 5 insertions, 9 deletions
diff --git a/arch/arm64/arm64test.py b/arch/arm64/arm64test.py index 0d568f38..70d5225f 100755 --- a/arch/arm64/arm64test.py +++ b/arch/arm64/arm64test.py @@ -13,7 +13,7 @@ from binaryninja.enums import LowLevelILOperation, ILInstructionAttribute path_here = pathlib.Path(__file__).parent.absolute() path_il_h = os.path.join(path_here, 'il.h') -ATTR_PTR_AUTH = ILInstructionAttribute(8) # enum BNILInstructionAttribute.SrcInstructionUsesPointerAuth from api/binaryninjacore.h +ATTR_PTR_AUTH = ILInstructionAttribute(16) # enum BNILInstructionAttribute.SrcInstructionUsesPointerAuth from api/binaryninjacore.h tests_udf = [ # udf #0 @@ -2405,11 +2405,7 @@ test_cases = \ ' LLIL_SET_REG.q(x28,LLIL_LOAD.q(LLIL_ADD.q(LLIL_REG.q(x21),LLIL_CONST.q(0x8))));' + \ ' LLIL_SET_REG.q(x21,LLIL_ADD.q(LLIL_REG.q(x21),LLIL_CONST.q(0x90)))'), # # cset w8, ne - (b'\xE8\x07\x9F\x1A', 'LLIL_IF(LLIL_FLAG_GROUP(ne),1,3);' + \ - ' LLIL_SET_REG.d(w8,LLIL_CONST.d(0x1));' + \ - ' LLIL_GOTO(5);' + \ - ' LLIL_SET_REG.d(w8,LLIL_CONST.d(0x0));' + \ - ' LLIL_GOTO(5)'), + (b'\xE8\x07\x9F\x1A', 'LLIL_SET_REG.d(w8,LLIL_BOOL_TO_INT.d(LLIL_FLAG_GROUP(ne)))'), # some vector loads/stores (b'\x00\x70\x00\x4C', 'LLIL_STORE.o(LLIL_REG.q(x0),LLIL_REG.o(v0))'), # st1 {v0.16b}, [x0] (b'\x00\xA0\x00\x4C', 'LLIL_STORE.o(LLIL_REG.q(x0),LLIL_REG.o(v0));' + \ diff --git a/arch/arm64/il.cpp b/arch/arm64/il.cpp index d3c3e943..13ff0d2a 100644 --- a/arch/arm64/il.cpp +++ b/arch/arm64/il.cpp @@ -1447,9 +1447,9 @@ bool GetLowLevelILForInstruction( ILSETREG_O(operand1, il.Neg(REGSZ_O(operand1), ILREG_O(operand3)))); break; case ARM64_CSET: - GenIfElse(il, GetCondition(il, operand2.cond), - ILSETREG_O(operand1, il.Const(REGSZ_O(operand1), 1)), - ILSETREG_O(operand1, il.Const(REGSZ_O(operand1), 0))); + il.AddInstruction( + ILSETREG_O(operand1, + il.BoolToInt(REGSZ_O(operand1), GetCondition(il, operand2.cond)))); break; case ARM64_CSETM: GenIfElse(il, GetCondition(il, operand2.cond), |