[Rust] Remove `NonSSAVariant` bound from `LowLevelILFunction`

We don't do enough with the lifted il != non lifted il to justify the bound.

This makes modifying IL much less work as the historical lifted il bound is gone.

3 files changed, 29 insertions, 26 deletions

diff --git a/arch/msp430/src/architecture.rs b/arch/msp430/src/architecture.rs
index 0ef6e449..91826193 100644
--- a/arch/msp430/src/architecture.rs
+++ b/arch/msp430/src/architecture.rs
@@ -20,7 +20,7 @@ use binaryninja::architecture::{
     BranchKind, FlagClassId, FlagGroupId, FlagId, FlagWriteId, RegisterId,
 };
 use binaryninja::low_level_il::expression::ValueExpr;
-use binaryninja::low_level_il::{MutableLiftedILExpr, MutableLiftedILFunction};
+use binaryninja::low_level_il::{LowLevelILMutableExpression, LowLevelILMutableFunction};
 use log::error;
 
 const MIN_MNEMONIC: usize = 9;
@@ -194,7 +194,7 @@ impl Architecture for Msp430 {
         &self,
         data: &[u8],
         addr: u64,
-        il: &MutableLiftedILFunction,
+        il: &LowLevelILMutableFunction,
     ) -> Option<(usize, bool)> {
         match msp430_asm::decode(data) {
             Ok(inst) => {
@@ -226,8 +226,8 @@ impl Architecture for Msp430 {
     fn flag_group_llil<'a>(
         &self,
         _group: Self::FlagGroup,
-        _il: &'a MutableLiftedILFunction,
-    ) -> Option<MutableLiftedILExpr<'a, ValueExpr>> {
+        _il: &'a LowLevelILMutableFunction,
+    ) -> Option<LowLevelILMutableExpression<'a, ValueExpr>> {
         None
     }
 
diff --git a/arch/msp430/src/lift.rs b/arch/msp430/src/lift.rs
index 124911f0..3e69b5a4 100644
--- a/arch/msp430/src/lift.rs
+++ b/arch/msp430/src/lift.rs
@@ -12,7 +12,7 @@ use msp430_asm::single_operand::SingleOperand;
 use msp430_asm::two_operand::TwoOperand;
 
 use binaryninja::low_level_il::expression::ValueExpr;
-use binaryninja::low_level_il::{MutableLiftedILExpr, MutableLiftedILFunction};
+use binaryninja::low_level_il::{LowLevelILMutableExpression, LowLevelILMutableFunction};
 use log::info;
 
 macro_rules! auto_increment {
@@ -163,7 +163,7 @@ macro_rules! conditional_jump {
     };
 }
 
-pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &MutableLiftedILFunction) {
+pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMutableFunction) {
     match inst {
         Instruction::Rrc(inst) => {
             let size = match inst.operand_width() {
@@ -623,8 +623,8 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &MutableLifted
 fn lift_source_operand<'a>(
     operand: &Operand,
     size: usize,
-    il: &'a MutableLiftedILFunction,
-) -> MutableLiftedILExpr<'a, ValueExpr> {
+    il: &'a LowLevelILMutableFunction,
+) -> LowLevelILMutableExpression<'a, ValueExpr> {
     match operand {
         Operand::RegisterDirect(r) => il.reg(size, Register::try_from(*r as u32).unwrap()),
         Operand::Indexed((r, offset)) => il
diff --git a/arch/riscv/src/lib.rs b/arch/riscv/src/lib.rs
index 4e9e4783..f59e1ebb 100644
--- a/arch/riscv/src/lib.rs
+++ b/arch/riscv/src/lib.rs
@@ -43,8 +43,8 @@ use binaryninja::low_level_il::lifting::{
     LiftableLowLevelIL, LiftableLowLevelILWithSize, LowLevelILLabel,
 };
 use binaryninja::low_level_il::{
-    expression::ExpressionHandler, instruction::InstructionHandler, LowLevelILRegisterKind,
-    MutableLiftedILExpr, MutableLiftedILFunction, RegularLowLevelILFunction,
+    expression::ExpressionHandler, instruction::InstructionHandler, LowLevelILMutableExpression,
+    LowLevelILMutableFunction, LowLevelILRegisterKind, LowLevelILRegularFunction,
 };
 use riscv_dis::{
     FloatReg, FloatRegType, Instr, IntRegType, Op, RegFile, Register as RiscVRegister,
@@ -207,7 +207,10 @@ impl<D: RiscVDisassembler> architecture::Register for Register<D> {
 impl<'a, D: RiscVDisassembler> LiftableLowLevelIL<'a> for Register<D> {
     type Result = ValueExpr;
 
-    fn lift(il: &'a MutableLiftedILFunction, reg: Self) -> MutableLiftedILExpr<'a, Self::Result> {
+    fn lift(
+        il: &'a LowLevelILMutableFunction,
+        reg: Self,
+    ) -> LowLevelILMutableExpression<'a, Self::Result> {
         match reg.reg_type() {
             RegType::Integer(0) => il.const_int(reg.size(), 0),
             RegType::Integer(_) => il.reg(reg.size(), reg),
@@ -218,10 +221,10 @@ impl<'a, D: RiscVDisassembler> LiftableLowLevelIL<'a> for Register<D> {
 
 impl<'a, D: RiscVDisassembler> LiftableLowLevelILWithSize<'a> for Register<D> {
     fn lift_with_size(
-        il: &'a MutableLiftedILFunction,
+        il: &'a LowLevelILMutableFunction,
         reg: Self,
         size: usize,
-    ) -> MutableLiftedILExpr<'a, ValueExpr> {
+    ) -> LowLevelILMutableExpression<'a, ValueExpr> {
         #[cfg(debug_assertions)]
         {
             if reg.size() < size {
@@ -1062,7 +1065,7 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
         &self,
         data: &[u8],
         addr: u64,
-        il: &MutableLiftedILFunction,
+        il: &LowLevelILMutableFunction,
     ) -> Option<(usize, bool)> {
         let max_width = self.default_integer_size();
 
@@ -1306,41 +1309,41 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
             Op::Ebreak => il.bp().append(),
             Op::Uret => {
                 il.intrinsic(
-                    MutableLiftedILFunction::NO_OUTPUTS,
+                    LowLevelILMutableFunction::NO_OUTPUTS,
                     RiscVIntrinsic::<D>::from(Intrinsic::Uret),
-                    MutableLiftedILFunction::NO_INPUTS,
+                    LowLevelILMutableFunction::NO_INPUTS,
                 )
                 .append();
                 il.no_ret().append();
             }
             Op::Sret => {
                 il.intrinsic(
-                    MutableLiftedILFunction::NO_OUTPUTS,
+                    LowLevelILMutableFunction::NO_OUTPUTS,
                     RiscVIntrinsic::<D>::from(Intrinsic::Sret),
-                    MutableLiftedILFunction::NO_INPUTS,
+                    LowLevelILMutableFunction::NO_INPUTS,
                 )
                 .append();
                 il.no_ret().append();
             }
             Op::Mret => {
                 il.intrinsic(
-                    MutableLiftedILFunction::NO_OUTPUTS,
+                    LowLevelILMutableFunction::NO_OUTPUTS,
                     RiscVIntrinsic::<D>::from(Intrinsic::Mret),
-                    MutableLiftedILFunction::NO_INPUTS,
+                    LowLevelILMutableFunction::NO_INPUTS,
                 )
                 .append();
                 il.no_ret().append();
             }
             Op::Wfi => il
                 .intrinsic(
-                    MutableLiftedILFunction::NO_OUTPUTS,
+                    LowLevelILMutableFunction::NO_OUTPUTS,
                     RiscVIntrinsic::<D>::from(Intrinsic::Wfi),
-                    MutableLiftedILFunction::NO_INPUTS,
+                    LowLevelILMutableFunction::NO_INPUTS,
                 )
                 .append(),
             Op::Fence(i) => il
                 .intrinsic(
-                    MutableLiftedILFunction::NO_OUTPUTS,
+                    LowLevelILMutableFunction::NO_OUTPUTS,
                     RiscVIntrinsic::<D>::from(Intrinsic::Fence),
                     [il.const_int(4, i.imm() as u32 as u64)],
                 )
@@ -1353,7 +1356,7 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
 
                 if i.rd().id() == 0 {
                     il.intrinsic(
-                        MutableLiftedILFunction::NO_OUTPUTS,
+                        LowLevelILMutableFunction::NO_OUTPUTS,
                         RiscVIntrinsic::<D>::from(Intrinsic::Csrwr),
                         [csr, rs1],
                     )
@@ -1404,7 +1407,7 @@ impl<D: RiscVDisassembler> Architecture for RiscVArch<D> {
 
                 if i.rd().id() == 0 {
                     il.intrinsic(
-                        MutableLiftedILFunction::NO_OUTPUTS,
+                        LowLevelILMutableFunction::NO_OUTPUTS,
                         RiscVIntrinsic::<D>::from(Intrinsic::Csrwr),
                         [csr, imm],
                     )
@@ -2848,7 +2851,7 @@ impl FunctionRecognizer for RiscVELFPLTRecognizer {
         &self,
         bv: &BinaryView,
         func: &Function,
-        llil: &RegularLowLevelILFunction,
+        llil: &LowLevelILRegularFunction,
     ) -> bool {
         // Look for the following code pattern:
         // t3 = plt