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authorBrian Potchik <brian@vector35.com>2025-07-02 16:16:19 -0400
committerBrian Potchik <brian@vector35.com>2025-07-02 16:16:19 -0400
commitcbf39e0505c462d80c2485f7209c303be922b822 (patch)
tree498101bb2070eece87c6c942c708301c1896af94 /arch
parent425328068b5a712a5487a188034a9ed6e31c2858 (diff)
Fix thumb2 lifting to prevent temp reg spillover for post dec stm instruction.
Diffstat (limited to 'arch')
-rw-r--r--arch/armv7/thumb2_disasm/il_thumb2.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/armv7/thumb2_disasm/il_thumb2.cpp b/arch/armv7/thumb2_disasm/il_thumb2.cpp
index f46a8641..50f9b3ef 100644
--- a/arch/armv7/thumb2_disasm/il_thumb2.cpp
+++ b/arch/armv7/thumb2_disasm/il_thumb2.cpp
@@ -1474,12 +1474,13 @@ bool GetLowLevelILForThumbInstruction(Architecture* arch, LowLevelILFunction& il
else
il.AddInstruction(il.SetRegister(4, LLIL_TEMP(0), il.Register(4, baseReg)));
+ uint32_t targetReg = decBeforeMode ? LLIL_TEMP(0) : baseReg;
for (int32_t i = 0, slot = 0; i <= regLimit; i++)
{
if ((regs >> i) & 1)
{
il.AddInstruction(il.Store(4,
- il.Add(4, il.Register(4, LLIL_TEMP(0)), il.Const(4, 4 * slot++)),
+ il.Add(4, il.Register(4, targetReg), il.Const(4, 4 * slot++)),
il.Register(4, GetRegisterByIndex(i))));
}
}