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| author | Mark Rowe <mark@vector35.com> | 2026-06-04 16:36:52 -0700 |
|---|---|---|
| committer | Mark Rowe <mark@vector35.com> | 2026-06-05 13:01:46 -0700 |
| commit | fde1241ce928d38c2031c827ae0ddee5c6f5af0f (patch) | |
| tree | 6711a47863332712eb5324e2c3ef1dffb843bb5d /docs/dev/bnil-llil.md | |
| parent | fa09f36b5f47ed690dc029fe9f1ed9ad4ebce7c8 (diff) | |
Add abs, min, and max instructions
Diffstat (limited to 'docs/dev/bnil-llil.md')
| -rw-r--r-- | docs/dev/bnil-llil.md | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/docs/dev/bnil-llil.md b/docs/dev/bnil-llil.md index b3a4f906..db251ab3 100644 --- a/docs/dev/bnil-llil.md +++ b/docs/dev/bnil-llil.md @@ -263,6 +263,11 @@ The double precision instruction multiply, divide, modulus instructions are part * `LLIL_CTZ` - Count trailing zero bits of `src`; the result is `8 * size` when `src` is zero * `LLIL_RBIT` - Reverse the bit order of `src` * `LLIL_CLS` - Count leading sign bits of `src` (the number of bits below the sign bit that match it) +* `LLIL_MINS` - Signed minimum of `left` and `right` +* `LLIL_MAXS` - Signed maximum of `left` and `right` +* `LLIL_MINU` - Unsigned minimum of `left` and `right` +* `LLIL_MAXU` - Unsigned maximum of `left` and `right` +* `LLIL_ABS` - Signed absolute value of `src` * `LLIL_TEST_BIT ` - Test if bit `right` in expression `left` is set * `LLIL_BOOL_TO_INT ` - Converts a bool `src` to an integer |