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authorRusty Wagner <rusty@vector35.com>2017-02-16 19:12:43 -0500
committerRusty Wagner <rusty@vector35.com>2017-02-16 19:18:55 -0500
commit57c08987ee10af0b52d5c3fd44739a3935f9efa7 (patch)
tree248c70d5d1891855c8947d0c6bb395c00d063079 /python/architecture.py
parent6ac3ea169e980b86c45c017892ef8a76fe5fb95d (diff)
Basic blocks have incoming and outgoing edges with basic block references, use core object identity for equality
Diffstat (limited to 'python/architecture.py')
-rw-r--r--python/architecture.py10
1 files changed, 10 insertions, 0 deletions
diff --git a/python/architecture.py b/python/architecture.py
index 5bafe949..39e5e72d 100644
--- a/python/architecture.py
+++ b/python/architecture.py
@@ -333,6 +333,16 @@ class Architecture(object):
self._pending_reg_lists = {}
self._pending_token_lists = {}
+ def __eq__(self, value):
+ if not isinstance(value, Architecture):
+ return False
+ return ctypes.addressof(self.handle.contents) == ctypes.addressof(value.handle.contents)
+
+ def __ne__(self, value):
+ if not isinstance(value, Architecture):
+ return True
+ return ctypes.addressof(self.handle.contents) != ctypes.addressof(value.handle.contents)
+
@property
def full_width_regs(self):
"""List of full width register strings (read-only)"""