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| author | James Hogan <8888160+Whurbin@users.noreply.github.com> | 2024-09-10 16:16:29 -0400 |
|---|---|---|
| committer | Brandon Miller <brandon@vector35.com> | 2024-10-30 10:43:04 -0400 |
| commit | bd01985a60bad3876843e5710e24916e065b5f03 (patch) | |
| tree | dcd75333b9ef8eadb6f547fc3cd91cbff0357659 /python/variable.py | |
| parent | f2f80bdd4358ee861e7748fae5d8325d6fc90f4c (diff) | |
Implicit addends in MIPS do not seem to be honored. Adding the addend to the target.
It is not always the case, especially under certian compiler optimizations that a R_MIPS_HI16 relocation is followed by one or more R_MIPS_LO16 relocations. Removing this requirement to fulfill the relocation regardless of the preceeding relocation.
Adding the following relocations:
* R_MIPS_HIGHEST
* R_MIPS_HIGHER
* R_MIPS_GPREL16
* (R_MIPS_64 << 8) | R_MIPS_REL32
* R_MIPS_GPREL32
Diffstat (limited to 'python/variable.py')
0 files changed, 0 insertions, 0 deletions