diff options
| author | Rusty Wagner <rusty@vector35.com> | 2017-03-02 00:37:46 -0500 |
|---|---|---|
| committer | Rusty Wagner <rusty@vector35.com> | 2017-03-02 00:37:46 -0500 |
| commit | 7aab4e4a3f8f2daadd1fbd00259da5b01090d84c (patch) | |
| tree | 7b9db291c184b44b6b2a4a9f2af66e5d9bc6b464 /python | |
| parent | 94b38cee51eff16f1e79945806088c7ae60016d7 (diff) | |
Adding MLIL instructions, moving stack contents data flow to a later stage
Diffstat (limited to 'python')
| -rw-r--r-- | python/lowlevelil.py | 6 | ||||
| -rw-r--r-- | python/mediumlevelil.py | 5 |
2 files changed, 4 insertions, 7 deletions
diff --git a/python/lowlevelil.py b/python/lowlevelil.py index ed1cedd4..40cb964c 100644 --- a/python/lowlevelil.py +++ b/python/lowlevelil.py @@ -1422,12 +1422,6 @@ class LowLevelILFunction(object): core.BNFreeRegisterValue(value) return result - def get_ssa_stack_contents(self, memory_index, offset, size): - value = core.BNGetLowLevelILSSAStackContents(self.handle, memory_index, offset, size) - result = function.RegisterValue(self.arch, value) - core.BNFreeRegisterValue(value) - return result - class LowLevelILBasicBlock(basicblock.BasicBlock): def __init__(self, view, handle, owner): diff --git a/python/mediumlevelil.py b/python/mediumlevelil.py index c4c4aa23..839c45ce 100644 --- a/python/mediumlevelil.py +++ b/python/mediumlevelil.py @@ -47,6 +47,7 @@ class MediumLevelILInstruction(object): MediumLevelILOperation.MLIL_NOP: [], MediumLevelILOperation.MLIL_SET_VAR: [("dest", "var"), ("src", "expr")], MediumLevelILOperation.MLIL_SET_VAR_FIELD: [("dest", "var"), ("offset", "int"), ("src", "expr")], + MediumLevelILOperation.MLIL_SET_VAR_SPLIT: [("high", "var"), ("low", "var"), ("src", "expr")], MediumLevelILOperation.MLIL_LOAD: [("src", "expr")], MediumLevelILOperation.MLIL_STORE: [("dest", "expr"), ("src", "expr")], MediumLevelILOperation.MLIL_VAR: [("src", "var")], @@ -108,12 +109,14 @@ class MediumLevelILInstruction(object): MediumLevelILOperation.MLIL_UNIMPL_MEM: [("src", "expr")], MediumLevelILOperation.MLIL_SET_VAR_SSA: [("dest", "var"), ("index", "int"), ("src", "expr")], MediumLevelILOperation.MLIL_SET_VAR_SSA_FIELD: [("dest", "var"), ("index", "int"), ("offset", "int"), ("src", "expr")], + MediumLevelILOperation.MLIL_SET_VAR_SPLIT_SSA: [("high", "expr"), ("low", "expr"), ("src", "expr")], + MediumLevelILOperation.MLIL_VAR_SPLIT_DEST_SSA: [("dest", "var"), ("index", "int")], MediumLevelILOperation.MLIL_VAR_SSA: [("src", "var"), ("index", "int")], MediumLevelILOperation.MLIL_VAR_SSA_FIELD: [("src", "var"), ("index", "int"), ("offset", "int")], MediumLevelILOperation.MLIL_CALL_SSA: [("output", "expr"), ("dest", "expr"), ("param", "expr")], MediumLevelILOperation.MLIL_SYSCALL_SSA: [("output", "expr"), ("param", "expr")], MediumLevelILOperation.MLIL_CALL_OUTPUT_SSA: [("dest_memory", "int"), ("dest", "var_ssa_list")], - MediumLevelILOperation.MLIL_CALL_PARAM_SSA: [("src", "var_ssa_list")], + MediumLevelILOperation.MLIL_CALL_PARAM_SSA: [("src_memory", "int"), ("src", "var_ssa_list")], MediumLevelILOperation.MLIL_LOAD_SSA: [("src", "expr"), ("src_memory", "int")], MediumLevelILOperation.MLIL_STORE_SSA: [("dest", "expr"), ("dest_memory", "int"), ("src_memory", "int"), ("src", "expr")], MediumLevelILOperation.MLIL_VAR_PHI: [("dest", "var"), ("index", "int"), ("src", "var_ssa_list")], |