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authorgerard <gerard@example.com>2026-06-08 12:57:22 +0200
committergerard <gerard@example.com>2026-06-08 12:57:22 +0200
commit7d4e905c07b6798255ea9de7fec8634f8e4dbfad (patch)
tree4f9235beb1bc07b8464a628d0b2aa5b183204150 /rust/src/low_level_il/function.rs
parent337fcfb0901d69b7f25ce653e4b0798318a86a3a (diff)
Port get_ssa_memory_definition to rust
Diffstat (limited to 'rust/src/low_level_il/function.rs')
-rw-r--r--rust/src/low_level_il/function.rs14
1 files changed, 14 insertions, 0 deletions
diff --git a/rust/src/low_level_il/function.rs b/rust/src/low_level_il/function.rs
index a0db838b..d4cd88cf 100644
--- a/rust/src/low_level_il/function.rs
+++ b/rust/src/low_level_il/function.rs
@@ -375,6 +375,20 @@ impl<M: FunctionMutability> LowLevelILFunction<M, SSA> {
}
Some(value.into())
}
+
+
+ /// Returns the instruction that defines the given SSA Mem register.
+ #[must_use]
+ pub fn get_ssa_memory_definition<R: ArchReg>(
+ &self,
+ index: usize
+ ) -> Option<LowLevelILInstruction<'_, M, SSA>> {
+ use binaryninjacore_sys::BNGetLowLevelILSSAMemoryDefinition;
+ let instr_idx = unsafe {
+ BNGetLowLevelILSSAMemoryDefinition(self.handle, index)
+ };
+ self.instruction_from_index(LowLevelInstructionIndex(instr_idx))
+ }
}
impl<M, F> ToOwned for LowLevelILFunction<M, F>