summaryrefslogtreecommitdiff
path: root/rust/src/mlil/instruction.rs
diff options
context:
space:
mode:
authorRusty Wagner <rusty.wagner@gmail.com>2024-04-26 18:25:36 -0400
committerRusty Wagner <rusty.wagner@gmail.com>2024-04-30 13:12:21 -0400
commitf193132145f62cac0ffeebc3ff918ebf9dd37103 (patch)
treeb17b694dc990112236537d3d07e7dd976d498dcc /rust/src/mlil/instruction.rs
parent2cd83c7221f8587975bcfc7582eb5b8c73f1653e (diff)
Add MLIL APIs for getting by instruction index, and expose the operation size in the Rust API
Diffstat (limited to 'rust/src/mlil/instruction.rs')
-rw-r--r--rust/src/mlil/instruction.rs10
1 files changed, 9 insertions, 1 deletions
diff --git a/rust/src/mlil/instruction.rs b/rust/src/mlil/instruction.rs
index 3b5dcfb4..bd2cc717 100644
--- a/rust/src/mlil/instruction.rs
+++ b/rust/src/mlil/instruction.rs
@@ -18,6 +18,7 @@ pub struct MediumLevelILInstruction {
pub function: Ref<MediumLevelILFunction>,
pub address: u64,
pub index: usize,
+ pub size: usize,
pub kind: MediumLevelILInstructionKind,
}
@@ -704,7 +705,12 @@ impl MediumLevelILInstruction {
}),
// translated directly into a list for Expression or Variables
// TODO MLIL_MEMORY_INTRINSIC_SSA needs to be handled properly
- MLIL_CALL_OUTPUT | MLIL_CALL_PARAM | MLIL_CALL_PARAM_SSA | MLIL_CALL_OUTPUT_SSA | MLIL_MEMORY_INTRINSIC_OUTPUT_SSA | MLIL_MEMORY_INTRINSIC_SSA => {
+ MLIL_CALL_OUTPUT
+ | MLIL_CALL_PARAM
+ | MLIL_CALL_PARAM_SSA
+ | MLIL_CALL_OUTPUT_SSA
+ | MLIL_MEMORY_INTRINSIC_OUTPUT_SSA
+ | MLIL_MEMORY_INTRINSIC_SSA => {
unreachable!()
}
};
@@ -713,6 +719,7 @@ impl MediumLevelILInstruction {
function,
address: op.address,
index,
+ size: op.size,
kind,
}
}
@@ -1022,6 +1029,7 @@ impl MediumLevelILInstruction {
function: self.function.clone(),
address: self.address,
index: self.index,
+ size: self.size,
kind,
}
}