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authorBrian Potchik <brian@vector35.com>2024-03-02 14:38:47 -0500
committerBrian Potchik <brian@vector35.com>2024-03-02 14:38:47 -0500
commit2e3b9c925390cc8b1d72a41d0564bb2862d3dba2 (patch)
treef40495cd494b8c157a0298259019873a624dc7e2 /rust/src/mlil
parentff2aa7435c3847f6969364f5d04d0943918429be (diff)
Add support for memory intrinsics.
Diffstat (limited to 'rust/src/mlil')
-rw-r--r--rust/src/mlil/instruction.rs3
1 files changed, 2 insertions, 1 deletions
diff --git a/rust/src/mlil/instruction.rs b/rust/src/mlil/instruction.rs
index 438708db..306a1352 100644
--- a/rust/src/mlil/instruction.rs
+++ b/rust/src/mlil/instruction.rs
@@ -824,7 +824,8 @@ impl MediumLevelILInstruction {
)),
MLIL_TRAP => Op::Trap(Trap::new(function, op.address, op.operands[0])),
// translated directly into a list for Expression or Variables
- MLIL_CALL_OUTPUT | MLIL_CALL_PARAM | MLIL_CALL_PARAM_SSA | MLIL_CALL_OUTPUT_SSA => {
+ // TODO MLIL_MEMORY_INTRINSIC_SSA needs to be handled properly
+ MLIL_CALL_OUTPUT | MLIL_CALL_PARAM | MLIL_CALL_PARAM_SSA | MLIL_CALL_OUTPUT_SSA | MLIL_MEMORY_INTRINSIC_OUTPUT_SSA | MLIL_MEMORY_INTRINSIC_SSA => {
unreachable!()
}
}