diff options
| author | Jordan Wiens <jordan@psifertex.com> | 2018-12-12 13:26:52 -0500 |
|---|---|---|
| committer | Jordan Wiens <jordan@psifertex.com> | 2018-12-12 13:26:52 -0500 |
| commit | 01a9eb27ea90e62476bb368f1e418745777f24b5 (patch) | |
| tree | 6cfb365b8208f9f39137db77d54473b5599a5310 /suite | |
| parent | ce132a1c7937b494711eee2a5596b16ecfa1993d (diff) | |
deprecate current_function.medium_level_il in favor of .mlil and move .instructions to mlil instead of main function -- likewise for llil
Diffstat (limited to 'suite')
| -rw-r--r-- | suite/testcommon.py | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/suite/testcommon.py b/suite/testcommon.py index fe7b69d5..0cb0d853 100644 --- a/suite/testcommon.py +++ b/suite/testcommon.py @@ -153,7 +153,7 @@ class BinaryViewTestBuilder(Builder): """Function med_il_basic_block list doesn't match""" ilbblist = [] for func in self.bv.functions: - for bb in func.medium_level_il.basic_blocks: + for bb in func.mlil.basic_blocks: ilbblist.append("MLIL basic block {} start: ".format(str(bb)) + hex(bb.start) + ' end: ' + hex(bb.end) + ' outgoing_edges: ' + str(len(bb.outgoing_edges))) return fixOutput(ilbblist) @@ -216,7 +216,7 @@ class BinaryViewTestBuilder(Builder): """MLIL instructions produced different output""" retinfo = [] for func in self.bv.functions: - for bb in func.medium_level_il.basic_blocks: + for bb in func.mlil.basic_blocks: for ins in bb: retinfo.append("Expression type: " + str(ins.expr_type)) retinfo.append("LLIL: " + str(ins.low_level_il)) @@ -251,7 +251,7 @@ class BinaryViewTestBuilder(Builder): """Function med_il_vars doesn't match""" varlist = [] for func in self.bv.functions: - func = func.medium_level_il + func = func.mlil for bb in func.basic_blocks: for instruction in bb: instruction = instruction.ssa_form @@ -662,7 +662,7 @@ class TestBuilder(Builder): flag_list = ['c', 'p', 'a', 'z', 's', 'o'] retinfo = [] for func in bv.functions: - for bb in func.medium_level_il.basic_blocks: + for bb in func.mlil.basic_blocks: for ins in bb: retinfo.append("MLIL stack begin var: " + str(ins.get_var_for_stack_location(0))) retinfo.append("MLIL first stack element: " + str(ins.get_stack_contents(0, 1))) |
