diff options
| -rw-r--r-- | arch/mips/il.cpp | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/arch/mips/il.cpp b/arch/mips/il.cpp index 37785db2..14829c63 100644 --- a/arch/mips/il.cpp +++ b/arch/mips/il.cpp @@ -1493,53 +1493,23 @@ bool GetLowLevelILForInstruction(Architecture* arch, uint64_t addr, LowLevelILFu break; case MIPS_DSLL: case MIPS_DSLL32: - if (registerSize != 8) - { - il.AddInstruction(il.Unimplemented()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ShiftLeft(8, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize)))); break; case MIPS_DSLLV: - if (registerSize != 8) - { - il.AddInstruction(il.Undefined()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ShiftLeft(8, ReadILOperand(il, instr, 2, registerSize), il.And(8, ReadILOperand(il, instr, 3, registerSize), il.Const(8, 0x3f))))); break; case MIPS_DSRL: case MIPS_DSRL32: - if (registerSize != 8) - { - il.AddInstruction(il.Unimplemented()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.LogicalShiftRight(8, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize)))); break; case MIPS_DSRLV: - if (registerSize != 8) - { - il.AddInstruction(il.Undefined()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.LogicalShiftRight(8, ReadILOperand(il, instr, 2, registerSize), il.And(8, ReadILOperand(il, instr, 3, registerSize), il.Const(8, 0x3f))))); break; case MIPS_DSRA: case MIPS_DSRA32: - if (registerSize != 8) - { - il.AddInstruction(il.Unimplemented()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ArithShiftRight(8, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize)))); break; case MIPS_DSRAV: - if (registerSize != 8) - { - il.AddInstruction(il.Undefined()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ArithShiftRight(8, ReadILOperand(il, instr, 2, registerSize), il.And(8, ReadILOperand(il, instr, 3, registerSize), il.Const(8, 0x3f))))); break; case MIPS_SB: |