diff options
| -rw-r--r-- | binaryninjaapi.h | 1 | ||||
| -rw-r--r-- | binaryninjacore.h | 6 | ||||
| -rw-r--r-- | lowlevelil.cpp | 6 | ||||
| -rw-r--r-- | python/examples/nes.py | 34 | ||||
| -rw-r--r-- | python/lowlevelil.py | 12 | ||||
| -rw-r--r-- | python/mediumlevelil.py | 1 |
6 files changed, 42 insertions, 18 deletions
diff --git a/binaryninjaapi.h b/binaryninjaapi.h index 5fb78367..783f6345 100644 --- a/binaryninjaapi.h +++ b/binaryninjaapi.h @@ -2136,6 +2136,7 @@ namespace BinaryNinja ExprId Pop(size_t size); ExprId Register(size_t size, uint32_t reg); ExprId Const(size_t size, uint64_t val); + ExprId ConstPointer(size_t size, uint64_t val); ExprId Flag(uint32_t reg); ExprId FlagBit(size_t size, uint32_t flag, uint32_t bitIndex); ExprId Add(size_t size, ExprId a, ExprId b, uint32_t flags = 0); diff --git a/binaryninjacore.h b/binaryninjacore.h index c6a79cf5..949f5997 100644 --- a/binaryninjacore.h +++ b/binaryninjacore.h @@ -282,6 +282,7 @@ extern "C" LLIL_POP, // Not valid in SSA form (expanded) LLIL_REG, // Not valid in SSA form (see LLIL_REG_SSA) LLIL_CONST, + LLIL_CONST_PTR, LLIL_FLAG, // Not valid in SSA form (see LLIL_FLAG_SSA) LLIL_FLAG_BIT, // Not valid in SSA form (see LLIL_FLAG_BIT_SSA) LLIL_ADD, @@ -598,7 +599,8 @@ extern "C" UnsignedDecimalDisplayType, SignedHexadecimalDisplayType, UnsignedHexadecimalDisplayType, - CharacterConstantDisplayType + CharacterConstantDisplayType, + PointerDisplayType }; struct BNLowLevelILInstruction @@ -638,6 +640,7 @@ extern "C" UndeterminedValue, EntryValue, ConstantValue, + ConstantPointerValue, StackFrameOffset, ReturnAddressValue, @@ -725,6 +728,7 @@ extern "C" MLIL_ADDRESS_OF, MLIL_ADDRESS_OF_FIELD, MLIL_CONST, + MLIL_CONST_PTR, MLIL_ADD, MLIL_ADC, MLIL_SUB, diff --git a/lowlevelil.cpp b/lowlevelil.cpp index ffb447ab..178d3709 100644 --- a/lowlevelil.cpp +++ b/lowlevelil.cpp @@ -152,6 +152,12 @@ ExprId LowLevelILFunction::Const(size_t size, uint64_t val) } +ExprId LowLevelILFunction::ConstPointer(size_t size, uint64_t val) +{ + return AddExpr(LLIL_CONST_PTR, size, 0, val); +} + + ExprId LowLevelILFunction::Flag(uint32_t reg) { return AddExpr(LLIL_FLAG, 0, 0, reg); diff --git a/python/examples/nes.py b/python/examples/nes.py index 0018b956..47f98b43 100644 --- a/python/examples/nes.py +++ b/python/examples/nes.py @@ -191,21 +191,21 @@ OperandTokens = [ def indirect_load(il, value): if (value & 0xff) == 0xff: - lo_addr = il.const(2, value) - hi_addr = il.const(2, (value & 0xff00) | ((value + 1) & 0xff)) + lo_addr = il.const_pointer(2, value) + hi_addr = il.const_pointer(2, (value & 0xff00) | ((value + 1) & 0xff)) lo = il.zero_extend(2, il.load(1, lo_addr)) hi = il.shift_left(2, il.zero_extend(2, il.load(1, hi_addr)), il.const(2, 8)) return il.or_expr(2, lo, hi) - return il.load(2, il.const(2, value)) + return il.load(2, il.const_pointer(2, value)) def load_zero_page_16(il, value): if il[value].operation == LowLevelILOperation.LLIL_CONST: if il[value].constant == 0xff: - lo = il.zero_extend(2, il.load(1, il.const(2, 0xff))) - hi = il.shift_left(2, il.zero_extend(2, il.load(1, il.const(2, 0)), il.const(2, 8))) + lo = il.zero_extend(2, il.load(1, il.const_pointer(2, 0xff))) + hi = il.shift_left(2, il.zero_extend(2, il.load(1, il.const_pointer(2, 0)), il.const(2, 8))) return il.or_expr(2, lo, hi) - return il.load(2, il.const(2, il[value].constant)) + return il.load(2, il.const_pointer(2, il[value].constant)) il.append(il.set_reg(1, LLIL_TEMP(0), value)) value = il.reg(1, LLIL_TEMP(0)) lo_addr = value @@ -217,23 +217,23 @@ def load_zero_page_16(il, value): OperandIL = [ lambda il, value: None, # NONE - lambda il, value: il.load(1, il.const(2, value)), # ABS + lambda il, value: il.load(1, il.const_pointer(2, value)), # ABS lambda il, value: il.const(2, value), # ABS_DEST lambda il, value: il.load(1, il.add(2, il.const(2, value), il.zero_extend(2, il.reg(1, "x")))), # ABS_X lambda il, value: il.add(2, il.const(2, value), il.zero_extend(2, il.reg(1, "x"))), # ABS_X_DEST lambda il, value: il.load(1, il.add(2, il.const(2, value), il.zero_extend(2, il.reg(1, "y")))), # ABS_Y lambda il, value: il.add(2, il.const(2, value), il.zero_extend(2, il.reg(1, "y"))), # ABS_Y_DEST lambda il, value: il.reg(1, "a"), # ACCUM - lambda il, value: il.const(2, value), # ADDR + lambda il, value: il.const_pointer(2, value), # ADDR lambda il, value: il.const(1, value), # IMMED lambda il, value: indirect_load(il, value), # IND lambda il, value: il.load(1, load_zero_page_16(il, il.add(1, il.const(1, value), il.reg(1, "x")))), # IND_X lambda il, value: load_zero_page_16(il, il.add(1, il.const(1, value), il.reg(1, "x"))), # IND_X_DEST lambda il, value: il.load(1, il.add(2, load_zero_page_16(il, il.const(1, value)), il.reg(1, "y"))), # IND_Y lambda il, value: il.add(2, load_zero_page_16(il, il.const(1, value)), il.reg(1, "y")), # IND_Y_DEST - lambda il, value: il.const(2, value), # REL - lambda il, value: il.load(1, il.const(2, value)), # ZERO - lambda il, value: il.const(2, value), # ZERO_DEST + lambda il, value: il.const_pointer(2, value), # REL + lambda il, value: il.load(1, il.const_pointer(2, value)), # ZERO + lambda il, value: il.const_pointer(2, value), # ZERO_DEST lambda il, value: il.load(1, il.zero_extend(2, il.add(1, il.const(1, value), il.reg(1, "x")))), # ZERO_X lambda il, value: il.zero_extend(2, il.add(1, il.const(1, value), il.reg(1, "x"))), # ZERO_X_DEST lambda il, value: il.load(1, il.zero_extend(2, il.add(1, il.const(1, value), il.reg(1, "y")))), # ZERO_Y @@ -300,7 +300,7 @@ def rti(il): InstructionIL = { - "adc": lambda il, operand: il.set_reg(1, "a", il.add_carry(1, il.reg(1, "a"), operand, flags = "*")), + "adc": lambda il, operand: il.set_reg(1, "a", il.add_carry(1, il.reg(1, "a"), operand, il.flag("c"), flags = "*")), "asl": lambda il, operand: il.store(1, operand, il.shift_left(1, il.load(1, operand), il.const(1, 1), flags = "czs")), "asl@": lambda il, operand: il.set_reg(1, "a", il.shift_left(1, operand, il.const(1, 1), flags = "czs")), "and": lambda il, operand: il.set_reg(1, "a", il.and_expr(1, il.reg(1, "a"), operand, flags = "zs")), @@ -341,13 +341,13 @@ InstructionIL = { "php": lambda il, operand: il.push(1, get_p_value(il)), "pla": lambda il, operand: il.set_reg(1, "a", il.pop(1), flags = "zs"), "plp": lambda il, operand: set_p_value(il, il.pop(1)), - "rol": lambda il, operand: il.store(1, operand, il.rotate_left_carry(1, il.load(1, operand), il.const(1, 1), flags = "czs")), - "rol@": lambda il, operand: il.set_reg(1, "a", il.rotate_left_carry(1, il.reg(1, "a"), il.const(1, 1), flags = "czs")), - "ror": lambda il, operand: il.store(1, operand, il.rotate_right_carry(1, il.load(1, operand), il.const(1, 1), flags = "czs")), - "ror@": lambda il, operand: il.set_reg(1, "a", il.rotate_right_carry(1, il.reg(1, "a"), il.const(1, 1), flags = "czs")), + "rol": lambda il, operand: il.store(1, operand, il.rotate_left_carry(1, il.load(1, operand), il.const(1, 1), il.flag("c"), flags = "czs")), + "rol@": lambda il, operand: il.set_reg(1, "a", il.rotate_left_carry(1, il.reg(1, "a"), il.const(1, 1), il.flag("c"), flags = "czs")), + "ror": lambda il, operand: il.store(1, operand, il.rotate_right_carry(1, il.load(1, operand), il.const(1, 1), il.flag("c"), flags = "czs")), + "ror@": lambda il, operand: il.set_reg(1, "a", il.rotate_right_carry(1, il.reg(1, "a"), il.const(1, 1), il.flag("c"), flags = "czs")), "rti": lambda il, operand: rti(il), "rts": lambda il, operand: il.ret(il.add(2, il.pop(2), il.const(2, 1))), - "sbc": lambda il, operand: il.set_reg(1, "a", il.sub_borrow(1, il.reg(1, "a"), operand, flags = "*")), + "sbc": lambda il, operand: il.set_reg(1, "a", il.sub_borrow(1, il.reg(1, "a"), operand, il.flag("c"), flags = "*")), "sec": lambda il, operand: il.set_flag("c", il.const(0, 1)), "sed": lambda il, operand: il.set_flag("d", il.const(0, 1)), "sei": lambda il, operand: il.set_flag("i", il.const(0, 1)), diff --git a/python/lowlevelil.py b/python/lowlevelil.py index cb4c9b69..5b133abd 100644 --- a/python/lowlevelil.py +++ b/python/lowlevelil.py @@ -122,6 +122,7 @@ class LowLevelILInstruction(object): LowLevelILOperation.LLIL_POP: [], LowLevelILOperation.LLIL_REG: [("src", "reg")], LowLevelILOperation.LLIL_CONST: [("constant", "int")], + LowLevelILOperation.LLIL_CONST_PTR: [("constant", "int")], LowLevelILOperation.LLIL_FLAG: [("src", "flag")], LowLevelILOperation.LLIL_FLAG_BIT: [("src", "flag"), ("bit", "int")], LowLevelILOperation.LLIL_ADD: [("left", "expr"), ("right", "expr")], @@ -773,6 +774,17 @@ class LowLevelILFunction(object): """ return self.expr(LowLevelILOperation.LLIL_CONST, value, size=size) + def const_pointer(self, size, value): + """ + ``const_pointer`` returns an expression for the constant pointer ``value`` with size ``size`` + + :param int size: the size of the pointer in bytes + :param int value: address referenced by pointer + :return: A constant expression of given value and size + :rtype: LowLevelILExpr + """ + return self.expr(LowLevelILOperation.LLIL_CONST_PTR, value, size=size) + def flag(self, reg): """ ``flag`` returns a flag expression for the given flag name. diff --git a/python/mediumlevelil.py b/python/mediumlevelil.py index cef8d83e..4aacad00 100644 --- a/python/mediumlevelil.py +++ b/python/mediumlevelil.py @@ -76,6 +76,7 @@ class MediumLevelILInstruction(object): MediumLevelILOperation.MLIL_ADDRESS_OF: [("src", "var")], MediumLevelILOperation.MLIL_ADDRESS_OF_FIELD: [("src", "var"), ("offset", "int")], MediumLevelILOperation.MLIL_CONST: [("constant", "int")], + MediumLevelILOperation.MLIL_CONST_PTR: [("constant", "int")], MediumLevelILOperation.MLIL_ADD: [("left", "expr"), ("right", "expr")], MediumLevelILOperation.MLIL_ADC: [("left", "expr"), ("right", "expr")], MediumLevelILOperation.MLIL_SUB: [("left", "expr"), ("right", "expr")], |