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-rw-r--r--arch/mips/il.cpp12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/mips/il.cpp b/arch/mips/il.cpp
index e056c7aa..14639e74 100644
--- a/arch/mips/il.cpp
+++ b/arch/mips/il.cpp
@@ -1599,7 +1599,7 @@ bool GetLowLevelILForInstruction(Architecture* arch, uint64_t addr, LowLevelILFu
il.AddInstruction(SetRegisterOrNop(il, 4, registerSize, op1.reg, il.RotateRight(4, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize))));
break;
case MIPS_SDBBP:
- il.AddInstruction(il.Unimplemented());
+ il.AddInstruction(il.Intrinsic({}, MIPS_INTRIN_SDBBP, { il.Const(1, op1.immediate )}));
break;
case MIPS_SEB:
il.AddInstruction(SetRegisterOrNop(il, registerSize, registerSize, op1.reg, il.SignExtend(registerSize, il.LowPart(1, ReadILOperand(il, instr, 2, registerSize)))));
@@ -1810,6 +1810,10 @@ bool GetLowLevelILForInstruction(Architecture* arch, uint64_t addr, LowLevelILFu
break;
}
+ case MIPS_SYNCI:
+ il.AddInstruction(il.Intrinsic({}, MIPS_INTRIN_SYNCI, { GetILOperandMemoryAddress(il, op1, addrSize) }));
+ break;
+
case MIPS_DI:
il.AddInstruction(SimpleIntrinsic(il, MIPS_INTRIN_DI));
break;
@@ -1822,6 +1826,10 @@ bool GetLowLevelILForInstruction(Architecture* arch, uint64_t addr, LowLevelILFu
il.AddInstruction(SimpleIntrinsic(il, MIPS_INTRIN_EI));
break;
+ case MIPS_PAUSE:
+ il.AddInstruction(SimpleIntrinsic(il, MIPS_INTRIN_PAUSE));
+ break;
+
case MIPS_WAIT:
il.AddInstruction(SimpleIntrinsic(il, MIPS_INTRIN_WAIT));
break;
@@ -2126,9 +2134,7 @@ bool GetLowLevelILForInstruction(Architecture* arch, uint64_t addr, LowLevelILFu
case MIPS_JALX: //Special instruction for switching to MIPS32/microMIPS32/MIPS16e
case MIPS_MTHC1:
case MIPS_MTHC2:
- case MIPS_PAUSE:
case MIPS_PREFX:
- case MIPS_SYNCI:
case MIPS_TLBP:
case MIPS_TLBR:
case MIPS_TLBWI: