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| author | Mason Reed <mason@vector35.com> | 2024-08-22 12:43:18 -0400 |
|---|---|---|
| committer | mason <35282038+emesare@users.noreply.github.com> | 2024-08-27 11:16:59 -0700 |
| commit | 4795f742426515a660c74a4010836ac5c3f3e4c7 (patch) | |
| tree | ff0b7800a2be85d0bd9f686a8e272799e7e69e34 | |
| parent | 937c3304518e6a42fd6fc34bc93b1a65f4f752d7 (diff) | |
Fix getting incorrect S and D registers in lifted il
| -rw-r--r-- | arch/armv7/thumb2_disasm/il_thumb2.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/armv7/thumb2_disasm/il_thumb2.cpp b/arch/armv7/thumb2_disasm/il_thumb2.cpp index aec37ed1..2d0abe74 100644 --- a/arch/armv7/thumb2_disasm/il_thumb2.cpp +++ b/arch/armv7/thumb2_disasm/il_thumb2.cpp @@ -16,11 +16,11 @@ bool GetLowLevelILForNEONInstruction(Architecture* arch, LowLevelILFunction& il, static uint32_t GetRegisterByIndex(uint32_t i, const char* prefix = "") { if (strcmp(prefix, "s") == 0) - return REG_R0 + (i/2) + (i%2) + REG_S0; + return REG_S0 + i; if (strcmp(prefix, "d") == 0) - return REG_R0 + (i/2) + (i%2) + REG_D0; + return REG_D0 + i; if (strcmp(prefix, "q") == 0) - return REG_R0 + (i/2) + (i%2) + REG_Q0; + return REG_R0 + (i/2) + (i%2) + REG_Q0; // TODO: This might be the same as above. return REG_R0 + i; } |