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| author | Galen Williamson <galen@vector35.com> | 2025-07-23 13:56:24 -0400 |
|---|---|---|
| committer | Galen Williamson <galen@vector35.com> | 2025-08-14 14:06:49 -0400 |
| commit | d6e13c753b30260b182cfe433e4e275244a4ab78 (patch) | |
| tree | e5872f325dc26012646d999af94d937942ada0f8 /arch/armv7/thumb2_disasm/arm_pcode_parser/README.md | |
| parent | ce38990dae2d88d96793715d40544c7e5ece524d (diff) | |
[armv7/thumb2] Fix Lifting for PC-relative vldr instruction does not align PC when calculating address #6947
Updated thumb2 pcode parser used by disassembler generator to use Tatsu instead of deprecated Grako
Diffstat (limited to 'arch/armv7/thumb2_disasm/arm_pcode_parser/README.md')
| -rw-r--r-- | arch/armv7/thumb2_disasm/arm_pcode_parser/README.md | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/armv7/thumb2_disasm/arm_pcode_parser/README.md b/arch/armv7/thumb2_disasm/arm_pcode_parser/README.md index c3adae56..7dcc5d15 100644 --- a/arch/armv7/thumb2_disasm/arm_pcode_parser/README.md +++ b/arch/armv7/thumb2_disasm/arm_pcode_parser/README.md @@ -4,7 +4,12 @@ translate the pseudocode for arm instructions (given in the docs) to target lang once the pcode is extracted, automatic generation of ultra-accurate disassemblers should become possible # how -use Grako parser generator, describe the language (pcode.ebnf) and write code generator (codegen.py) +~~use Grako parser generator, describe the language (pcode.ebnf) and write code generator (codegen.py)~~ +use Tatsu parser generator, describe the language (pcode.ebnf) and write code generator (codegen.py): + +``` +python3 -m tatsu --name pcode pcode.ebnf -o parse.py +``` # example input statement: |