diff options
| author | Galen Williamson <galen@vector35.com> | 2025-07-23 13:56:24 -0400 |
|---|---|---|
| committer | Galen Williamson <galen@vector35.com> | 2025-08-14 14:06:49 -0400 |
| commit | d6e13c753b30260b182cfe433e4e275244a4ab78 (patch) | |
| tree | e5872f325dc26012646d999af94d937942ada0f8 /arch/armv7/thumb2_disasm/spec.cpp | |
| parent | ce38990dae2d88d96793715d40544c7e5ece524d (diff) | |
[armv7/thumb2] Fix Lifting for PC-relative vldr instruction does not align PC when calculating address #6947
Updated thumb2 pcode parser used by disassembler generator to use Tatsu instead of deprecated Grako
Diffstat (limited to 'arch/armv7/thumb2_disasm/spec.cpp')
| -rw-r--r-- | arch/armv7/thumb2_disasm/spec.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/armv7/thumb2_disasm/spec.cpp b/arch/armv7/thumb2_disasm/spec.cpp index 89ee1807..f618eff7 100644 --- a/arch/armv7/thumb2_disasm/spec.cpp +++ b/arch/armv7/thumb2_disasm/spec.cpp @@ -34446,8 +34446,8 @@ int vcvt_float_int(struct decomp_request *req, struct decomp_result *res) /* pcode: dp_operation = (sz == 1) */ res->fields[FIELD_dp_operation] = ((res->fields[FIELD_sz]) == (1)); res->fields_mask[FIELD_dp_operation >> 6] |= 1LL << (FIELD_dp_operation & 63); - /* pcode: unsigned = (op == '0') */ - res->fields[FIELD_unsigned] = ((res->fields[FIELD_op]) == (0x0)); + /* pcode: unsigned = (opc3 == '0') */ + res->fields[FIELD_unsigned] = ((res->fields[FIELD_opc3]) == (0x0)); res->fields_mask[FIELD_unsigned >> 6] |= 1LL << (FIELD_unsigned & 63); /* pcode: m = UInt(Vm:M) */ res->fields[FIELD_m] = ((res->fields[FIELD_Vm]<<M_width)|(res->fields[FIELD_M])); |