diff options
| author | noone <you@example.com> | 2024-07-31 19:01:36 -0500 |
|---|---|---|
| committer | Alexander Taylor <alex@vector35.com> | 2024-08-12 15:50:54 -0400 |
| commit | 5d75e51b89e4ea10ca21e50bfda1a433c3cbe861 (patch) | |
| tree | bad6f5cf0e69b78769c196089a370cf7b18dd72c /arch | |
| parent | 9dcede6e98ead20ebeca926027abf09ad8450584 (diff) | |
Remove checks for 64-bit shift instructions
These aren't really needed; if it's for a 32-bit architecture that can't
handle 64-bit shifts, then the instruction won't be decoded in the first
place. Because the registerSize is derived from the address size, it may
interfere with 64-bit architectures that are using signed 32-bit
addresses.
There are a few other places that check registerSize (for example, the
32->64 bit sign extension idiom and MADD, MADDU) that are suspect, but
not included in this commit. The difference is that for 64-bit shifts,
checking at all for the register size is the problem; for those, the
check is still needed to figure out whether to sign extend or not, but
the value of registerSize is suspect.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/il.cpp | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/arch/mips/il.cpp b/arch/mips/il.cpp index 37785db2..14829c63 100644 --- a/arch/mips/il.cpp +++ b/arch/mips/il.cpp @@ -1493,53 +1493,23 @@ bool GetLowLevelILForInstruction(Architecture* arch, uint64_t addr, LowLevelILFu break; case MIPS_DSLL: case MIPS_DSLL32: - if (registerSize != 8) - { - il.AddInstruction(il.Unimplemented()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ShiftLeft(8, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize)))); break; case MIPS_DSLLV: - if (registerSize != 8) - { - il.AddInstruction(il.Undefined()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ShiftLeft(8, ReadILOperand(il, instr, 2, registerSize), il.And(8, ReadILOperand(il, instr, 3, registerSize), il.Const(8, 0x3f))))); break; case MIPS_DSRL: case MIPS_DSRL32: - if (registerSize != 8) - { - il.AddInstruction(il.Unimplemented()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.LogicalShiftRight(8, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize)))); break; case MIPS_DSRLV: - if (registerSize != 8) - { - il.AddInstruction(il.Undefined()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.LogicalShiftRight(8, ReadILOperand(il, instr, 2, registerSize), il.And(8, ReadILOperand(il, instr, 3, registerSize), il.Const(8, 0x3f))))); break; case MIPS_DSRA: case MIPS_DSRA32: - if (registerSize != 8) - { - il.AddInstruction(il.Unimplemented()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ArithShiftRight(8, ReadILOperand(il, instr, 2, registerSize), ReadILOperand(il, instr, 3, registerSize)))); break; case MIPS_DSRAV: - if (registerSize != 8) - { - il.AddInstruction(il.Undefined()); - break; - } il.AddInstruction(SetRegisterOrNop(il, 8, registerSize, op1.reg, il.ArithShiftRight(8, ReadILOperand(il, instr, 2, registerSize), il.And(8, ReadILOperand(il, instr, 3, registerSize), il.Const(8, 0x3f))))); break; case MIPS_SB: |