diff options
| author | chedahub <2017000029@ushs.hs.kr> | 2025-10-22 10:20:19 +0900 |
|---|---|---|
| committer | Peter LaFosse <peter@vector35.com> | 2025-10-22 09:33:28 -0400 |
| commit | 623f07a2b44ac9dbc86bab2ea011ee5899664f15 (patch) | |
| tree | 50c497ab0ac691d752ee9b8aa6b6525af79b4feb /arch | |
| parent | be34c8d24bb99f941977f6b2e728033a7fe636cd (diff) | |
Fix: PowerPC decode logic for Rx, Ry, Rz register
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/decode/vle16.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/decode/vle16.c b/arch/powerpc/decode/vle16.c index 7500e6ba..ed46656a 100644 --- a/arch/powerpc/decode/vle16.c +++ b/arch/powerpc/decode/vle16.c @@ -335,17 +335,20 @@ static InstructionId Decode16Vle(uint16_t word16, uint32_t decodeFlags) } static uint16_t Get16Rx(uint16_t word16) { - return word16 & 0xf; + uint16_t rx = word16 & 0xf; + return rx + ((rx & 0x8) >> 3) * 16; } static uint16_t Get16Ry(uint16_t word16) { - return (word16 >> 4) & 0xf; + uint16_t ry = (word16 >> 4) & 0xf; + return ry + ((ry & 0x8) >> 3) * 16; } static uint16_t Get16Rz(uint16_t word16) { - return (word16 >> 4) & 0xf; + uint16_t rz = (word16 >> 4) & 0xf; + return rz + ((rz & 0x8) >> 3) * 16; } static void FillOperands16Vle(Instruction* instruction, uint16_t word16, uint64_t address, bool translate) |
