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authorMark Rowe <mark@vector35.com>2026-06-03 21:25:55 -0700
committerMark Rowe <mark@vector35.com>2026-06-04 14:31:09 -0700
commitd592ed6dafbb134553bf3a0b8ee70ff7f2049aba (patch)
tree1bfe7e335e5b4e21371cde4bf8858c6439bc3f18 /docs/dev/bnil-hlil.md
parent9987102015875991813200116558306851763009 (diff)
Add bswap, popcnt, clz, ctz, cls, and rbit instructions
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diff --git a/docs/dev/bnil-hlil.md b/docs/dev/bnil-hlil.md
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@@ -111,6 +111,12 @@ There are a number of properties that can be queried on the [`HighLevelILInstruc
* `HLIL_MODS_DP` - Signed double-precision modulus of `left` expression by the `right` expression
* `HLIL_NEG` - Sign inversion of `src` expression
* `HLIL_NOT` - Bitwise inversion of `src` expression
+* `HLIL_BSWAP` - Reverse the byte order of `src` expression
+* `HLIL_POPCNT` - Population count (number of set bits) of `src` expression
+* `HLIL_CLZ` - Count leading zero bits of `src` expression; the result is `8 * size` when `src` is zero
+* `HLIL_CTZ` - Count trailing zero bits of `src` expression; the result is `8 * size` when `src` is zero
+* `HLIL_RBIT` - Reverse the bit order of `src` expression
+* `HLIL_CLS` - Count leading sign bits of `src` expression (the number of bits below the sign bit that match it)
* `HLIL_FADD` - IEEE754 floating point addition of `left` expression with `right` expression
* `HLIL_FSUB` - IEEE754 floating point subtraction of `left` expression with `right` expression
* `HLIL_FMUL` - IEEE754 floating point multiplication of `left` expression with `right` expression