| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2026-06-06 | Better MIPS n32 support. | Alexander Taylor | |
| 2026-06-06 | Add little-endian octeon mips arch | Jonathan Eskeldson | |
| 2026-01-23 | Lifted new PPC insns, MIPS reloc fix. | Alexander Taylor | |
| 2026-01-01 | update copyrights for 2026 | Jordan Wiens | |
| 2025-12-20 | Fix many of the warnings that show up when compiling with GCC 15.2 | Mark Rowe | |
| 2025-12-11 | [MIPS] Don't add a default branch type for jalr | Brandon Miller | |
| 2025-12-11 | [MIPS] Mark `jalr[.hb] $zero, $ra` as a return instruction | Rong "Mantle" Bao | |
| 2025-07-30 | [CMake] Specify CONFIGURE_DEPENDS for all file(GLOB ..) | Mark Rowe | |
| This ensures that CMake detects when files that match the glob are added or removed. | |||
| 2025-07-21 | Fix crash on R_MIPS_HI16 relocs caused by bad cast | Brandon Miller | |
| 2025-07-03 | Fix compilation with newer clang/gcc versions | Josh Ferrell | |
| 2025-07-02 | Fix mips tests failing to build on arm64 linux | Mason Reed | |
| 2025-07-02 | [mips] Merges PR https://github.com/Vector35/binaryninja-api/pull/6311: MIPS ↵ | kat | |
| r5900 (PS2 EE) support | |||
| 2025-06-25 | Fix cxx20 compiler warnings. | Alexander Taylor | |
| 2025-06-25 | Update CXX_STANDARD to 20. | Alexander Taylor | |
| Also update minimum CMake version. | |||
| 2025-06-25 | Remove implicit conversions from Confidence to underlying type, these can ↵ | Rusty Wagner | |
| cause bugs and also issues with C++20 | |||
| 2025-05-13 | [CMake] Report compatibility with 3.15 to silence deprecation warnings | Glenn Smith | |
| 2025-04-24 | mips: fix mips32 linux-syscall cc stack behavior | Ryan Snyder | |
| 2025-04-09 | [mips] always show 0 offset in MIPS operands using Register + Offset ↵ | Galen Williamson | |
| Addressing Mode (including when the register r0 is elided) | |||
| 2025-04-08 | [aarch64] lift all LD[1-4]R? and ST[1-4] opcodes, lift ST/LDCLR, ST/LDEOR, ↵ | Galen Williamson | |
| ST/LDSET, and their variants Also fixes all outstanding issues in arm64test.py, including intrinsics, dc, at, and tlbi | |||
| 2025-03-28 | belated copyright year update | Jordan Wiens | |
| 2025-03-24 | Fix extern ptr corercion for R_MIPS_HIGHEST/HIGHER | Brandon Miller | |
| 2025-02-10 | [mips] Merging PR https://github.com/Vector35/binaryninja-api/pull/6013: ↵ | Galen Williamson | |
| adding mips3 support | |||
| 2025-02-06 | [mips] Fix decoding of MIPS ds*32 instructions, add lifting for MIPS drotr* ↵ | Galen Williamson | |
| instructions; clean up some warnings in powerpc/il.cpp | |||
| 2024-12-03 | Multiple fixes for HI16/LO16 relocs for MIPS64 | Brandon Miller | |
| Some binaries consist of LO16 entires that are BEFORE associated HI16 entries. Also, prior to this commit we don't appear to be applying HI16 relocations at all for MIPS64. mips_decompose was being called with MIPS_32 and failing prior to fixing up the relocation | |||
| 2024-11-25 | Fix regression with MIPS_HI16/MIPS_LO16 relocs | Brandon Miller | |
| 2024-10-30 | Undo whitespace changes from user MIPS reloc PR | Brandon Miller | |
| Also wrapped & to suppress build warning | |||
| 2024-10-30 | Implicit addends in MIPS do not seem to be honored. Adding the addend to the ↵ | James Hogan | |
| target. It is not always the case, especially under certian compiler optimizations that a R_MIPS_HI16 relocation is followed by one or more R_MIPS_LO16 relocations. Removing this requirement to fulfill the relocation regardless of the preceeding relocation. Adding the following relocations: * R_MIPS_HIGHEST * R_MIPS_HIGHER * R_MIPS_GPREL16 * (R_MIPS_64 << 8) | R_MIPS_REL32 * R_MIPS_GPREL32 | |||
| 2024-09-13 | Fix many warnings | Josh Ferrell | |
| 2024-09-13 | Ultimate. | Alexander Taylor | |
| 2024-08-30 | Add support for loading mipsel64 files | Josh Ferrell | |
| 2024-08-12 | Add decode, disassembly, IL for TLBINV, TLBINVF | noone | |
| 2024-08-12 | Sign-extend results of 32-bit operations on HI, LO | noone | |
| For 64-bit architectures, the results weren't properly sign-extended when they were supposed to be for 32-bit operations. This doesn't change the fact that the source of the register size is still suspect, and this new sign extension may not properly take place for 64-bit architectures using 32-bit addresses, but solving that will take a bit more examination in general. | |||
| 2024-08-12 | Add IL, intrinsics for TLB-related instructions | noone | |
| 2024-08-12 | Add intrinsics for some system instructions | noone | |
| Except for SYNCI, I didn't have any test cases for these, but they're fairly simple. | |||
| 2024-08-12 | Differentiate some enums in IL switch statement | noone | |
| This makes it easier to see which instructions still need to be lifted versus those which never should be lifted. | |||
| 2024-08-12 | Remove checks for 64-bit shift instructions | noone | |
| These aren't really needed; if it's for a 32-bit architecture that can't handle 64-bit shifts, then the instruction won't be decoded in the first place. Because the registerSize is derived from the address size, it may interfere with 64-bit architectures that are using signed 32-bit addresses. There are a few other places that check registerSize (for example, the 32->64 bit sign extension idiom and MADD, MADDU) that are suspect, but not included in this commit. The difference is that for 64-bit shifts, checking at all for the register size is the problem; for those, the check is still needed to figure out whether to sign extend or not, but the value of registerSize is suspect. | |||
| 2024-07-09 | Fix warning in mips arch (skip-note, skip-ci) | Mason Reed | |
| 2024-07-08 | Add Cavium Octeon MIPS Instructions and more general MIPS fixes | noone | |
| 2024-05-31 | improve efficiency | Zichuan Li | |
| 2024-05-31 | Fixed type propagation issue in AARCH64 and MIPS | Zichuan Li | |
| Previously, prtinf type library is not being appropriately applied. #3092 | |||
| 2024-05-24 | arch: multiple delay slot support, suppress spurious mips warning | Ryan Snyder | |
| 2024-04-25 | Recognize uClibc MIPS ELF PLT entries | Josh Ferrell | |
| 2024-03-15 | Separate local variable tokens in higher level ILs from stack variable ↵ | Rusty Wagner | |
| tokens in lower levels, and improve token usage in disassembly | |||
| 2024-03-05 | Move architecture modules into the API repo | Rusty Wagner | |
