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AgeCommit message (Expand)Author
2024-07-12Regenerate Cargo lock file after bindgen update.Alexander Taylor
2024-06-19Add data_variable_at_address and fixed the type propagation issue in riscvZichuan Li
2024-06-12Disassemble SFENCE.VM instructionMason Reed
2024-06-11More descriptive error for TP-relative reloc.Alexander Taylor
2024-05-24arch: multiple delay slot support, suppress spurious mips warningRyan Snyder
2024-05-01riscv: account for minor rust API updatesRyan Snyder
2024-04-09riscv : Remove uses of BnString per #5244KyleMiles
2024-03-21Update to Rust 1.77Rusty Wagner
2024-03-20Implement Hash, PartialEq & Eq for riscv Registermason
2024-03-15Separate local variable tokens in higher level ILs from stack variable tokens...Rusty Wagner
2024-03-14Update to Rust 1.76Rusty Wagner
2024-03-08Fix RISC-V CSRRW, CSRRS, and CSRRC instr disassPete Dietl
2024-02-01RISC-V: Fix disassembly of compressed JAL instructionPete Dietl
2024-01-04Add RISC-V relocations required by Linux kernel modulesRusty Wagner
2024-01-04Add RISC-V architecture pluginRusty Wagner