| Age | Commit message (Expand) | Author |
|---|
| 2024-08-12 | Add decode, disassembly, IL for TLBINV, TLBINVF | noone |
| 2024-08-12 | Sign-extend results of 32-bit operations on HI, LO | noone |
| 2024-08-12 | Add IL, intrinsics for TLB-related instructions | noone |
| 2024-08-12 | Add intrinsics for some system instructions | noone |
| 2024-08-12 | Differentiate some enums in IL switch statement | noone |
| 2024-08-12 | Remove checks for 64-bit shift instructions | noone |
| 2024-08-06 | Add flag role for carry flag when subtraction is implemented with addition | Rusty Wagner |
| 2024-08-02 | Properly lift push r16 instructions in x86. Fix https://github.com/Vector35/b... | Xusheng |
| 2024-07-24 | change parameter name to align the function definition | Zichuan Li |
| 2024-07-12 | Regenerate Cargo lock file after bindgen update. | Alexander Taylor |
| 2024-07-09 | [arm64] cleaned up dangling else warnings and removed unneeded ENC_LDR_Q* cas... | Galen Williamson |
| 2024-07-09 | Fix warning in mips arch (skip-note, skip-ci) | Mason Reed |
| 2024-07-08 | Add Cavium Octeon MIPS Instructions and more general MIPS fixes | noone |
| 2024-07-08 | [arm64] Full review of intrinsics; lifting of many instructions added, improv... | Galen Williamson |
| 2024-06-19 | Add data_variable_at_address and fixed the type propagation issue in riscv | Zichuan Li |
| 2024-06-13 | [arm64]: fix broken compilation on windows | Galen Williamson |
| 2024-06-13 | [arm64] fixed lifting for LDADD*, filled in lifting for alias STADD*, fixed t... | Galen Williamson |
| 2024-06-13 | [arm64] fixes and improvements to test_gen.py | Galen Williamson |
| 2024-06-12 | Disassemble SFENCE.VM instruction | Mason Reed |
| 2024-06-11 | More descriptive error for TP-relative reloc. | Alexander Taylor |
| 2024-06-11 | Add some missing arm64 system registers | Josh Ferrell |
| 2024-06-11 | Fix lifting of pair load operations when first and third operand are equal an... | Josh Ferrell |
| 2024-05-31 | improve efficiency | Zichuan Li |
| 2024-05-31 | Fixed type propagation issue in AARCH64 and MIPS | Zichuan Li |
| 2024-05-30 | [arm64] lift scvtf | Galen Williamson |
| 2024-05-29 | improve lifting of arm64 CSET instruction per Vector35/binaryninja-api#5134 | Galen Williamson |
| 2024-05-29 | Fix crash when reopening a binary with a valid X86_64_RELOC_SUBTRACTOR entry | Josh Ferrell |
| 2024-05-24 | arch: multiple delay slot support, suppress spurious mips warning | Ryan Snyder |
| 2024-05-01 | riscv: account for minor rust API updates | Ryan Snyder |
| 2024-04-25 | Recognize uClibc MIPS ELF PLT entries | Josh Ferrell |
| 2024-04-12 | Prevent slowdown when compiling with clang on not mac | Josh Ferrell |
| 2024-04-10 | Update xed to v2024.04.01 | Xusheng |
| 2024-04-09 | riscv : Remove uses of BnString per #5244 | KyleMiles |
| 2024-04-08 | Fix lifting for movs* and stos* instructions. | Brian Potchik |
| 2024-03-26 | added lifting for EXTSW LD LDU LDUX LDX SLD SRAD SRADI SRD STD STDU STDUX STDX | Galen Williamson |
| 2024-03-25 | [arch-x86] improve lifting for *movd* and *movq* instructions | Galen Williamson |
| 2024-03-22 | Remove FloatTruncate as its implied by 'FloatToInt' | Peter LaFosse |
| 2024-03-21 | Update to Rust 1.77 | Rusty Wagner |
| 2024-03-20 | Implement Hash, PartialEq & Eq for riscv Register | mason |
| 2024-03-15 | Separate local variable tokens in higher level ILs from stack variable tokens... | Rusty Wagner |
| 2024-03-14 | Update to Rust 1.76 | Rusty Wagner |
| 2024-03-12 | moved over from https://github.com/Vector35/arch-armv7/pull/81 | Galen Williamson |
| 2024-03-08 | Fix RISC-V CSRRW, CSRRS, and CSRRC instr disass | Pete Dietl |
| 2024-03-08 | Fix X86_64_RELOC_UNSIGNED not handling external symbols | Visual Ehrmanntraut |
| 2024-03-05 | Move architecture modules into the API repo | Rusty Wagner |
| 2024-02-01 | RISC-V: Fix disassembly of compressed JAL instruction | Pete Dietl |
| 2024-01-04 | Add RISC-V relocations required by Linux kernel modules | Rusty Wagner |
| 2024-01-04 | Add RISC-V architecture plugin | Rusty Wagner |
